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[Blackfin] serial driver: Add flow control support to bf54x 

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
This commit is contained in:
Sonic Zhang 2008-02-02 17:05:02 +08:00 committed by Bryan Wu
parent 4cb4f22b19
commit db288381e2
3 changed files with 17 additions and 2 deletions
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4
drivers/serial/Kconfig
View File

@ -699,14 +699,14 @@ config BFIN_UART1_CTSRTS
config UART1_CTS_PIN
int "UART1 CTS pin"
depends on BFIN_UART1_CTSRTS && (BF53x || BF561)
depends on BFIN_UART1_CTSRTS && !BF54x
default -1
help
Refer to ./include/asm-blackfin/gpio.h to see the GPIO map.
config UART1_RTS_PIN
int "UART1 RTS pin"
depends on BFIN_UART1_CTSRTS && (BF53x || BF561)
depends on BFIN_UART1_CTSRTS && !BF54x
default -1
help
Refer to ./include/asm-blackfin/gpio.h to see the GPIO map.

12
drivers/serial/bfin_5xx.c
View File

@ -579,7 +579,11 @@ static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
if (uart->cts_pin < 0)
return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
# ifdef BF54x
if (UART_GET_MSR(uart) & CTS)
# else
if (gpio_get_value(uart->cts_pin))
# endif
return TIOCM_DSR | TIOCM_CAR;
else
#endif
@ -594,9 +598,17 @@ static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
return;
if (mctrl & TIOCM_RTS)
# ifdef BF54x
UART_PUT_MCR(uart, UART_GET_MCR(uart) & ~MRTS);
# else
gpio_set_value(uart->rts_pin, 0);
# endif
else
# ifdef BF54x
UART_PUT_MCR(uart, UART_GET_MCR(uart) | MRTS);
# else
gpio_set_value(uart->rts_pin, 1);
# endif
#endif
}

3
include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
View File

@ -24,6 +24,8 @@
#define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR))
#define UART_GET_LSR(uart) bfin_read16(((uart)->port.membase + OFFSET_LSR))
#define UART_GET_GCTL(uart) bfin_read16(((uart)->port.membase + OFFSET_GCTL))
#define UART_GET_MSR(uart) bfin_read16(((uart)->port.membase + OFFSET_MSR))
#define UART_GET_MCR(uart) bfin_read16(((uart)->port.membase + OFFSET_MCR))
#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v)
#define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v)
@ -34,6 +36,7 @@
#define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
#define UART_CLEAR_LSR(uart) bfin_write16(((uart)->port.membase + OFFSET_LSR), -1)
#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v)
#define UART_PUT_MCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_MCR),v)
#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS)
# define CONFIG_SERIAL_BFIN_CTSRTS