ALSA: hda - Fix doubly initialization of i915 component
In the commitfcc88d91cd
("ALSA: hda - Bind with i915 component before codec binding"), the binding with i915 audio component is moved to be performed always at probing the controller. This fixed the potential problems on IVB, but now it brought another issue on HSW and BDW. These two platforms give two individual HD-audio controllers, one for the analog codec on PCH and another for HDMI over gfx. Since I decided to take a lazy path to check only AZX_DRIVER_PCH type in the commit above, now both controllers try to bind with i915, and you see a kernel WARNING. This patch tries to address it again properly. Now a new DCAPS bit, AZX_DCAPS_I915_COMPONENT, is introduced for indicating the binding with i915 component in addition to the existing I915_POWERWELL bit flag. Each PCI entry has to give this new flag if it requires the binding with i915 component. For HSW/BDW PCH (i.e. the ones defined by AZX_DCAPS_INTEL_PCH) doesn't contain AZX_DCAPS_I915_COMPONENT bit while others have it. While we're at it, add parentheses around the bit flag check for avoiding possible compiler warnings, too. The bug was spotted by Intel CI tests. Fixes:fcc88d91cd
("ALSA: hda - Bind with i915 component before codec binding") Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=196219 Reported-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Takashi Iwai <tiwai@suse.de>
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@ -32,7 +32,11 @@
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#define AZX_DCAPS_NO_MSI (1 << 9) /* No MSI support */
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#define AZX_DCAPS_NO_MSI (1 << 9) /* No MSI support */
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#define AZX_DCAPS_SNOOP_MASK (3 << 10) /* snoop type mask */
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#define AZX_DCAPS_SNOOP_MASK (3 << 10) /* snoop type mask */
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#define AZX_DCAPS_SNOOP_OFF (1 << 12) /* snoop default off */
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#define AZX_DCAPS_SNOOP_OFF (1 << 12) /* snoop default off */
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/* 13 unused */
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#ifdef CONFIG_SND_HDA_I915
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#define AZX_DCAPS_I915_COMPONENT (1 << 13) /* bind with i915 gfx */
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#else
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#define AZX_DCAPS_I915_COMPONENT 0 /* NOP */
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#endif
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/* 14 unused */
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/* 14 unused */
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#define AZX_DCAPS_CTX_WORKAROUND (1 << 15) /* X-Fi workaround */
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#define AZX_DCAPS_CTX_WORKAROUND (1 << 15) /* X-Fi workaround */
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#define AZX_DCAPS_POSFIX_LPIB (1 << 16) /* Use LPIB as default */
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#define AZX_DCAPS_POSFIX_LPIB (1 << 16) /* Use LPIB as default */
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@ -293,38 +293,43 @@ enum {
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(AZX_DCAPS_NO_ALIGN_BUFSIZE | AZX_DCAPS_COUNT_LPIB_DELAY |\
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(AZX_DCAPS_NO_ALIGN_BUFSIZE | AZX_DCAPS_COUNT_LPIB_DELAY |\
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AZX_DCAPS_SNOOP_TYPE(SCH))
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AZX_DCAPS_SNOOP_TYPE(SCH))
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/* PCH up to IVB; no runtime PM */
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/* PCH up to IVB; no runtime PM; bind with i915 gfx */
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#define AZX_DCAPS_INTEL_PCH_NOPM \
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#define AZX_DCAPS_INTEL_PCH_NOPM \
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(AZX_DCAPS_INTEL_PCH_BASE)
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(AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_I915_COMPONENT)
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/* PCH for HSW/BDW; with runtime PM */
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/* PCH for HSW/BDW; with runtime PM */
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/* no i915 binding for this as HSW/BDW has another controller for HDMI */
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#define AZX_DCAPS_INTEL_PCH \
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#define AZX_DCAPS_INTEL_PCH \
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(AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_PM_RUNTIME)
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(AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_PM_RUNTIME)
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/* HSW HDMI */
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/* HSW HDMI */
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#define AZX_DCAPS_INTEL_HASWELL \
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#define AZX_DCAPS_INTEL_HASWELL \
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(/*AZX_DCAPS_ALIGN_BUFSIZE |*/ AZX_DCAPS_COUNT_LPIB_DELAY |\
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(/*AZX_DCAPS_ALIGN_BUFSIZE |*/ AZX_DCAPS_COUNT_LPIB_DELAY |\
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AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_POWERWELL |\
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AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_COMPONENT |\
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AZX_DCAPS_SNOOP_TYPE(SCH))
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AZX_DCAPS_I915_POWERWELL | AZX_DCAPS_SNOOP_TYPE(SCH))
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/* Broadwell HDMI can't use position buffer reliably, force to use LPIB */
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/* Broadwell HDMI can't use position buffer reliably, force to use LPIB */
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#define AZX_DCAPS_INTEL_BROADWELL \
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#define AZX_DCAPS_INTEL_BROADWELL \
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(/*AZX_DCAPS_ALIGN_BUFSIZE |*/ AZX_DCAPS_POSFIX_LPIB |\
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(/*AZX_DCAPS_ALIGN_BUFSIZE |*/ AZX_DCAPS_POSFIX_LPIB |\
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AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_POWERWELL |\
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AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_COMPONENT |\
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AZX_DCAPS_SNOOP_TYPE(SCH))
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AZX_DCAPS_I915_POWERWELL | AZX_DCAPS_SNOOP_TYPE(SCH))
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#define AZX_DCAPS_INTEL_BAYTRAIL \
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#define AZX_DCAPS_INTEL_BAYTRAIL \
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(AZX_DCAPS_INTEL_PCH_NOPM | AZX_DCAPS_I915_POWERWELL)
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(AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_I915_COMPONENT |\
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AZX_DCAPS_I915_POWERWELL)
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#define AZX_DCAPS_INTEL_BRASWELL \
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#define AZX_DCAPS_INTEL_BRASWELL \
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(AZX_DCAPS_INTEL_PCH | AZX_DCAPS_I915_POWERWELL)
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(AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_PM_RUNTIME |\
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AZX_DCAPS_I915_COMPONENT | AZX_DCAPS_I915_POWERWELL)
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#define AZX_DCAPS_INTEL_SKYLAKE \
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#define AZX_DCAPS_INTEL_SKYLAKE \
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(AZX_DCAPS_INTEL_PCH | AZX_DCAPS_SEPARATE_STREAM_TAG |\
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(AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_PM_RUNTIME |\
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AZX_DCAPS_SEPARATE_STREAM_TAG | AZX_DCAPS_I915_COMPONENT |\
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AZX_DCAPS_I915_POWERWELL)
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AZX_DCAPS_I915_POWERWELL)
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#define AZX_DCAPS_INTEL_BROXTON \
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#define AZX_DCAPS_INTEL_BROXTON \
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(AZX_DCAPS_INTEL_PCH | AZX_DCAPS_SEPARATE_STREAM_TAG |\
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(AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_PM_RUNTIME |\
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AZX_DCAPS_SEPARATE_STREAM_TAG | AZX_DCAPS_I915_COMPONENT |\
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AZX_DCAPS_I915_POWERWELL)
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AZX_DCAPS_I915_POWERWELL)
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/* quirks for ATI SB / AMD Hudson */
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/* quirks for ATI SB / AMD Hudson */
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@ -1008,7 +1013,7 @@ static int azx_suspend(struct device *dev)
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if (chip->msi)
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if (chip->msi)
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pci_disable_msi(chip->pci);
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pci_disable_msi(chip->pci);
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if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL
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if ((chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
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&& hda->need_i915_power)
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&& hda->need_i915_power)
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snd_hdac_display_power(bus, false);
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snd_hdac_display_power(bus, false);
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@ -1114,7 +1119,7 @@ static int azx_runtime_suspend(struct device *dev)
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azx_stop_chip(chip);
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azx_stop_chip(chip);
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azx_enter_link_reset(chip);
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azx_enter_link_reset(chip);
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azx_clear_irq_pending(chip);
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azx_clear_irq_pending(chip);
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if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL
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if ((chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
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&& hda->need_i915_power)
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&& hda->need_i915_power)
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snd_hdac_display_power(azx_bus(chip), false);
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snd_hdac_display_power(azx_bus(chip), false);
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@ -1380,8 +1385,7 @@ static int azx_free(struct azx *chip)
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if (hda->need_i915_power)
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if (hda->need_i915_power)
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snd_hdac_display_power(bus, false);
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snd_hdac_display_power(bus, false);
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}
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}
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if (chip->driver_type == AZX_DRIVER_PCH ||
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if (chip->driver_type & AZX_DCAPS_I915_COMPONENT)
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(chip->driver_caps & AZX_DCAPS_I915_POWERWELL))
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snd_hdac_i915_exit(bus);
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snd_hdac_i915_exit(bus);
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kfree(hda);
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kfree(hda);
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@ -2199,8 +2203,7 @@ static int azx_probe_continue(struct azx *chip)
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hda->probe_continued = 1;
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hda->probe_continued = 1;
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/* bind with i915 if needed */
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/* bind with i915 if needed */
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if (chip->driver_type == AZX_DRIVER_PCH ||
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if (chip->driver_caps & AZX_DCAPS_I915_COMPONENT) {
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(chip->driver_caps & AZX_DCAPS_I915_POWERWELL)) {
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err = snd_hdac_i915_init(bus);
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err = snd_hdac_i915_init(bus);
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if (err < 0) {
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if (err < 0) {
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/* if the controller is bound only with HDMI/DP
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/* if the controller is bound only with HDMI/DP
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@ -2214,7 +2217,8 @@ static int azx_probe_continue(struct azx *chip)
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goto out_free;
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goto out_free;
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} else {
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} else {
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/* don't bother any longer */
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/* don't bother any longer */
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chip->driver_caps &= ~AZX_DCAPS_I915_POWERWELL;
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chip->driver_caps &=
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~(AZX_DCAPS_I915_COMPONENT | AZX_DCAPS_I915_POWERWELL);
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}
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}
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}
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}
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}
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}
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@ -2279,7 +2283,7 @@ static int azx_probe_continue(struct azx *chip)
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pm_runtime_put_autosuspend(&pci->dev);
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pm_runtime_put_autosuspend(&pci->dev);
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out_free:
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out_free:
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if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL
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if ((chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
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&& !hda->need_i915_power)
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&& !hda->need_i915_power)
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snd_hdac_display_power(bus, false);
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snd_hdac_display_power(bus, false);
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