Allwinner sunXi SoCs machine additions for 3.13
Nothing outstanding here, mostly some documentation cleanup, and the split of the previous generic machine declaration into three different machines to handle the sun4i/sun5i, sun6i and sun7i separately. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIcBAABAgAGBQJSYWutAAoJEBx+YmzsjxAgrscQAI8HcLtqaCDRktPOdZwtxl2x BWb91mVzOeZsIpbzqZFy6ffZR728+a3Hz5WJkNX7gFwwwh//1YW1pU2icw44Ch5g 2TfECqjZqfGv3cgpHGn4i7qxXWX+M/fxrFNSEjyRfKNFo6lZS9uNYJI9n7CEelbt XQIQ489Oxa9jU0ZGztH4F9S+sj0RVm4IHK32SZLq9UA7+GcC5RvQZ4sDup3gikKH lj1OqmCWX+A8KH2u5r7wwWNVjxvXrCuTHIMwL0jGsx1iz27nAsDe+blKMcYgEzPX 6SluNoTwe5c8U4SU/zwdHpWJCIFPSEaT/PjZ0wIGgSpCg3/6sndtsceeB5uG8szQ IBWOfvlsj1Xegz6LsY/IgEqzLn5GnEhuSFGEOoaJP31ZOkd0fWekV87ES4Jicz3+ wpTukRahrzCj57n1Rnpik+M5Nbb/Ef8b3rrgSat6eUwO1OpZJvF6XOk7l1ByQ1AO O3IqdofR8XjwMFzZn0zWyzdUujXwM6MI0PkRJSRNX59AtqrIQHuV6de+JJH6knub PLe4ZLpQonqP3BH42mcBjS4JcNub8MfpBl6c3w4AJ3uuH3I0dhGN4LP39O4r2d5H 0VWFhZlbhRHURyo0dCaeZu5utzK/yUPx/6J8eUD6rsJs1WsAPggDYU66IB3ecGr/ sS47wxl9t0Yuy9/+X2n6 =2aio -----END PGP SIGNATURE----- Merge tag 'sunxi-core-for-3.13' of https://github.com/mripard/linux into next/soc From Maxime Ripard: Allwinner sunXi SoCs machine additions for 3.13 Nothing outstanding here, mostly some documentation cleanup, and the split of the previous generic machine declaration into three different machines to handle the sun4i/sun5i, sun6i and sun7i separately. * tag 'sunxi-core-for-3.13' of https://github.com/mripard/linux: Documentation: dt: Remove clock gates IDs list for Allwinner SoCs Documentation: dt: Remove interrupt sources list for Allwinner SoCs Documentation: sunxi: Update Allwinner SoC documentation Documentation: sunxi: Update A13 user manual dead link ARM: sunxi: Order Kconfig options alphabetically ARM: sunxi: Simplify restart setup code ARM: sunxi: Split out the DT machines for sun6i and sun7i Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
e086df92e2
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@ -10,6 +10,10 @@ SunXi family
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Linux kernel mach directory: arch/arm/mach-sunxi
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Flavors:
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* ARM926 based SoCs
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- Allwinner F20 (sun3i)
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+ Not Supported
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* ARM Cortex-A8 based SoCs
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- Allwinner A10 (sun4i)
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+ Datasheet
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@ -25,4 +29,24 @@ SunXi family
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+ Datasheet
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http://dl.linux-sunxi.org/A13/A13%20Datasheet%20-%20v1.12%20%282012-03-29%29.pdf
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+ User Manual
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http://dl.linux-sunxi.org/A13/A13%20User%20Manual%20-%20v1.2%20%282013-08-08%29.pdf
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http://dl.linux-sunxi.org/A13/A13%20User%20Manual%20-%20v1.2%20%282013-01-08%29.pdf
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* Dual ARM Cortex-A7 based SoCs
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- Allwinner A20 (sun7i)
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+ User Manual
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http://dl.linux-sunxi.org/A20/A20%20User%20Manual%202013-03-22.pdf
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- Allwinner A23
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+ Not Supported
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* Quad ARM Cortex-A7 based SoCs
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- Allwinner A31 (sun6i)
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+ Datasheet
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http://dl.linux-sunxi.org/A31/A31%20Datasheet%20-%20v1.00%20(2012-12-24).pdf
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- Allwinner A31s (sun6i)
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+ Not Supported
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* Quad ARM Cortex-A15, Quad ARM Cortex-A7 based SoCs
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- Allwinner A80
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+ Not Supported
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@ -45,8 +45,8 @@ Additionally, "allwinner,*-gates-clk" clocks require:
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Clock consumers should specify the desired clocks they use with a
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"clocks" phandle cell. Consumers that are using a gated clock should
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provide an additional ID in their clock property. The values of this
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ID are documented in sunxi/<soc>-gates.txt.
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provide an additional ID in their clock property. This ID is the
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offset of the bit controlling this particular gate in the register.
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For example:
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@ -1,93 +0,0 @@
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Gate clock outputs
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------------------
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* AXI gates ("allwinner,sun4i-axi-gates-clk")
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DRAM 0
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* AHB gates ("allwinner,sun4i-ahb-gates-clk")
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USB0 0
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EHCI0 1
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OHCI0 2*
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EHCI1 3
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OHCI1 4*
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SS 5
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DMA 6
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BIST 7
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MMC0 8
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MMC1 9
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MMC2 10
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MMC3 11
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MS 12**
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NAND 13
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SDRAM 14
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ACE 16
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EMAC 17
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TS 18
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SPI0 20
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SPI1 21
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SPI2 22
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SPI3 23
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PATA 24
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SATA 25**
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GPS 26*
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VE 32
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TVD 33
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TVE0 34
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TVE1 35
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LCD0 36
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LCD1 37
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CSI0 40
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CSI1 41
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HDMI 43
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DE_BE0 44
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DE_BE1 45
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DE_FE1 46
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DE_FE1 47
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MP 50
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MALI400 52
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* APB0 gates ("allwinner,sun4i-apb0-gates-clk")
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CODEC 0
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SPDIF 1*
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AC97 2
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IIS 3
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PIO 5
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IR0 6
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IR1 7
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KEYPAD 10
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* APB1 gates ("allwinner,sun4i-apb1-gates-clk")
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I2C0 0
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I2C1 1
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I2C2 2
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CAN 4
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SCR 5
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PS20 6
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PS21 7
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UART0 16
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UART1 17
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UART2 18
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UART3 19
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UART4 20
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UART5 21
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UART6 22
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UART7 23
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Notation:
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[*]: The datasheet didn't mention these, but they are present on AW code
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[**]: The datasheet had this marked as "NC" but they are used on AW code
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@ -1,75 +0,0 @@
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Gate clock outputs
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------------------
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* AXI gates ("allwinner,sun4i-axi-gates-clk")
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DRAM 0
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* AHB gates ("allwinner,sun5i-a10s-ahb-gates-clk")
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USB0 0
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EHCI0 1
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OHCI0 2
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SS 5
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DMA 6
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BIST 7
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MMC0 8
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MMC1 9
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MMC2 10
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NAND 13
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SDRAM 14
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EMAC 17
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TS 18
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SPI0 20
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SPI1 21
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SPI2 22
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GPS 26
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HSTIMER 28
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VE 32
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TVE 34
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LCD 36
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CSI 40
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HDMI 43
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DE_BE 44
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DE_FE 46
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IEP 51
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MALI400 52
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* APB0 gates ("allwinner,sun5i-a10s-apb0-gates-clk")
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CODEC 0
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IIS 3
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PIO 5
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IR 6
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KEYPAD 10
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* APB1 gates ("allwinner,sun5i-a10s-apb1-gates-clk")
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I2C0 0
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I2C1 1
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I2C2 2
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UART0 16
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UART1 17
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UART2 18
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UART3 19
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Notation:
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[*]: The datasheet didn't mention these, but they are present on AW code
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[**]: The datasheet had this marked as "NC" but they are used on AW code
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@ -1,58 +0,0 @@
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Gate clock outputs
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------------------
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* AXI gates ("allwinner,sun4i-axi-gates-clk")
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DRAM 0
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* AHB gates ("allwinner,sun5i-a13-ahb-gates-clk")
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USBOTG 0
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EHCI 1
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OHCI 2
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SS 5
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DMA 6
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BIST 7
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MMC0 8
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MMC1 9
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MMC2 10
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NAND 13
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SDRAM 14
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SPI0 20
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SPI1 21
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SPI2 22
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STIMER 28
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VE 32
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LCD 36
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CSI 40
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DE_BE 44
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DE_FE 46
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IEP 51
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MALI400 52
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* APB0 gates ("allwinner,sun5i-a13-apb0-gates-clk")
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CODEC 0
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PIO 5
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IR 6
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* APB1 gates ("allwinner,sun5i-a13-apb1-gates-clk")
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I2C0 0
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I2C1 1
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I2C2 2
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UART1 17
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UART3 19
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@ -1,83 +0,0 @@
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Gate clock outputs
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------------------
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* AHB1 gates ("allwinner,sun6i-a31-ahb1-gates-clk")
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MIPI DSI 1
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SS 5
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DMA 6
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MMC0 8
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MMC1 9
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MMC2 10
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MMC3 11
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NAND1 12
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NAND0 13
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SDRAM 14
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GMAC 17
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TS 18
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HSTIMER 19
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SPI0 20
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SPI1 21
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SPI2 22
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SPI3 23
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USB_OTG 24
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EHCI0 26
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EHCI1 27
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OHCI0 29
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OHCI1 30
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OHCI2 31
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VE 32
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LCD0 36
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LCD1 37
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CSI 40
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HDMI 43
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DE_BE0 44
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DE_BE1 45
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DE_FE1 46
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DE_FE1 47
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MP 50
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GPU 52
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DEU0 55
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DEU1 56
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DRC0 57
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DRC1 58
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* APB1 gates ("allwinner,sun6i-a31-apb1-gates-clk")
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CODEC 0
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DIGITAL MIC 4
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PIO 5
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DAUDIO0 12
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DAUDIO1 13
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* APB2 gates ("allwinner,sun6i-a31-apb2-gates-clk")
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I2C0 0
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I2C1 1
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I2C2 2
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I2C3 3
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UART0 16
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UART1 17
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UART2 18
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UART3 19
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UART4 20
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UART5 21
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Notation:
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[*]: The datasheet didn't mention these, but they are present on AW code
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[**]: The datasheet had this marked as "NC" but they are used on AW code
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|
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@ -1,98 +0,0 @@
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Gate clock outputs
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------------------
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* AXI gates ("allwinner,sun4i-axi-gates-clk")
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DRAM 0
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* AHB gates ("allwinner,sun7i-a20-ahb-gates-clk")
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USB0 0
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EHCI0 1
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OHCI0 2
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EHCI1 3
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OHCI1 4
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SS 5
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DMA 6
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BIST 7
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MMC0 8
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MMC1 9
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MMC2 10
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MMC3 11
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MS 12
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NAND 13
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SDRAM 14
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ACE 16
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EMAC 17
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TS 18
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SPI0 20
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SPI1 21
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SPI2 22
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SPI3 23
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SATA 25
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HSTIMER 28
|
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VE 32
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TVD 33
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TVE0 34
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TVE1 35
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LCD0 36
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LCD1 37
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CSI0 40
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CSI1 41
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|
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HDMI1 42
|
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HDMI0 43
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DE_BE0 44
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DE_BE1 45
|
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DE_FE1 46
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DE_FE1 47
|
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|
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GMAC 49
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MP 50
|
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|
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MALI400 52
|
||||
|
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* APB0 gates ("allwinner,sun7i-a20-apb0-gates-clk")
|
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|
||||
CODEC 0
|
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SPDIF 1
|
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AC97 2
|
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IIS0 3
|
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IIS1 4
|
||||
PIO 5
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IR0 6
|
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IR1 7
|
||||
IIS2 8
|
||||
|
||||
KEYPAD 10
|
||||
|
||||
* APB1 gates ("allwinner,sun7i-a20-apb1-gates-clk")
|
||||
|
||||
I2C0 0
|
||||
I2C1 1
|
||||
I2C2 2
|
||||
I2C3 3
|
||||
CAN 4
|
||||
SCR 5
|
||||
PS20 6
|
||||
PS21 7
|
||||
|
||||
I2C4 15
|
||||
UART0 16
|
||||
UART1 17
|
||||
UART2 18
|
||||
UART3 19
|
||||
UART4 20
|
||||
UART5 21
|
||||
UART6 22
|
||||
UART7 23
|
||||
|
||||
Notation:
|
||||
[*]: The datasheet didn't mention these, but they are present on AW code
|
||||
[**]: The datasheet had this marked as "NC" but they are used on AW code
|
||||
|
|
@ -8,9 +8,6 @@ Required properties:
|
|||
- #interrupt-cells : Specifies the number of cells needed to encode an
|
||||
interrupt source. The value shall be 1.
|
||||
|
||||
For the valid interrupt sources for your SoC, see the documentation in
|
||||
sunxi/<soc>.txt
|
||||
|
||||
Example:
|
||||
|
||||
intc: interrupt-controller {
|
||||
|
|
|
|||
|
|
@ -1,89 +0,0 @@
|
|||
Allwinner A10 (sun4i) interrupt sources
|
||||
---------------------------------------
|
||||
|
||||
The interrupt sources available for the Allwinner A10 SoC are the
|
||||
following one:
|
||||
|
||||
0: ENMI
|
||||
1: UART0
|
||||
2: UART1
|
||||
3: UART2
|
||||
4: UART3
|
||||
5: IR0
|
||||
6: IR1
|
||||
7: I2C0
|
||||
8: I2C1
|
||||
9: I2C2
|
||||
10: SPI0
|
||||
11: SPI1
|
||||
12: SPI2
|
||||
13: SPDIF
|
||||
14: AC97
|
||||
15: TS
|
||||
16: I2S
|
||||
17: UART4
|
||||
18: UART5
|
||||
19: UART6
|
||||
20: UART7
|
||||
21: KEYPAD
|
||||
22: TIMER0
|
||||
23: TIMER1
|
||||
24: TIMER2
|
||||
25: TIMER3
|
||||
26: CAN
|
||||
27: DMA
|
||||
28: PIO
|
||||
29: TOUCH_PANEL
|
||||
30: AUDIO_CODEC
|
||||
31: LRADC
|
||||
32: MMC0
|
||||
33: MMC1
|
||||
34: MMC2
|
||||
35: MMC3
|
||||
36: MEMSTICK
|
||||
37: NAND
|
||||
38: USB0
|
||||
39: USB1
|
||||
40: USB2
|
||||
41: SCR
|
||||
42: CSI0
|
||||
43: CSI1
|
||||
44: LCDCTRL0
|
||||
45: LCDCTRL1
|
||||
46: MP
|
||||
47: DEFEBE0
|
||||
48: DEFEBE1
|
||||
49: PMU
|
||||
50: SPI3
|
||||
51: TZASC
|
||||
52: PATA
|
||||
53: VE
|
||||
54: SS
|
||||
55: EMAC
|
||||
56: SATA
|
||||
57: GPS
|
||||
58: HDMI
|
||||
59: TVE
|
||||
60: ACE
|
||||
61: TVD
|
||||
62: PS2_0
|
||||
63: PS2_1
|
||||
64: USB3
|
||||
65: USB4
|
||||
66: PLE_PFM
|
||||
67: TIMER4
|
||||
68: TIMER5
|
||||
69: GPU_GP
|
||||
70: GPU_GPMMU
|
||||
71: GPU_PP0
|
||||
72: GPU_PPMMU0
|
||||
73: GPU_PMU
|
||||
74: GPU_RSV0
|
||||
75: GPU_RSV1
|
||||
76: GPU_RSV2
|
||||
77: GPU_RSV3
|
||||
78: GPU_RSV4
|
||||
79: GPU_RSV5
|
||||
80: GPU_RSV6
|
||||
82: SYNC_TIMER0
|
||||
83: SYNC_TIMER1
|
||||
|
|
@ -1,55 +0,0 @@
|
|||
Allwinner A13 (sun5i) interrupt sources
|
||||
---------------------------------------
|
||||
|
||||
The interrupt sources available for the Allwinner A13 SoC are the
|
||||
following one:
|
||||
|
||||
0: ENMI
|
||||
2: UART1
|
||||
4: UART3
|
||||
5: IR
|
||||
7: I2C0
|
||||
8: I2C1
|
||||
9: I2C2
|
||||
10: SPI0
|
||||
11: SPI1
|
||||
12: SPI2
|
||||
22: TIMER0
|
||||
23: TIMER1
|
||||
24: TIMER2
|
||||
25: TIMER3
|
||||
27: DMA
|
||||
28: PIO
|
||||
29: TOUCH_PANEL
|
||||
30: AUDIO_CODEC
|
||||
31: LRADC
|
||||
32: MMC0
|
||||
33: MMC1
|
||||
34: MMC2
|
||||
37: NAND
|
||||
38: USB OTG
|
||||
39: USB EHCI
|
||||
40: USB OHCI
|
||||
42: CSI
|
||||
44: LCDCTRL
|
||||
47: DEFEBE
|
||||
49: PMU
|
||||
53: VE
|
||||
54: SS
|
||||
66: PLE_PFM
|
||||
67: TIMER4
|
||||
68: TIMER5
|
||||
69: GPU_GP
|
||||
70: GPU_GPMMU
|
||||
71: GPU_PP0
|
||||
72: GPU_PPMMU0
|
||||
73: GPU_PMU
|
||||
74: GPU_RSV0
|
||||
75: GPU_RSV1
|
||||
76: GPU_RSV2
|
||||
77: GPU_RSV3
|
||||
78: GPU_RSV4
|
||||
79: GPU_RSV5
|
||||
80: GPU_RSV6
|
||||
82: SYNC_TIMER0
|
||||
83: SYNC_TIMER1
|
||||
|
|
@ -1,14 +1,14 @@
|
|||
config ARCH_SUNXI
|
||||
bool "Allwinner A1X SOCs" if ARCH_MULTI_V7
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select ARM_GIC
|
||||
select CLKSRC_MMIO
|
||||
select CLKSRC_OF
|
||||
select COMMON_CLK
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select GENERIC_IRQ_CHIP
|
||||
select HAVE_SMP
|
||||
select PINCTRL
|
||||
select PINCTRL_SUNXI
|
||||
select SPARSE_IRQ
|
||||
select SUN4I_TIMER
|
||||
select PINCTRL_SUNXI
|
||||
select ARM_GIC
|
||||
select HAVE_SMP
|
||||
|
|
|
|||
|
|
@ -90,14 +90,13 @@ static void sun6i_restart(enum reboot_mode mode, const char *cmd)
|
|||
}
|
||||
|
||||
static struct of_device_id sunxi_restart_ids[] = {
|
||||
{ .compatible = "allwinner,sun4i-wdt", .data = sun4i_restart },
|
||||
{ .compatible = "allwinner,sun6i-wdt", .data = sun6i_restart },
|
||||
{ .compatible = "allwinner,sun4i-wdt" },
|
||||
{ .compatible = "allwinner,sun6i-wdt" },
|
||||
{ /*sentinel*/ }
|
||||
};
|
||||
|
||||
static void sunxi_setup_restart(void)
|
||||
{
|
||||
const struct of_device_id *of_id;
|
||||
struct device_node *np;
|
||||
|
||||
np = of_find_matching_node(NULL, sunxi_restart_ids);
|
||||
|
|
@ -106,11 +105,6 @@ static void sunxi_setup_restart(void)
|
|||
|
||||
wdt_base = of_iomap(np, 0);
|
||||
WARN(!wdt_base, "failed to map watchdog base address");
|
||||
|
||||
of_id = of_match_node(sunxi_restart_ids, np);
|
||||
WARN(!of_id, "restart function not available");
|
||||
|
||||
arm_pm_restart = of_id->data;
|
||||
}
|
||||
|
||||
static void __init sunxi_dt_init(void)
|
||||
|
|
@ -124,12 +118,35 @@ static const char * const sunxi_board_dt_compat[] = {
|
|||
"allwinner,sun4i-a10",
|
||||
"allwinner,sun5i-a10s",
|
||||
"allwinner,sun5i-a13",
|
||||
"allwinner,sun6i-a31",
|
||||
"allwinner,sun7i-a20",
|
||||
NULL,
|
||||
};
|
||||
|
||||
DT_MACHINE_START(SUNXI_DT, "Allwinner A1X (Device Tree)")
|
||||
.init_machine = sunxi_dt_init,
|
||||
.dt_compat = sunxi_board_dt_compat,
|
||||
.restart = sun4i_restart,
|
||||
MACHINE_END
|
||||
|
||||
static const char * const sun6i_board_dt_compat[] = {
|
||||
"allwinner,sun6i-a31",
|
||||
NULL,
|
||||
};
|
||||
|
||||
DT_MACHINE_START(SUN6I_DT, "Allwinner sun6i (A31) Family")
|
||||
.init_machine = sunxi_dt_init,
|
||||
.init_time = sunxi_timer_init,
|
||||
.dt_compat = sun6i_board_dt_compat,
|
||||
.restart = sun6i_restart,
|
||||
MACHINE_END
|
||||
|
||||
static const char * const sun7i_board_dt_compat[] = {
|
||||
"allwinner,sun7i-a20",
|
||||
NULL,
|
||||
};
|
||||
|
||||
DT_MACHINE_START(SUN7I_DT, "Allwinner sun7i (A20) Family")
|
||||
.init_machine = sunxi_dt_init,
|
||||
.init_time = sunxi_timer_init,
|
||||
.dt_compat = sun7i_board_dt_compat,
|
||||
.restart = sun4i_restart,
|
||||
MACHINE_END
|
||||
|
|
|
|||
Loading…
Reference in New Issue