ARM: EXYNOS4: Support system level power down configuration
EXYNOS4 supports 3 different system level power down mode by PMU (Power Management Unit). Each power down mode need to configure many PMU registers with different value. This patch supports function to configure PMU registers with pre-defined values in PMU code. This function may be used by PM code and AFTR/LPA support driver. Signed-off-by: Jaecheol Lee <jc.lee@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit is contained in:
Jaecheol Lee
Kukjin Kim
parent
2ba707ac3c
commit
e28e301475
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@ -13,7 +13,7 @@ obj- :=
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# Core support for EXYNOS4 system
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obj-$(CONFIG_CPU_EXYNOS4210) += cpu.o init.o clock.o irq-combiner.o
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obj-$(CONFIG_CPU_EXYNOS4210) += setup-i2c0.o irq-eint.o dma.o
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obj-$(CONFIG_CPU_EXYNOS4210) += setup-i2c0.o irq-eint.o dma.o pmu.o
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obj-$(CONFIG_PM) += pm.o sleep.o
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obj-$(CONFIG_CPU_FREQ) += cpufreq.o
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obj-$(CONFIG_CPU_IDLE) += cpuidle.o
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@ -0,0 +1,25 @@
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/* linux/arch/arm/mach-exynos4/include/mach/pmu.h
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*
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* Copyright (c) 2011 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* EXYNOS4210 - PMU(Power Management Unit) support
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_PMU_H
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#define __ASM_ARCH_PMU_H __FILE__
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enum sys_powerdown {
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SYS_AFTR,
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SYS_LPA,
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SYS_SLEEP,
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NUM_SYS_POWERDOWN,
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};
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extern void exynos4_sys_powerdown_conf(enum sys_powerdown mode);
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#endif /* __ASM_ARCH_PMU_H */
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@ -0,0 +1,175 @@
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/* linux/arch/arm/mach-exynos4/pmu.c
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*
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* Copyright (c) 2011 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* EXYNOS4210 - CPU PMU(Power Management Unit) support
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <mach/regs-clock.h>
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#include <mach/pmu.h>
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static void __iomem *sys_powerdown_reg[] = {
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S5P_ARM_CORE0_LOWPWR,
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S5P_DIS_IRQ_CORE0,
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S5P_DIS_IRQ_CENTRAL0,
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S5P_ARM_CORE1_LOWPWR,
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S5P_DIS_IRQ_CORE1,
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S5P_DIS_IRQ_CENTRAL1,
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S5P_ARM_COMMON_LOWPWR,
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S5P_L2_0_LOWPWR,
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S5P_L2_1_LOWPWR,
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S5P_CMU_ACLKSTOP_LOWPWR,
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S5P_CMU_SCLKSTOP_LOWPWR,
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S5P_CMU_RESET_LOWPWR,
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S5P_APLL_SYSCLK_LOWPWR,
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S5P_MPLL_SYSCLK_LOWPWR,
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S5P_VPLL_SYSCLK_LOWPWR,
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S5P_EPLL_SYSCLK_LOWPWR,
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S5P_CMU_CLKSTOP_GPS_ALIVE_LOWPWR,
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S5P_CMU_RESET_GPSALIVE_LOWPWR,
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S5P_CMU_CLKSTOP_CAM_LOWPWR,
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S5P_CMU_CLKSTOP_TV_LOWPWR,
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S5P_CMU_CLKSTOP_MFC_LOWPWR,
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S5P_CMU_CLKSTOP_G3D_LOWPWR,
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S5P_CMU_CLKSTOP_LCD0_LOWPWR,
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S5P_CMU_CLKSTOP_LCD1_LOWPWR,
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S5P_CMU_CLKSTOP_MAUDIO_LOWPWR,
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S5P_CMU_CLKSTOP_GPS_LOWPWR,
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S5P_CMU_RESET_CAM_LOWPWR,
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S5P_CMU_RESET_TV_LOWPWR,
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S5P_CMU_RESET_MFC_LOWPWR,
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S5P_CMU_RESET_G3D_LOWPWR,
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S5P_CMU_RESET_LCD0_LOWPWR,
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S5P_CMU_RESET_LCD1_LOWPWR,
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S5P_CMU_RESET_MAUDIO_LOWPWR,
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S5P_CMU_RESET_GPS_LOWPWR,
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S5P_TOP_BUS_LOWPWR,
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S5P_TOP_RETENTION_LOWPWR,
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S5P_TOP_PWR_LOWPWR,
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S5P_LOGIC_RESET_LOWPWR,
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S5P_ONENAND_MEM_LOWPWR,
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S5P_MODIMIF_MEM_LOWPWR,
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S5P_G2D_ACP_MEM_LOWPWR,
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S5P_USBOTG_MEM_LOWPWR,
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S5P_HSMMC_MEM_LOWPWR,
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S5P_CSSYS_MEM_LOWPWR,
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S5P_SECSS_MEM_LOWPWR,
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S5P_PCIE_MEM_LOWPWR,
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S5P_SATA_MEM_LOWPWR,
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S5P_PAD_RETENTION_DRAM_LOWPWR,
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S5P_PAD_RETENTION_MAUDIO_LOWPWR,
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S5P_PAD_RETENTION_GPIO_LOWPWR,
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S5P_PAD_RETENTION_UART_LOWPWR,
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S5P_PAD_RETENTION_MMCA_LOWPWR,
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S5P_PAD_RETENTION_MMCB_LOWPWR,
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S5P_PAD_RETENTION_EBIA_LOWPWR,
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S5P_PAD_RETENTION_EBIB_LOWPWR,
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S5P_PAD_RETENTION_ISOLATION_LOWPWR,
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S5P_PAD_RETENTION_ALV_SEL_LOWPWR,
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S5P_XUSBXTI_LOWPWR,
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S5P_XXTI_LOWPWR,
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S5P_EXT_REGULATOR_LOWPWR,
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S5P_GPIO_MODE_LOWPWR,
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S5P_GPIO_MODE_MAUDIO_LOWPWR,
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S5P_CAM_LOWPWR,
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S5P_TV_LOWPWR,
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S5P_MFC_LOWPWR,
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S5P_G3D_LOWPWR,
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S5P_LCD0_LOWPWR,
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S5P_LCD1_LOWPWR,
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S5P_MAUDIO_LOWPWR,
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S5P_GPS_LOWPWR,
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S5P_GPS_ALIVE_LOWPWR,
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};
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static const unsigned int sys_powerdown_val[][NUM_SYS_POWERDOWN] = {
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/* { AFTR, LPA, SLEEP }*/
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{ 0, 0, 2 }, /* ARM_CORE0 */
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{ 0, 0, 0 }, /* ARM_DIS_IRQ_CORE0 */
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{ 0, 0, 0 }, /* ARM_DIS_IRQ_CENTRAL0 */
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{ 0, 0, 2 }, /* ARM_CORE1 */
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{ 0, 0, 0 }, /* ARM_DIS_IRQ_CORE1 */
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{ 0, 0, 0 }, /* ARM_DIS_IRQ_CENTRAL1 */
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{ 0, 0, 2 }, /* ARM_COMMON */
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{ 2, 2, 3 }, /* ARM_CPU_L2_0 */
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{ 2, 2, 3 }, /* ARM_CPU_L2_1 */
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{ 1, 0, 0 }, /* CMU_ACLKSTOP */
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{ 1, 0, 0 }, /* CMU_SCLKSTOP */
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{ 1, 1, 0 }, /* CMU_RESET */
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{ 1, 0, 0 }, /* APLL_SYSCLK */
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{ 1, 0, 0 }, /* MPLL_SYSCLK */
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{ 1, 0, 0 }, /* VPLL_SYSCLK */
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{ 1, 1, 0 }, /* EPLL_SYSCLK */
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{ 1, 1, 0 }, /* CMU_CLKSTOP_GPS_ALIVE */
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{ 1, 1, 0 }, /* CMU_RESET_GPS_ALIVE */
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{ 1, 1, 0 }, /* CMU_CLKSTOP_CAM */
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{ 1, 1, 0 }, /* CMU_CLKSTOP_TV */
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{ 1, 1, 0 }, /* CMU_CLKSTOP_MFC */
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{ 1, 1, 0 }, /* CMU_CLKSTOP_G3D */
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{ 1, 1, 0 }, /* CMU_CLKSTOP_LCD0 */
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{ 1, 1, 0 }, /* CMU_CLKSTOP_LCD1 */
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{ 1, 1, 0 }, /* CMU_CLKSTOP_MAUDIO */
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{ 1, 1, 0 }, /* CMU_CLKSTOP_GPS */
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{ 1, 1, 0 }, /* CMU_RESET_CAM */
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{ 1, 1, 0 }, /* CMU_RESET_TV */
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{ 1, 1, 0 }, /* CMU_RESET_MFC */
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{ 1, 1, 0 }, /* CMU_RESET_G3D */
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{ 1, 1, 0 }, /* CMU_RESET_LCD0 */
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{ 1, 1, 0 }, /* CMU_RESET_LCD1 */
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{ 1, 1, 0 }, /* CMU_RESET_MAUDIO */
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{ 1, 1, 0 }, /* CMU_RESET_GPS */
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{ 3, 0, 0 }, /* TOP_BUS */
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{ 1, 0, 1 }, /* TOP_RETENTION */
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{ 3, 0, 3 }, /* TOP_PWR */
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{ 1, 1, 0 }, /* LOGIC_RESET */
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{ 3, 0, 0 }, /* ONENAND_MEM */
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{ 3, 0, 0 }, /* MODIMIF_MEM */
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{ 3, 0, 0 }, /* G2D_ACP_MEM */
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{ 3, 0, 0 }, /* USBOTG_MEM */
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{ 3, 0, 0 }, /* HSMMC_MEM */
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{ 3, 0, 0 }, /* CSSYS_MEM */
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{ 3, 0, 0 }, /* SECSS_MEM */
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{ 3, 0, 0 }, /* PCIE_MEM */
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{ 3, 0, 0 }, /* SATA_MEM */
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{ 1, 0, 0 }, /* PAD_RETENTION_DRAM */
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{ 1, 1, 0 }, /* PAD_RETENTION_MAUDIO */
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{ 1, 0, 0 }, /* PAD_RETENTION_GPIO */
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{ 1, 0, 0 }, /* PAD_RETENTION_UART */
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{ 1, 0, 0 }, /* PAD_RETENTION_MMCA */
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{ 1, 0, 0 }, /* PAD_RETENTION_MMCB */
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{ 1, 0, 0 }, /* PAD_RETENTION_EBIA */
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{ 1, 0, 0 }, /* PAD_RETENTION_EBIB */
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{ 1, 0, 0 }, /* PAD_RETENTION_ISOLATION */
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{ 1, 0, 0 }, /* PAD_RETENTION_ALV_SEL */
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{ 1, 1, 0 }, /* XUSBXTI */
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{ 1, 1, 0 }, /* XXTI */
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{ 1, 1, 0 }, /* EXT_REGULATOR */
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{ 1, 0, 0 }, /* GPIO_MODE */
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{ 1, 1, 0 }, /* GPIO_MODE_MAUDIO */
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{ 7, 0, 0 }, /* CAM */
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{ 7, 0, 0 }, /* TV */
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{ 7, 0, 0 }, /* MFC */
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{ 7, 0, 0 }, /* G3D */
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{ 7, 0, 0 }, /* LCD0 */
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{ 7, 0, 0 }, /* LCD1 */
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{ 7, 7, 0 }, /* MAUDIO */
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{ 7, 0, 0 }, /* GPS */
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{ 7, 0, 0 }, /* GPS_ALIVE */
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};
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void exynos4_sys_powerdown_conf(enum sys_powerdown mode)
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{
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unsigned int count = ARRAY_SIZE(sys_powerdown_reg);
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for (; count > 0; count--)
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__raw_writel(sys_powerdown_val[count - 1][mode],
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sys_powerdown_reg[count - 1]);
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}
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