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nvidiafb: access CRT registers safely 

Use Read/WriteCrtc() to access CRTC registers in nv_i2c.c.  These are safer
  because it uses the correct CRTC base (0x3bx or 0x3dx).

Signed-off-by: Antonino Daplas <adaplas@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Antonino A. Daplas 2007-05-08 00:38:24 -07:00 committed by Linus Torvalds
parent b9b2696de9
commit e296927bcc
1 changed files with 6 additions and 12 deletions
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18
drivers/video/nvidia/nv_i2c.c
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@ -30,16 +30,14 @@ static void nvidia_gpio_setscl(void *data, int state)
struct nvidia_par *par = chan->par;
u32 val;
VGA_WR08(par->PCIO, 0x3d4, chan->ddc_base + 1);
val = VGA_RD08(par->PCIO, 0x3d5) & 0xf0;
val = NVReadCrtc(par, chan->ddc_base + 1) & 0xf0;
if (state)
val |= 0x20;
else
val &= ~0x20;
VGA_WR08(par->PCIO, 0x3d4, chan->ddc_base + 1);
VGA_WR08(par->PCIO, 0x3d5, val | 0x1);
NVWriteCrtc(par, chan->ddc_base + 1, val | 0x01);
}
static void nvidia_gpio_setsda(void *data, int state)
@ -48,16 +46,14 @@ static void nvidia_gpio_setsda(void *data, int state)
struct nvidia_par *par = chan->par;
u32 val;
VGA_WR08(par->PCIO, 0x3d4, chan->ddc_base + 1);
val = VGA_RD08(par->PCIO, 0x3d5) & 0xf0;
val = NVReadCrtc(par, chan->ddc_base + 1) & 0xf0;
if (state)
val |= 0x10;
else
val &= ~0x10;
VGA_WR08(par->PCIO, 0x3d4, chan->ddc_base + 1);
VGA_WR08(par->PCIO, 0x3d5, val | 0x1);
NVWriteCrtc(par, chan->ddc_base + 1, val | 0x01);
}
static int nvidia_gpio_getscl(void *data)
@ -66,8 +62,7 @@ static int nvidia_gpio_getscl(void *data)
struct nvidia_par *par = chan->par;
u32 val = 0;
VGA_WR08(par->PCIO, 0x3d4, chan->ddc_base);
if (VGA_RD08(par->PCIO, 0x3d5) & 0x04)
if (NVReadCrtc(par, chan->ddc_base) & 0x04)
val = 1;
return val;
@ -79,8 +74,7 @@ static int nvidia_gpio_getsda(void *data)
struct nvidia_par *par = chan->par;
u32 val = 0;
VGA_WR08(par->PCIO, 0x3d4, chan->ddc_base);
if (VGA_RD08(par->PCIO, 0x3d5) & 0x08)
if (NVReadCrtc(par, chan->ddc_base) & 0x08)
val = 1;
return val;