ath9k_hw: remove references to hw->conf
Accessing it to get the current operating channel is racy and in the way of further channel handling related changes Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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c648ecb044
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@ -672,7 +672,7 @@ static void ar5008_hw_set_channel_regs(struct ath_hw *ah,
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}
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REG_WRITE(ah, AR_PHY_TURBO, phymode);
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ath9k_hw_set11nmac2040(ah);
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ath9k_hw_set11nmac2040(ah, chan);
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ENABLE_REGWRITE_BUFFER(ah);
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@ -564,7 +564,7 @@ static void ar9003_hw_set_channel_regs(struct ath_hw *ah,
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REG_WRITE(ah, AR_PHY_GEN_CTRL, phymode);
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/* Configure MAC for 20/40 operation */
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ath9k_hw_set11nmac2040(ah);
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ath9k_hw_set11nmac2040(ah, chan);
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/* global transmit timeout (25 TUs default)*/
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REG_WRITE(ah, AR_GTXTO, 25 << AR_GTXTO_TIMEOUT_LIMIT_S);
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@ -186,7 +186,6 @@ void ath9k_hw_reset_calibration(struct ath_hw *ah,
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bool ath9k_hw_reset_calvalid(struct ath_hw *ah)
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{
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struct ath_common *common = ath9k_hw_common(ah);
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struct ieee80211_conf *conf = &common->hw->conf;
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struct ath9k_cal_list *currCal = ah->cal_list_curr;
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if (!ah->caldata)
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@ -208,7 +207,7 @@ bool ath9k_hw_reset_calvalid(struct ath_hw *ah)
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return true;
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ath_dbg(common, CALIBRATE, "Resetting Cal %d state for channel %u\n",
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currCal->calData->calType, conf->chandef.chan->center_freq);
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currCal->calData->calType, ah->curchan->chan->center_freq);
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ah->caldata->CalValid &= ~currCal->calData->calType;
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currCal->calState = CAL_WAITING;
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@ -242,7 +241,6 @@ void ath9k_hw_loadnf(struct ath_hw *ah, struct ath9k_channel *chan)
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int32_t val;
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u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask;
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struct ath_common *common = ath9k_hw_common(ah);
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struct ieee80211_conf *conf = &common->hw->conf;
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s16 default_nf = ath9k_hw_get_default_nf(ah, chan);
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if (ah->caldata)
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@ -252,7 +250,7 @@ void ath9k_hw_loadnf(struct ath_hw *ah, struct ath9k_channel *chan)
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if (chainmask & (1 << i)) {
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s16 nfval;
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if ((i >= AR5416_MAX_CHAINS) && !conf_is_ht40(conf))
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if ((i >= AR5416_MAX_CHAINS) && !IS_CHAN_HT40(chan))
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continue;
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if (h)
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@ -314,7 +312,7 @@ void ath9k_hw_loadnf(struct ath_hw *ah, struct ath9k_channel *chan)
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ENABLE_REGWRITE_BUFFER(ah);
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for (i = 0; i < NUM_NF_READINGS; i++) {
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if (chainmask & (1 << i)) {
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if ((i >= AR5416_MAX_CHAINS) && !conf_is_ht40(conf))
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if ((i >= AR5416_MAX_CHAINS) && !IS_CHAN_HT40(chan))
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continue;
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val = REG_READ(ah, ah->nf_regs[i]);
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@ -130,29 +130,29 @@ void ath9k_debug_sync_cause(struct ath_common *common, u32 sync_cause)
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static void ath9k_hw_set_clockrate(struct ath_hw *ah)
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{
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struct ieee80211_conf *conf = &ath9k_hw_common(ah)->hw->conf;
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struct ath_common *common = ath9k_hw_common(ah);
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struct ath9k_channel *chan = ah->curchan;
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unsigned int clockrate;
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/* AR9287 v1.3+ uses async FIFO and runs the MAC at 117 MHz */
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if (AR_SREV_9287(ah) && AR_SREV_9287_13_OR_LATER(ah))
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clockrate = 117;
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else if (!ah->curchan) /* should really check for CCK instead */
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else if (!chan) /* should really check for CCK instead */
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clockrate = ATH9K_CLOCK_RATE_CCK;
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else if (conf->chandef.chan->band == IEEE80211_BAND_2GHZ)
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else if (IS_CHAN_2GHZ(chan))
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clockrate = ATH9K_CLOCK_RATE_2GHZ_OFDM;
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else if (ah->caps.hw_caps & ATH9K_HW_CAP_FASTCLOCK)
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clockrate = ATH9K_CLOCK_FAST_RATE_5GHZ_OFDM;
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else
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clockrate = ATH9K_CLOCK_RATE_5GHZ_OFDM;
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if (conf_is_ht40(conf))
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if (IS_CHAN_HT40(chan))
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clockrate *= 2;
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if (ah->curchan) {
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if (IS_CHAN_HALF_RATE(ah->curchan))
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if (IS_CHAN_HALF_RATE(chan))
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clockrate /= 2;
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if (IS_CHAN_QUARTER_RATE(ah->curchan))
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if (IS_CHAN_QUARTER_RATE(chan))
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clockrate /= 4;
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}
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@ -1038,7 +1038,6 @@ static bool ath9k_hw_set_global_txtimeout(struct ath_hw *ah, u32 tu)
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void ath9k_hw_init_global_settings(struct ath_hw *ah)
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{
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struct ath_common *common = ath9k_hw_common(ah);
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struct ieee80211_conf *conf = &common->hw->conf;
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const struct ath9k_channel *chan = ah->curchan;
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int acktimeout, ctstimeout, ack_offset = 0;
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int slottime;
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@ -1113,8 +1112,7 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)
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* BA frames in some implementations, but it has been found to fix ACK
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* timeout issues in other cases as well.
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*/
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if (conf->chandef.chan &&
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conf->chandef.chan->band == IEEE80211_BAND_2GHZ &&
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if (IS_CHAN_2GHZ(chan) &&
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!IS_CHAN_HALF_RATE(chan) && !IS_CHAN_QUARTER_RATE(chan)) {
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acktimeout += 64 - sifstime - ah->slottime;
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ctstimeout += 48 - sifstime - ah->slottime;
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@ -2946,12 +2944,11 @@ void ath9k_hw_set_tsfadjust(struct ath_hw *ah, bool set)
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}
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EXPORT_SYMBOL(ath9k_hw_set_tsfadjust);
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void ath9k_hw_set11nmac2040(struct ath_hw *ah)
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void ath9k_hw_set11nmac2040(struct ath_hw *ah, struct ath9k_channel *chan)
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{
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struct ieee80211_conf *conf = &ath9k_hw_common(ah)->hw->conf;
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u32 macmode;
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if (conf_is_ht40(conf) && !ah->config.cwm_ignore_extcca)
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if (IS_CHAN_HT40(chan) && !ah->config.cwm_ignore_extcca)
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macmode = AR_2040_JOINED_RX_CLEAR;
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else
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macmode = 0;
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@ -1003,7 +1003,7 @@ void ath9k_hw_reset_tsf(struct ath_hw *ah);
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void ath9k_hw_set_tsfadjust(struct ath_hw *ah, bool set);
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void ath9k_hw_init_global_settings(struct ath_hw *ah);
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u32 ar9003_get_pll_sqsum_dvc(struct ath_hw *ah);
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void ath9k_hw_set11nmac2040(struct ath_hw *ah);
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void ath9k_hw_set11nmac2040(struct ath_hw *ah, struct ath9k_channel *chan);
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void ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period);
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void ath9k_hw_set_sta_beacon_timers(struct ath_hw *ah,
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const struct ath9k_beacon_state *bs);
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