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MIPS: __delay ABI-dependent subtraction simplification 

This small update to the previous fix to __delay removes a conditional
around the ABI-dependent subtraction operation within an inline asm in
favor to the standard <asm/asm.h> LONG_SUBU macro.  No change in code
produced.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6703/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Maciej W. Rozycki 2014-04-06 21:42:49 +01:00 committed by Ralf Baechle
parent 06947aaaf9
commit e496453d3e
1 changed files with 3 additions and 5 deletions
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8
arch/mips/lib/delay.c
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@ -11,7 +11,9 @@
#include <linux/module.h> #include <linux/module.h>
#include <linux/param.h> #include <linux/param.h>
#include <linux/smp.h> #include <linux/smp.h>
#include <linux/stringify.h>
#include <asm/asm.h>
#include <asm/compiler.h> #include <asm/compiler.h>
#include <asm/war.h> #include <asm/war.h>
@ -27,11 +29,7 @@ void __delay(unsigned long loops)
" .set noreorder \n" " .set noreorder \n"
" .align 3 \n" " .align 3 \n"
"1: bnez %0, 1b \n" "1: bnez %0, 1b \n"
#if BITS_PER_LONG == 32 " " __stringify(LONG_SUBU) " %0, %1 \n"
" subu %0, %1 \n"
#else
" dsubu %0, %1 \n"
#endif
" .set reorder \n" " .set reorder \n"
: "=r" (loops) : "=r" (loops)
: GCC_DADDI_IMM_ASM() (1), "0" (loops)); : GCC_DADDI_IMM_ASM() (1), "0" (loops));