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pwm: sun4i: Fix incorrect calculation of duty_cycle/period 

[ Upstream commit 50cc7e3e4f ]

Since 5.4-rc1, pwm_apply_state calls ->get_state after ->apply
if available, and this revealed an issue with integer precision
when calculating duty_cycle and period for the currently set
state in ->get_state callback.

This issue manifested in broken backlight on several Allwinner
based devices.

Previously this worked, because ->apply updated the passed state
directly.

Fixes: deb9c462f4 ("pwm: sun4i: Don't update the state for the caller of pwm_apply_state")
Signed-off-by: Ondrej Jirman <megous@megous.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Ondrej Jirman 2019-10-14 15:53:03 +02:00 committed by Greg Kroah-Hartman
parent aff509a3a1
commit e70290bb1f
1 changed files with 2 additions and 2 deletions
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4
drivers/pwm/pwm-sun4i.c
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@ -137,10 +137,10 @@ static void sun4i_pwm_get_state(struct pwm_chip *chip,
val = sun4i_pwm_readl(sun4i_pwm, PWM_CH_PRD(pwm->hwpwm)); val = sun4i_pwm_readl(sun4i_pwm, PWM_CH_PRD(pwm->hwpwm));
tmp = prescaler * NSEC_PER_SEC * PWM_REG_DTY(val); tmp = (u64)prescaler * NSEC_PER_SEC * PWM_REG_DTY(val);
state->duty_cycle = DIV_ROUND_CLOSEST_ULL(tmp, clk_rate); state->duty_cycle = DIV_ROUND_CLOSEST_ULL(tmp, clk_rate);
tmp = prescaler * NSEC_PER_SEC * PWM_REG_PRD(val); tmp = (u64)prescaler * NSEC_PER_SEC * PWM_REG_PRD(val);
state->period = DIV_ROUND_CLOSEST_ULL(tmp, clk_rate); state->period = DIV_ROUND_CLOSEST_ULL(tmp, clk_rate);
} }