From e77166b5a653728f312d07e60a80819d1c54fca4 Mon Sep 17 00:00:00 2001 From: Daniel Vetter Date: Fri, 30 Mar 2012 22:14:05 +0200 Subject: [PATCH] drm/i915: properly clear SSC1 bit in the pch refclock init code Noticed by staring at intel_reg_dumper diffs. Unfortunately it does not seem to completely fix the bug. Still, it's good to get this right, and maybe it helps someplace else. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=47117 Signed-Off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_display.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index ec6ea92da538..91b35fd1db8c 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -5539,7 +5539,8 @@ void ironlake_init_pch_refclk(struct drm_device *dev) if (intel_panel_use_ssc(dev_priv) && can_ssc) { DRM_DEBUG_KMS("Using SSC on panel\n"); temp |= DREF_SSC1_ENABLE; - } + } else + temp &= ~DREF_SSC1_ENABLE; /* Get SSC going before enabling the outputs */ I915_WRITE(PCH_DREF_CONTROL, temp);