net: stmmac: rename GMAC_INT_DEFAULT_MASK for dwmac4
GMAC_INT_DEFAULT_MASK is written to the interrupt enable register. In previous versions of the IP (e.g. dwmac1000), this register was instead an interrupt mask register. To improve clarity and reflect reality, rename GMAC_INT_DEFAULT_MASK to GMAC_INT_DEFAULT_ENABLE. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -98,7 +98,7 @@
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#define GMAC_PCS_IRQ_DEFAULT (GMAC_INT_RGSMIIS | GMAC_INT_PCS_LINK | \
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GMAC_INT_PCS_ANE)
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#define GMAC_INT_DEFAULT_MASK (GMAC_INT_PMT_EN | GMAC_INT_LPI_EN)
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#define GMAC_INT_DEFAULT_ENABLE (GMAC_INT_PMT_EN | GMAC_INT_LPI_EN)
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enum dwmac4_irq_status {
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time_stamp_irq = 0x00001000,
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@ -61,8 +61,8 @@ static void dwmac4_core_init(struct mac_device_info *hw,
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writel(value, ioaddr + GMAC_CONFIG);
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/* Mask GMAC interrupts */
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value = GMAC_INT_DEFAULT_MASK;
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/* Enable GMAC interrupts */
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value = GMAC_INT_DEFAULT_ENABLE;
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if (hw->pmt)
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value |= GMAC_INT_PMT_EN;
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if (hw->pcs)
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