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drm/powerplay: Add smu set xgmi pstate interface 

XGMI pstate is controlled by SMU, driver need this interface to communicate
with SMU

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
shaoyunl 2019-04-11 11:01:07 -04:00 committed by Alex Deucher
parent 3d2aca8c86
commit e911671cd0
2 changed files with 12 additions and 1 deletions
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4
drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
View File

@ -540,6 +540,8 @@ struct smu_funcs
int (*get_fan_speed_percent)(struct smu_context *smu, uint32_t *speed);
int (*set_fan_speed_percent)(struct smu_context *smu, uint32_t speed);
int (*set_fan_speed_rpm)(struct smu_context *smu, uint32_t speed);
int (*set_xgmi_pstate)(struct smu_context *smu, uint32_t pstate);
};
#define smu_init_microcode(smu) \
@ -723,6 +725,8 @@ struct smu_funcs
((smu)->funcs->get_sclk ? (smu)->funcs->get_sclk((smu), (low)) : 0)
#define smu_get_mclk(smu, low) \
((smu)->funcs->get_mclk ? (smu)->funcs->get_mclk((smu), (low)) : 0)
#define smu_set_xgmi_pstate(smu, pstate) \
((smu)->funcs->set_xgmi_pstate ? (smu)->funcs->set_xgmi_pstate((smu), (pstate)) : 0)
extern int smu_get_atom_data_table(struct smu_context *smu, uint32_t table,

9
drivers/gpu/drm/amd/powerplay/smu_v11_0.c
View File

@ -1893,6 +1893,13 @@ set_fan_speed_rpm_failed:
return ret;
}
static int smu_v11_0_set_xgmi_pstate(struct smu_context *smu,
uint32_t pstate)
{
/* send msg to SMU to set pstate */
return 0;
}
static const struct smu_funcs smu_v11_0_funcs = {
.init_microcode = smu_v11_0_init_microcode,
.load_microcode = smu_v11_0_load_microcode,
@ -1947,6 +1954,7 @@ static const struct smu_funcs smu_v11_0_funcs = {
.get_fan_speed_percent = smu_v11_0_get_fan_speed_percent,
.set_fan_speed_percent = smu_v11_0_set_fan_speed_percent,
.set_fan_speed_rpm = smu_v11_0_set_fan_speed_rpm,
.set_xgmi_pstate = smu_v11_0_set_xgmi_pstate,
};
void smu_v11_0_set_smu_funcs(struct smu_context *smu)
@ -1954,7 +1962,6 @@ void smu_v11_0_set_smu_funcs(struct smu_context *smu)
struct amdgpu_device *adev = smu->adev;
smu->funcs = &smu_v11_0_funcs;
switch (adev->asic_type) {
case CHIP_VEGA20:
vega20_set_ppt_funcs(smu);