- pmic wrapper: fix clock handling
- pmic wrapper: fix state machine - pmic wrapper: fix compile dependency -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJVZdd3AAoJELQ5Ylss8dNDNcsQAKlMLoDcMdUM0mL2s5CZNkFz Y93MQ5gZw8uPReRX0ANhrQLeNy9Fh66F6Q5T+kPR8WEuov0hSDbU8EQY269aBGcZ Vgqomoj2TmklP9IFlQZCzA6M4XW+2RqSrrCGrkrghLR2cTdRFCg7Ygj7riavxTfk qT6Acd7bxTG+JrBpdbEr345PQs6JCoBdOqA5kPH2OBveN0zXeh7wa66RuFK4v7uS IadrrgPeHxjjcDcb5th7Cq1v8NoYVwZIK6Z2pMpYUZcZ4O0kYUNhyFeQI5y/0hre 7OGP4+XCVtVxfoOZDKC/d10CZDICtjK1t9yamvWGbx0Kyp+VF92ERWw1cm2WzM0u Bcr5gIMx4xarnSTlvx3d+76kT3kV0XZIE/GNL3UmOFxMSCRD7+Mz0BMDjC13J1gh 840jjz3s6r2UTsytvhnXa6MkkWUMqMr2TpA5x9/t/d/kDTS7wgNyyFqlXyYgmgAr YBAt5xsFUKjjX6026KuiJqDXQAZfUOotI+5Fj7DrZkxcyzt7T1NLc4dKujl9ckc1 QvgZ+yiTEO0qNt7eiG3uiAEvt2s5y41SbuN74OonffIB9zAWRa385JQDBVkrjga7 jORw90fkvilX2aICaKX/R0Rf0LLXGDyXqa7Tc/YBeXoEPLAUjuszMQsyLKshrFYY /uR9kzE2efKafU/422Gb =pyc3 -----END PGP SIGNATURE----- Merge tag 'v4.1-next-soc' of https://github.com/mbgg/linux-mediatek into fixes These are bug fixes for mediatek, fixing code that was recently introduced. - pmic wrapper: fix clock handling - pmic wrapper: fix state machine - pmic wrapper: fix compile dependency * tag 'v4.1-next-soc' of https://github.com/mbgg/linux-mediatek: soc: mediatek: Add compile dependency to pmic-wrapper soc: mediatek: PMIC wrap: Fix register state machine handling soc: mediatek: PMIC wrap: Fix clock rate handling
This commit is contained in:
commit
e9d57102ba
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@ -4,6 +4,7 @@
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config MTK_PMIC_WRAP
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tristate "MediaTek PMIC Wrapper Support"
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depends on ARCH_MEDIATEK
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depends on RESET_CONTROLLER
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select REGMAP
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help
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Say yes here to add support for MediaTek PMIC Wrapper found
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@ -443,11 +443,6 @@ static int pwrap_wait_for_state(struct pmic_wrapper *wrp,
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static int pwrap_write(struct pmic_wrapper *wrp, u32 adr, u32 wdata)
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{
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int ret;
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u32 val;
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val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
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if (PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR)
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pwrap_writel(wrp, 1, PWRAP_WACS2_VLDCLR);
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ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle);
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if (ret)
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@ -462,11 +457,6 @@ static int pwrap_write(struct pmic_wrapper *wrp, u32 adr, u32 wdata)
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static int pwrap_read(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
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{
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int ret;
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u32 val;
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val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
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if (PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR)
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pwrap_writel(wrp, 1, PWRAP_WACS2_VLDCLR);
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ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle);
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if (ret)
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@ -480,6 +470,8 @@ static int pwrap_read(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
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*rdata = PWRAP_GET_WACS_RDATA(pwrap_readl(wrp, PWRAP_WACS2_RDATA));
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pwrap_writel(wrp, 1, PWRAP_WACS2_VLDCLR);
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return 0;
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}
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@ -563,45 +555,17 @@ static int pwrap_init_sidly(struct pmic_wrapper *wrp)
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static int pwrap_init_reg_clock(struct pmic_wrapper *wrp)
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{
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unsigned long rate_spi;
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int ck_mhz;
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rate_spi = clk_get_rate(wrp->clk_spi);
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if (rate_spi > 26000000)
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ck_mhz = 26;
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else if (rate_spi > 18000000)
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ck_mhz = 18;
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else
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ck_mhz = 0;
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switch (ck_mhz) {
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case 18:
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if (pwrap_is_mt8135(wrp))
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pwrap_writel(wrp, 0xc, PWRAP_CSHEXT);
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pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_WRITE);
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pwrap_writel(wrp, 0xc, PWRAP_CSHEXT_READ);
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pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_START);
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pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_END);
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break;
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case 26:
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if (pwrap_is_mt8135(wrp))
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pwrap_writel(wrp, 0x4, PWRAP_CSHEXT);
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if (pwrap_is_mt8135(wrp)) {
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pwrap_writel(wrp, 0x4, PWRAP_CSHEXT);
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pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE);
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pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ);
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pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_START);
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pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_END);
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break;
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case 0:
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if (pwrap_is_mt8135(wrp))
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pwrap_writel(wrp, 0xf, PWRAP_CSHEXT);
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pwrap_writel(wrp, 0xf, PWRAP_CSHEXT_WRITE);
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pwrap_writel(wrp, 0xf, PWRAP_CSHEXT_READ);
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pwrap_writel(wrp, 0xf, PWRAP_CSLEXT_START);
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pwrap_writel(wrp, 0xf, PWRAP_CSLEXT_END);
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break;
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default:
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return -EINVAL;
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} else {
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pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE);
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pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ);
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pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_START);
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pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_END);
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}
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return 0;
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