Staging: SLICOSS: lots of checkpatch fixes

Major cleanups of checkpatch warnings from the slicoss driver.

From: Lior Dotan <liodot@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Lior Dotan 2008-10-04 07:10:28 +03:00 committed by Greg Kroah-Hartman
parent df20d69ec9
commit e9eff9d6a0
13 changed files with 1329 additions and 1595 deletions

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@ -1,14 +1,14 @@
#define MOJAVE_UCODE_VERS_STRING "$Revision: 1.2 $" #define MOJAVE_UCODE_VERS_STRING "1.2"
#define MOJAVE_UCODE_VERS_DATE "$Date: 2006/03/27 15:12:22 $" #define MOJAVE_UCODE_VERS_DATE "2006/03/27 15:12:22"
#define MOJAVE_UCODE_HOSTIF_ID 3 #define MOJAVE_UCODE_HOSTIF_ID 3
static LONG MNumSections = 0x2; static s32 MNumSections = 0x2;
static ULONG MSectionSize[] = static u32 MSectionSize[] =
{ {
0x00008000, 0x00010000, 0x00008000, 0x00010000,
}; };
static ULONG MSectionStart[] = static u32 MSectionStart[] =
{ {
0x00000000, 0x00008000, 0x00000000, 0x00008000,
}; };

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@ -1,7 +1,6 @@
/* /*
* Copyright (c) 1997-2002 Alacritech, Inc. All rights reserved * Copyright (c) 1997-2002 Alacritech, Inc. All rights reserved
* *
* $Id: gbrcvucode.h,v 1.2 2006/03/27 15:12:15 mook Exp $
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions * modification, are permitted provided that the following conditions
@ -32,10 +31,10 @@
* official policies, either expressed or implied, of Alacritech, Inc. * official policies, either expressed or implied, of Alacritech, Inc.
* *
**************************************************************************/ **************************************************************************/
#define GB_RCVUCODE_VERS_STRING "$Revision: 1.2 $" #define GB_RCVUCODE_VERS_STRING "1.2"
#define GB_RCVUCODE_VERS_DATE "$Date: 2006/03/27 15:12:15 $" #define GB_RCVUCODE_VERS_DATE "2006/03/27 15:12:15"
static ULONG GBRcvUCodeLen = 512; static u32 GBRcvUCodeLen = 512;
static u8 GBRcvUCode[2560] = static u8 GBRcvUCode[2560] =
{ {

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@ -1,14 +1,14 @@
#define OASIS_UCODE_VERS_STRING "$Revision: 1.2 $" #define OASIS_UCODE_VERS_STRING "1.2"
#define OASIS_UCODE_VERS_DATE "$Date: 2006/03/27 15:11:22 $" #define OASIS_UCODE_VERS_DATE "2006/03/27 15:11:22"
#define OASIS_UCODE_HOSTIF_ID 3 #define OASIS_UCODE_HOSTIF_ID 3
static LONG ONumSections = 0x2; static s32 ONumSections = 0x2;
static ULONG OSectionSize[] = static u32 OSectionSize[] =
{ {
0x00004000, 0x00010000, 0x00004000, 0x00010000,
}; };
static ULONG OSectionStart[] = static u32 OSectionStart[] =
{ {
0x00000000, 0x00008000, 0x00000000, 0x00008000,
}; };

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@ -1,13 +1,13 @@
#define OASIS_UCODE_VERS_STRING "$Revision: 1.2 $" #define OASIS_UCODE_VERS_STRING "1.2"
#define OASIS_UCODE_VERS_DATE "$Date: 2006/03/27 15:10:37 $" #define OASIS_UCODE_VERS_DATE "2006/03/27 15:10:37"
#define OASIS_UCODE_HOSTIF_ID 3 #define OASIS_UCODE_HOSTIF_ID 3
static LONG ONumSections = 0x2; static s32 ONumSections = 0x2;
static ULONG OSectionSize[] = { static u32 OSectionSize[] = {
0x00004000, 0x00010000, 0x00004000, 0x00010000,
}; };
static ULONG OSectionStart[] = { static u32 OSectionStart[] = {
0x00000000, 0x00008000, 0x00000000, 0x00008000,
}; };

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@ -1,7 +1,7 @@
#define OASIS_RCVUCODE_VERS_STRING "$Revision: 1.2 $" #define OASIS_RCVUCODE_VERS_STRING "1.2"
#define OASIS_RCVUCODE_VERS_DATE "$Date: 2006/03/27 15:10:28 $" #define OASIS_RCVUCODE_VERS_DATE "2006/03/27 15:10:28"
static ULONG OasisRcvUCodeLen = 512; static u32 OasisRcvUCodeLen = 512;
static u8 OasisRcvUCode[2560] = static u8 OasisRcvUCode[2560] =
{ {

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@ -2,7 +2,6 @@
* *
* Copyright (c) 2000-2002 Alacritech, Inc. All rights reserved. * Copyright (c) 2000-2002 Alacritech, Inc. All rights reserved.
* *
* $Id: slic.h,v 1.3 2006/07/14 16:43:02 mook Exp $
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions * modification, are permitted provided that the following conditions
@ -51,14 +50,14 @@ struct slic_spinlock {
#define SLIC_RSPQ_PAGES_GB 10 #define SLIC_RSPQ_PAGES_GB 10
#define SLIC_RSPQ_BUFSINPAGE (PAGE_SIZE / SLIC_RSPBUF_SIZE) #define SLIC_RSPQ_BUFSINPAGE (PAGE_SIZE / SLIC_RSPBUF_SIZE)
typedef struct _slic_rspqueue_t { struct slic_rspqueue {
ulong32 offset; u32 offset;
ulong32 pageindex; u32 pageindex;
ulong32 num_pages; u32 num_pages;
p_slic_rspbuf_t rspbuf; struct slic_rspbuf *rspbuf;
pulong32 vaddr[SLIC_RSPQ_PAGES_GB]; u32 *vaddr[SLIC_RSPQ_PAGES_GB];
dma_addr_t paddr[SLIC_RSPQ_PAGES_GB]; dma_addr_t paddr[SLIC_RSPQ_PAGES_GB];
} slic_rspqueue_t, *p_slic_rspqueue_t; };
#define SLIC_RCVQ_EXPANSION 1 #define SLIC_RCVQ_EXPANSION 1
#define SLIC_RCVQ_ENTRIES (256 * SLIC_RCVQ_EXPANSION) #define SLIC_RCVQ_ENTRIES (256 * SLIC_RCVQ_EXPANSION)
@ -68,45 +67,45 @@ typedef struct _slic_rspqueue_t {
#define SLIC_RCVQ_FILLENTRIES (16 * SLIC_RCVQ_EXPANSION) #define SLIC_RCVQ_FILLENTRIES (16 * SLIC_RCVQ_EXPANSION)
#define SLIC_RCVQ_FILLTHRESH (SLIC_RCVQ_ENTRIES - SLIC_RCVQ_FILLENTRIES) #define SLIC_RCVQ_FILLTHRESH (SLIC_RCVQ_ENTRIES - SLIC_RCVQ_FILLENTRIES)
typedef struct _slic_rcvqueue_t { struct slic_rcvqueue {
struct sk_buff *head; struct sk_buff *head;
struct sk_buff *tail; struct sk_buff *tail;
ulong32 count; u32 count;
ulong32 size; u32 size;
ulong32 errors; u32 errors;
} slic_rcvqueue_t, *p_slic_rcvqueue_t; };
typedef struct _slic_rcvbuf_info_t { struct slic_rcvbuf_info {
ulong32 id; u32 id;
ulong32 starttime; u32 starttime;
ulong32 stoptime; u32 stoptime;
ulong32 slicworld; u32 slicworld;
ulong32 lasttime; u32 lasttime;
ulong32 lastid; u32 lastid;
} slic_rcvbuf_info_t, *pslic_rcvbuf_info_t; };
/* /*
SLIC Handle structure. Used to restrict handle values to SLIC Handle structure. Used to restrict handle values to
32 bits by using an index rather than an address. 32 bits by using an index rather than an address.
Simplifies ucode in 64-bit systems Simplifies ucode in 64-bit systems
*/ */
typedef struct _slic_handle_word_t { struct slic_handle_word {
union { union {
struct { struct {
ushort index; ushort index;
ushort bottombits; /* to denote num bufs to card */ ushort bottombits; /* to denote num bufs to card */
} parts; } parts;
ulong32 whole; u32 whole;
} handle; } handle;
} slic_handle_word_t, *pslic_handle_word_t; };
typedef struct _slic_handle_t { struct slic_handle {
slic_handle_word_t token; /* token passed between host and card*/ struct slic_handle_word token; /* token passed between host and card*/
ushort type; ushort type;
pvoid address; /* actual address of the object*/ void *address; /* actual address of the object*/
ushort offset; ushort offset;
struct _slic_handle_t *other_handle; struct slic_handle *other_handle;
struct _slic_handle_t *next; struct slic_handle *next;
} slic_handle_t, *pslic_handle_t; };
#define SLIC_HANDLE_FREE 0x0000 #define SLIC_HANDLE_FREE 0x0000
#define SLIC_HANDLE_DATA 0x0001 #define SLIC_HANDLE_DATA 0x0001
@ -120,19 +119,19 @@ typedef struct _slic_handle_t {
#define SLIC_HOSTCMD_SIZE 512 #define SLIC_HOSTCMD_SIZE 512
typedef struct _slic_hostcmd_t { struct slic_hostcmd {
slic_host64_cmd_t cmd64; struct slic_host64_cmd cmd64;
ulong32 type; u32 type;
struct sk_buff *skb; struct sk_buff *skb;
ulong32 paddrl; u32 paddrl;
ulong32 paddrh; u32 paddrh;
ulong32 busy; u32 busy;
ulong32 cmdsize; u32 cmdsize;
ushort numbufs; ushort numbufs;
pslic_handle_t pslic_handle;/* handle associated with command */ struct slic_handle *pslic_handle;/* handle associated with command */
struct _slic_hostcmd_t *next; struct slic_hostcmd *next;
struct _slic_hostcmd_t *next_all; struct slic_hostcmd *next_all;
} slic_hostcmd_t, *p_slic_hostcmd_t; };
#define SLIC_CMDQ_CMDSINPAGE (PAGE_SIZE / SLIC_HOSTCMD_SIZE) #define SLIC_CMDQ_CMDSINPAGE (PAGE_SIZE / SLIC_HOSTCMD_SIZE)
#define SLIC_CMD_DUMB 3 #define SLIC_CMD_DUMB 3
@ -142,18 +141,18 @@ typedef struct _slic_hostcmd_t {
#define SLIC_CMDQ_MAXPAGES (SLIC_CMDQ_MAXCMDS / SLIC_CMDQ_CMDSINPAGE) #define SLIC_CMDQ_MAXPAGES (SLIC_CMDQ_MAXCMDS / SLIC_CMDQ_CMDSINPAGE)
#define SLIC_CMDQ_INITPAGES (SLIC_CMDQ_INITCMDS / SLIC_CMDQ_CMDSINPAGE) #define SLIC_CMDQ_INITPAGES (SLIC_CMDQ_INITCMDS / SLIC_CMDQ_CMDSINPAGE)
typedef struct _slic_cmdqmem_t { struct slic_cmdqmem {
int pagecnt; int pagecnt;
pulong32 pages[SLIC_CMDQ_MAXPAGES]; u32 *pages[SLIC_CMDQ_MAXPAGES];
dma_addr_t dma_pages[SLIC_CMDQ_MAXPAGES]; dma_addr_t dma_pages[SLIC_CMDQ_MAXPAGES];
} slic_cmdqmem_t, *p_slic_cmdqmem_t; };
typedef struct _slic_cmdqueue_t { struct slic_cmdqueue {
p_slic_hostcmd_t head; struct slic_hostcmd *head;
p_slic_hostcmd_t tail; struct slic_hostcmd *tail;
int count; int count;
struct slic_spinlock lock; struct slic_spinlock lock;
} slic_cmdqueue_t, *p_slic_cmdqueue_t; };
#ifdef STATUS_SUCCESS #ifdef STATUS_SUCCESS
#undef STATUS_SUCCESS #undef STATUS_SUCCESS
@ -181,10 +180,10 @@ just set this at 15K, shouldnt make that much of a diff.
#endif #endif
typedef struct _mcast_address_t { struct mcast_address {
uchar address[6]; unsigned char address[6];
struct _mcast_address_t *next; struct mcast_address *next;
} mcast_address_t, *p_mcast_address_t; };
#define CARD_DOWN 0x00000000 #define CARD_DOWN 0x00000000
#define CARD_UP 0x00000001 #define CARD_UP 0x00000001
@ -236,38 +235,37 @@ typedef struct _mcast_address_t {
#define SLIC_ADAPTER_STATE(x) ((x == ADAPT_UP) ? "UP" : "Down") #define SLIC_ADAPTER_STATE(x) ((x == ADAPT_UP) ? "UP" : "Down")
#define SLIC_CARD_STATE(x) ((x == CARD_UP) ? "UP" : "Down") #define SLIC_CARD_STATE(x) ((x == CARD_UP) ? "UP" : "Down")
typedef struct _slic_iface_stats { struct slic_iface_stats {
/* /*
* Stats * Stats
*/ */
ulong64 xmt_bytes; u64 xmt_bytes;
ulong64 xmt_ucast; u64 xmt_ucast;
ulong64 xmt_mcast; u64 xmt_mcast;
ulong64 xmt_bcast; u64 xmt_bcast;
ulong64 xmt_errors; u64 xmt_errors;
ulong64 xmt_discards; u64 xmt_discards;
ulong64 xmit_collisions; u64 xmit_collisions;
ulong64 xmit_excess_xmit_collisions; u64 xmit_excess_xmit_collisions;
ulong64 rcv_bytes; u64 rcv_bytes;
ulong64 rcv_ucast; u64 rcv_ucast;
ulong64 rcv_mcast; u64 rcv_mcast;
ulong64 rcv_bcast; u64 rcv_bcast;
ulong64 rcv_errors; u64 rcv_errors;
ulong64 rcv_discards; u64 rcv_discards;
} slic_iface_stats_t, *p_slic_iface_stats_t; };
typedef struct _slic_tcp_stats { struct sliccp_stats {
ulong64 xmit_tcp_segs; u64 xmit_tcp_segs;
ulong64 xmit_tcp_bytes; u64 xmit_tcp_bytes;
ulong64 rcv_tcp_segs; u64 rcv_tcp_segs;
ulong64 rcv_tcp_bytes; u64 rcv_tcp_bytes;
} slic_tcp_stats_t, *p_slic_tcp_stats_t; };
typedef struct _slicnet_stats { struct slicnet_stats {
slic_tcp_stats_t tcp; struct sliccp_stats tcp;
slic_iface_stats_t iface; struct slic_iface_stats iface;
};
} slicnet_stats_t, *p_slicnet_stats_t;
#define SLIC_LOADTIMER_PERIOD 1 #define SLIC_LOADTIMER_PERIOD 1
#define SLIC_INTAGG_DEFAULT 200 #define SLIC_INTAGG_DEFAULT 200
@ -294,13 +292,13 @@ typedef struct _slicnet_stats {
#define SLIC_INTAGG_4GB 100 #define SLIC_INTAGG_4GB 100
#define SLIC_INTAGG_5GB 100 #define SLIC_INTAGG_5GB 100
typedef struct _ether_header { struct ether_header {
uchar ether_dhost[6]; unsigned char ether_dhost[6];
uchar ether_shost[6]; unsigned char ether_shost[6];
ushort ether_type; ushort ether_type;
} ether_header, *p_ether_header; };
typedef struct _sliccard_t { struct sliccard {
uint busnumber; uint busnumber;
uint slotnumber; uint slotnumber;
uint state; uint state;
@ -310,114 +308,111 @@ typedef struct _sliccard_t {
uint adapters_allocated; uint adapters_allocated;
uint adapters_sleeping; uint adapters_sleeping;
uint gennumber; uint gennumber;
ulong32 events; u32 events;
ulong32 loadlevel_current; u32 loadlevel_current;
ulong32 load; u32 load;
uint reset_in_progress; uint reset_in_progress;
ulong32 pingstatus; u32 pingstatus;
ulong32 bad_pingstatus; u32 bad_pingstatus;
struct timer_list loadtimer; struct timer_list loadtimer;
ulong32 loadtimerset; u32 loadtimerset;
uint config_set; uint config_set;
slic_config_t config; struct slic_config config;
struct dentry *debugfs_dir; struct dentry *debugfs_dir;
struct dentry *debugfs_cardinfo; struct dentry *debugfs_cardinfo;
struct _adapter_t *master; struct adapter *master;
struct _adapter_t *adapter[SLIC_MAX_PORTS]; struct adapter *adapter[SLIC_MAX_PORTS];
struct _sliccard_t *next; struct sliccard *next;
ulong32 error_interrupts; u32 error_interrupts;
ulong32 error_rmiss_interrupts; u32 error_rmiss_interrupts;
ulong32 rcv_interrupts; u32 rcv_interrupts;
ulong32 xmit_interrupts; u32 xmit_interrupts;
ulong32 num_isrs; u32 num_isrs;
ulong32 false_interrupts; u32 false_interrupts;
ulong32 max_isr_rcvs; u32 max_isr_rcvs;
ulong32 max_isr_xmits; u32 max_isr_xmits;
ulong32 rcv_interrupt_yields; u32 rcv_interrupt_yields;
ulong32 tx_packets; u32 tx_packets;
#if SLIC_DUMP_ENABLED #if SLIC_DUMP_ENABLED
ulong32 dumpstatus; /* Result of dump UPR */ u32 dumpstatus; /* Result of dump UPR */
pvoid cmdbuffer; void *cmdbuffer;
ulong cmdbuffer_phys; ulong cmdbuffer_phys;
ulong32 cmdbuffer_physl; u32 cmdbuffer_physl;
ulong32 cmdbuffer_physh; u32 cmdbuffer_physh;
ulong32 dump_count; u32 dump_count;
struct task_struct *dump_task_id; struct task_struct *dump_task_id;
ulong32 dump_wait_count; u32 dump_wait_count;
uint dumpthread_running; /* has a dump thread been init'd */ uint dumpthread_running; /* has a dump thread been init'd */
uint dump_requested; /* 0 no, 1 = reqstd 2=curr 3=done */ uint dump_requested; /* 0 no, 1 = reqstd 2=curr 3=done */
ulong32 dumptime_start; u32 dumptime_start;
ulong32 dumptime_complete; u32 dumptime_complete;
ulong32 dumptime_delta; u32 dumptime_delta;
pvoid dumpbuffer; void *dumpbuffer;
ulong dumpbuffer_phys; ulong dumpbuffer_phys;
ulong32 dumpbuffer_physl; u32 dumpbuffer_physl;
ulong32 dumpbuffer_physh; u32 dumpbuffer_physh;
wait_queue_head_t dump_wq; wait_queue_head_t dump_wq;
struct file *dumphandle; struct file *dumphandle;
mm_segment_t dumpfile_fs; mm_segment_t dumpfile_fs;
#endif #endif
ulong32 debug_ix; u32 debug_ix;
ushort reg_type[32]; ushort reg_type[32];
ushort reg_offset[32]; ushort reg_offset[32];
ulong32 reg_value[32]; u32 reg_value[32];
ulong32 reg_valueh[32]; u32 reg_valueh[32];
} sliccard_t, *p_sliccard_t; };
#define NUM_CFG_SPACES 2 #define NUM_CFG_SPACES 2
#define NUM_CFG_REGS 64 #define NUM_CFG_REGS 64
#define NUM_CFG_REG_ULONGS (NUM_CFG_REGS / sizeof(ulong32)) #define NUM_CFG_REG_ULONGS (NUM_CFG_REGS / sizeof(u32))
typedef struct _physcard_t { struct physcard {
struct _adapter_t *adapter[SLIC_MAX_PORTS]; struct adapter *adapter[SLIC_MAX_PORTS];
struct _physcard_t *next; struct physcard *next;
uint adapters_allocd; uint adapters_allocd;
/* the following is not currently needed /* the following is not currently needed
ulong32 bridge_busnum; u32 bridge_busnum;
ulong32 bridge_cfg[NUM_CFG_SPACES][NUM_CFG_REG_ULONGS]; u32 bridge_cfg[NUM_CFG_SPACES][NUM_CFG_REG_ULONGS];
*/ */
} physcard_t, *p_physcard_t; };
typedef struct _base_driver { struct base_driver {
struct slic_spinlock driver_lock; struct slic_spinlock driver_lock;
ulong32 num_slic_cards; u32 num_slic_cards;
ulong32 num_slic_ports; u32 num_slic_ports;
ulong32 num_slic_ports_active; u32 num_slic_ports_active;
ulong32 dynamic_intagg; u32 dynamic_intagg;
p_sliccard_t slic_card; struct sliccard *slic_card;
p_physcard_t phys_card; struct physcard *phys_card;
uint cardnuminuse[SLIC_MAX_CARDS]; uint cardnuminuse[SLIC_MAX_CARDS];
} base_driver_t, *p_base_driver_t; };
extern base_driver_t slic_global; struct slic_shmem {
volatile u32 isr;
volatile u32 linkstatus;
volatile struct slic_stats inicstats;
};
typedef struct _slic_shmem_t { struct slic_reg_params {
volatile ulong32 isr; u32 linkspeed;
volatile ulong32 linkstatus; u32 linkduplex;
volatile slic_stats_t inicstats; u32 fail_on_bad_eeprom;
} slic_shmem_t, *p_slic_shmem_t; };
typedef struct _slic_reg_params_t { struct slic_upr {
ulong32 linkspeed; uint adapter;
ulong32 linkduplex; u32 upr_request;
ulong32 fail_on_bad_eeprom; u32 upr_data;
} slic_reg_params_t, *p_reg_params_t; u32 upr_data_h;
u32 upr_buffer;
u32 upr_buffer_h;
struct slic_upr *next;
};
typedef struct _slic_upr_t { struct slic_ifevents {
uint adapter;
ulong32 upr_request;
ulong32 upr_data;
ulong32 upr_data_h;
ulong32 upr_buffer;
ulong32 upr_buffer_h;
struct _slic_upr_t *next;
} slic_upr_t, *p_slic_upr_t;
typedef struct _slic_ifevents_ti {
uint oflow802; uint oflow802;
uint uflow802; uint uflow802;
uint Tprtoflow; uint Tprtoflow;
@ -434,19 +429,19 @@ typedef struct _slic_ifevents_ti {
uint IpCsum; uint IpCsum;
uint TpCsum; uint TpCsum;
uint TpHlen; uint TpHlen;
} slic_ifevents_t; };
typedef struct _adapter_t { struct adapter {
pvoid ifp; void *ifp;
p_sliccard_t card; struct sliccard *card;
uint port; uint port;
p_physcard_t physcard; struct physcard *physcard;
uint physport; uint physport;
uint cardindex; uint cardindex;
uint card_size; uint card_size;
uint chipid; uint chipid;
struct net_device *netdev; struct net_device *netdev;
struct net_device *next_netdevice; struct net_device *next_netdevice;
struct slic_spinlock adapter_lock; struct slic_spinlock adapter_lock;
struct slic_spinlock reset_lock; struct slic_spinlock reset_lock;
struct pci_dev *pcidev; struct pci_dev *pcidev;
@ -456,90 +451,90 @@ typedef struct _adapter_t {
ushort vendid; ushort vendid;
ushort devid; ushort devid;
ushort subsysid; ushort subsysid;
ulong32 irq; u32 irq;
void __iomem *memorybase; void __iomem *memorybase;
ulong32 memorylength; u32 memorylength;
ulong32 drambase; u32 drambase;
ulong32 dramlength; u32 dramlength;
uint queues_initialized; uint queues_initialized;
uint allocated; uint allocated;
uint activated; uint activated;
ulong32 intrregistered; u32 intrregistered;
uint isp_initialized; uint isp_initialized;
uint gennumber; uint gennumber;
ulong32 curaddrupper; u32 curaddrupper;
p_slic_shmem_t pshmem; struct slic_shmem *pshmem;
dma_addr_t phys_shmem; dma_addr_t phys_shmem;
ulong32 isrcopy; u32 isrcopy;
p_slic_regs_t slic_regs; __iomem struct slic_regs *slic_regs;
uchar state; unsigned char state;
uchar linkstate; unsigned char linkstate;
uchar linkspeed; unsigned char linkspeed;
uchar linkduplex; unsigned char linkduplex;
uint flags; uint flags;
uchar macaddr[6]; unsigned char macaddr[6];
uchar currmacaddr[6]; unsigned char currmacaddr[6];
ulong32 macopts; u32 macopts;
ushort devflags_prev; ushort devflags_prev;
ulong64 mcastmask; u64 mcastmask;
p_mcast_address_t mcastaddrs; struct mcast_address *mcastaddrs;
p_slic_upr_t upr_list; struct slic_upr *upr_list;
uint upr_busy; uint upr_busy;
struct timer_list pingtimer; struct timer_list pingtimer;
ulong32 pingtimerset; u32 pingtimerset;
struct timer_list statstimer; struct timer_list statstimer;
ulong32 statstimerset; u32 statstimerset;
struct timer_list loadtimer; struct timer_list loadtimer;
ulong32 loadtimerset; u32 loadtimerset;
struct dentry *debugfs_entry; struct dentry *debugfs_entry;
struct slic_spinlock upr_lock; struct slic_spinlock upr_lock;
struct slic_spinlock bit64reglock; struct slic_spinlock bit64reglock;
slic_rspqueue_t rspqueue; struct slic_rspqueue rspqueue;
slic_rcvqueue_t rcvqueue; struct slic_rcvqueue rcvqueue;
slic_cmdqueue_t cmdq_free; struct slic_cmdqueue cmdq_free;
slic_cmdqueue_t cmdq_done; struct slic_cmdqueue cmdq_done;
slic_cmdqueue_t cmdq_all; struct slic_cmdqueue cmdq_all;
slic_cmdqmem_t cmdqmem; struct slic_cmdqmem cmdqmem;
/* /*
* SLIC Handles * SLIC Handles
*/ */
slic_handle_t slic_handles[SLIC_CMDQ_MAXCMDS+1]; /* Object handles*/ struct slic_handle slic_handles[SLIC_CMDQ_MAXCMDS+1]; /* Object handles*/
pslic_handle_t pfree_slic_handles; /* Free object handles*/ struct slic_handle *pfree_slic_handles; /* Free object handles*/
struct slic_spinlock handle_lock; /* Object handle list lock*/ struct slic_spinlock handle_lock; /* Object handle list lock*/
ushort slic_handle_ix; ushort slic_handle_ix;
ulong32 xmitq_full; u32 xmitq_full;
ulong32 all_reg_writes; u32 all_reg_writes;
ulong32 icr_reg_writes; u32 icr_reg_writes;
ulong32 isr_reg_writes; u32 isr_reg_writes;
ulong32 error_interrupts; u32 error_interrupts;
ulong32 error_rmiss_interrupts; u32 error_rmiss_interrupts;
ulong32 rx_errors; u32 rx_errors;
ulong32 rcv_drops; u32 rcv_drops;
ulong32 rcv_interrupts; u32 rcv_interrupts;
ulong32 xmit_interrupts; u32 xmit_interrupts;
ulong32 linkevent_interrupts; u32 linkevent_interrupts;
ulong32 upr_interrupts; u32 upr_interrupts;
ulong32 num_isrs; u32 num_isrs;
ulong32 false_interrupts; u32 false_interrupts;
ulong32 tx_packets; u32 tx_packets;
ulong32 xmit_completes; u32 xmit_completes;
ulong32 tx_drops; u32 tx_drops;
ulong32 rcv_broadcasts; u32 rcv_broadcasts;
ulong32 rcv_multicasts; u32 rcv_multicasts;
ulong32 rcv_unicasts; u32 rcv_unicasts;
ulong32 max_isr_rcvs; u32 max_isr_rcvs;
ulong32 max_isr_xmits; u32 max_isr_xmits;
ulong32 rcv_interrupt_yields; u32 rcv_interrupt_yields;
ulong32 intagg_period; u32 intagg_period;
p_inicpm_state_t inicpm_info; struct inicpm_state *inicpm_info;
pvoid pinicpm_info; void *pinicpm_info;
slic_reg_params_t reg_params; struct slic_reg_params reg_params;
slic_ifevents_t if_events; struct slic_ifevents if_events;
slic_stats_t inicstats_prev; struct slic_stats inicstats_prev;
slicnet_stats_t slic_stats; struct slicnet_stats slic_stats;
struct net_device_stats stats; struct net_device_stats stats;
} adapter_t, *p_adapter_t; };
#if SLIC_DUMP_ENABLED #if SLIC_DUMP_ENABLED
#define SLIC_DUMP_REQUESTED 1 #define SLIC_DUMP_REQUESTED 1
@ -552,10 +547,10 @@ typedef struct _adapter_t {
* structure is written out to the card's SRAM when the microcode panic's. * structure is written out to the card's SRAM when the microcode panic's.
* *
****************************************************************************/ ****************************************************************************/
typedef struct _slic_crash_info { struct slic_crash_info {
ushort cpu_id; ushort cpu_id;
ushort crash_pc; ushort crash_pc;
} slic_crash_info, *p_slic_crash_info; };
#define CRASH_INFO_OFFSET 0x155C #define CRASH_INFO_OFFSET 0x155C
@ -577,20 +572,20 @@ typedef struct _slic_crash_info {
#define ETHER_EQ_ADDR(_AddrA, _AddrB, _Result) \ #define ETHER_EQ_ADDR(_AddrA, _AddrB, _Result) \
{ \ { \
_Result = TRUE; \ _Result = TRUE; \
if (*(pulong32)(_AddrA) != *(pulong32)(_AddrB)) \ if (*(u32 *)(_AddrA) != *(u32 *)(_AddrB)) \
_Result = FALSE; \ _Result = FALSE; \
if (*(pushort)(&((_AddrA)[4])) != *(pushort)(&((_AddrB)[4]))) \ if (*(u16 *)(&((_AddrA)[4])) != *(u16 *)(&((_AddrB)[4]))) \
_Result = FALSE; \ _Result = FALSE; \
} }
#if defined(CONFIG_X86_64) || defined(CONFIG_IA64) #if defined(CONFIG_X86_64) || defined(CONFIG_IA64)
#define SLIC_GET_ADDR_LOW(_addr) (ulong32)((ulong64)(_addr) & \ #define SLIC_GET_ADDR_LOW(_addr) (u32)((u64)(_addr) & \
0x00000000FFFFFFFF) 0x00000000FFFFFFFF)
#define SLIC_GET_ADDR_HIGH(_addr) (ulong32)(((ulong64)(_addr) >> 32) & \ #define SLIC_GET_ADDR_HIGH(_addr) (u32)(((u64)(_addr) >> 32) & \
0x00000000FFFFFFFF) 0x00000000FFFFFFFF)
#else #else
#define SLIC_GET_ADDR_LOW(_addr) (ulong32)_addr #define SLIC_GET_ADDR_LOW(_addr) (u32)_addr
#define SLIC_GET_ADDR_HIGH(_addr) (ulong32)0 #define SLIC_GET_ADDR_HIGH(_addr) (u32)0
#endif #endif
#define FLUSH TRUE #define FLUSH TRUE

View File

@ -2,7 +2,6 @@
* *
* Copyright (c)2000-2002 Alacritech, Inc. All rights reserved. * Copyright (c)2000-2002 Alacritech, Inc. All rights reserved.
* *
* $Id: slic_os.h,v 1.2 2006/03/27 15:10:15 mook Exp $
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions * modification, are permitted provided that the following conditions
@ -43,87 +42,9 @@
#ifndef _SLIC_OS_SPECIFIC_H_ #ifndef _SLIC_OS_SPECIFIC_H_
#define _SLIC_OS_SPECIFIC_H_ #define _SLIC_OS_SPECIFIC_H_
typedef unsigned char uchar;
typedef u64 ulong64;
typedef char *pchar;
typedef unsigned char *puchar;
typedef u16 *pushort;
typedef u32 ulong32;
typedef u32 *pulong32;
typedef int *plong32;
typedef unsigned int *puint;
typedef void *pvoid;
typedef unsigned long *pulong;
typedef unsigned int boolean;
typedef unsigned int wchar;
typedef unsigned int *pwchar;
typedef unsigned char UCHAR;
typedef u32 ULONG;
typedef s32 LONG;
#define FALSE (0) #define FALSE (0)
#define TRUE (1) #define TRUE (1)
#define SLIC_INIT_SPINLOCK(x) \
{ \
spin_lock_init(&((x).lock)); \
}
#define SLIC_ACQUIRE_SPINLOCK(x) \
{ \
spin_lock(&((x).lock)); \
}
#define SLIC_RELEASE_SPINLOCK(x) \
{ \
spin_unlock(&((x).lock)); \
}
#define SLIC_ACQUIRE_IRQ_SPINLOCK(x) \
{ \
spin_lock_irqsave(&((x).lock), (x).flags); \
}
#define SLIC_RELEASE_IRQ_SPINLOCK(x) \
{ \
spin_unlock_irqrestore(&((x).lock), (x).flags); \
}
#define ATK_DEBUG 1
#if ATK_DEBUG
#define SLIC_TIMESTAMP(value) { \
struct timeval timev; \
do_gettimeofday(&timev); \
value = timev.tv_sec*1000000 + timev.tv_usec; \
}
#else
#define SLIC_TIMESTAMP(value)
#endif
#define SLIC_ALLOCATE_MEM(len, flag) kmalloc(len, flag)
#define SLIC_DEALLOCATE_MEM(mem) kfree(mem)
#define SLIC_DEALLOCATE_IRQ_MEM(mem) free(mem)
#define SLIC_ALLOCATE_PAGE(x) (pulong32)get_free_page(GFP_KERNEL)
#define SLIC_DEALLOCATE_PAGE(addr) free_page((ulong32)addr)
#define SLIC_ALLOCATE_PCIMEM(a, sz, physp) \
pci_alloc_consistent((a)->pcidev, (sz), &(physp))
#define SLIC_DEALLOCATE_PCIMEM(a, sz, vp, pp) \
pci_free_consistent((a)->pcidev, (sz), (vp), (pp))
#define SLIC_GET_PHYSICAL_ADDRESS(addr) virt_to_bus((addr))
#define SLIC_GET_PHYSICAL_ADDRESS_HIGH(addr) 0
#define SLIC_GET_DMA_ADDRESS_WRITE(a, ptr, sz) \
pci_map_single((a)->pcidev, (ptr), (sz), PCI_DMA_TODEVICE)
#define SLIC_GET_DMA_ADDRESS_READ(a, ptr, sz) \
pci_map_single((a)->pcidev, (ptr), (sz), PCI_DMA_FROMDEVICE)
#define SLIC_UNGET_DMA_ADDRESS_WRITE(a, pa, sz) \
pci_unmap_single((a)->pcidev, (pa), (sz), PCI_DMA_TODEVICE)
#define SLIC_UNGET_DMA_ADDRESS_READ(a, pa, sz) \
pci_unmap_single((a)->pcidev, (pa), (sz), PCI_DMA_FROMDEVICE)
#define SLIC_ZERO_MEMORY(p, sz) memset((p), 0, (sz))
#define SLIC_EQUAL_MEMORY(src1, src2, len) (!memcmp(src1, src2, len))
#define SLIC_MOVE_MEMORY(dst, src, len) memcpy((dst), (src), (len))
#define SLIC_SECS_TO_JIFFS(x) ((x) * HZ) #define SLIC_SECS_TO_JIFFS(x) ((x) * HZ)
#define SLIC_MS_TO_JIFFIES(x) (SLIC_SECS_TO_JIFFS((x)) / 1000) #define SLIC_MS_TO_JIFFIES(x) (SLIC_SECS_TO_JIFFS((x)) / 1000)
@ -132,7 +53,7 @@ typedef s32 LONG;
{ \ { \
adapter->card->reg_type[adapter->card->debug_ix] = 0; \ adapter->card->reg_type[adapter->card->debug_ix] = 0; \
adapter->card->reg_offset[adapter->card->debug_ix] = \ adapter->card->reg_offset[adapter->card->debug_ix] = \
((puchar)(&reg)) - ((puchar)adapter->slic_regs); \ ((unsigned char *)(&reg)) - ((unsigned char *)adapter->slic_regs); \
adapter->card->reg_value[adapter->card->debug_ix++] = value; \ adapter->card->reg_value[adapter->card->debug_ix++] = value; \
if (adapter->card->debug_ix == 32) \ if (adapter->card->debug_ix == 32) \
adapter->card->debug_ix = 0; \ adapter->card->debug_ix = 0; \
@ -142,7 +63,7 @@ typedef s32 LONG;
{ \ { \
adapter->card->reg_type[adapter->card->debug_ix] = 1; \ adapter->card->reg_type[adapter->card->debug_ix] = 1; \
adapter->card->reg_offset[adapter->card->debug_ix] = \ adapter->card->reg_offset[adapter->card->debug_ix] = \
((puchar)(&reg)) - ((puchar)adapter->slic_regs); \ ((unsigned char *)(&reg)) - ((unsigned char *)adapter->slic_regs); \
adapter->card->reg_value[adapter->card->debug_ix] = value; \ adapter->card->reg_value[adapter->card->debug_ix] = value; \
adapter->card->reg_valueh[adapter->card->debug_ix++] = valh; \ adapter->card->reg_valueh[adapter->card->debug_ix++] = valh; \
if (adapter->card->debug_ix == 32) \ if (adapter->card->debug_ix == 32) \
@ -156,8 +77,6 @@ typedef s32 LONG;
#define WRITE_REG64(a, reg, value, regh, valh, flush) \ #define WRITE_REG64(a, reg, value, regh, valh, flush) \
slic_reg64_write((a), (&reg), (value), (&regh), (valh), (flush)) slic_reg64_write((a), (&reg), (value), (&regh), (valh), (flush))
#endif #endif
#define READ_REG(reg, flush) slic_reg32_read((&reg), (flush))
#define READ_REGP16(reg, flush) slic_reg16_read((&reg), (flush))
#endif /* _SLIC_OS_SPECIFIC_H_ */ #endif /* _SLIC_OS_SPECIFIC_H_ */

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@ -2,7 +2,6 @@
* *
* Copyright (c) 2000-2002 Alacritech, Inc. All rights reserved. * Copyright (c) 2000-2002 Alacritech, Inc. All rights reserved.
* *
* $Id: slicbuild.h,v 1.2 2006/03/27 15:10:10 mook Exp $
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions * modification, are permitted provided that the following conditions

View File

@ -2,7 +2,6 @@
* *
* Copyright (c) 2000-2002 Alacritech, Inc. All rights reserved. * Copyright (c) 2000-2002 Alacritech, Inc. All rights reserved.
* *
* $Id: slicdbg.h,v 1.2 2006/03/27 15:10:04 mook Exp $
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions * modification, are permitted provided that the following conditions
@ -66,7 +65,7 @@
#ifdef CONFIG_X86_64 #ifdef CONFIG_X86_64
#define VALID_ADDRESS(p) (1) #define VALID_ADDRESS(p) (1)
#else #else
#define VALID_ADDRESS(p) (((ulong32)(p) & 0x80000000) || ((ulong32)(p) == 0)) #define VALID_ADDRESS(p) (((u32)(p) & 0x80000000) || ((u32)(p) == 0))
#endif #endif
#ifndef ASSERT #ifndef ASSERT
#define ASSERT(a) \ #define ASSERT(a) \

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@ -1,5 +1,4 @@
/* /*
* $Id: slicdump.h,v 1.2 2006/03/27 15:09:57 mook Exp $
* *
* Copyright (c) 2000-2002 Alacritech, Inc. All rights reserved. * Copyright (c) 2000-2002 Alacritech, Inc. All rights reserved.
* *
@ -148,32 +147,32 @@
/* /*
* Break and Reset Break command structure * Break and Reset Break command structure
*/ */
typedef struct _BREAK { struct BREAK {
uchar command; /* Command word defined above */ unsigned char command; /* Command word defined above */
uchar resvd; unsigned char resvd;
ushort count; /* Number of executions before break */ ushort count; /* Number of executions before break */
ulong32 addr; /* Address of break point */ u32 addr; /* Address of break point */
} BREAK, *PBREAK; };
/* /*
* Dump and Load command structure * Dump and Load command structure
*/ */
typedef struct _dump_cmd { struct dump_cmd {
uchar cmd; /* Command word defined above */ unsigned char cmd; /* Command word defined above */
uchar desc; /* Descriptor values - defined below */ unsigned char desc; /* Descriptor values - defined below */
ushort count; /* number of 4 byte words to be transferred */ ushort count; /* number of 4 byte words to be transferred */
ulong32 addr; /* start address of dump or load */ u32 addr; /* start address of dump or load */
} dump_cmd_t, *pdump_cmd_t; };
/* /*
* Receive or Transmit a frame. * Receive or Transmit a frame.
*/ */
typedef struct _RCV_OR_XMT_FRAME { struct RCV_OR_XMT_FRAME {
uchar command; /* Command word defined above */ unsigned char command; /* Command word defined above */
uchar MacId; /* Mac ID of interface - transmit only */ unsigned char MacId; /* Mac ID of interface - transmit only */
ushort count; /* Length of frame in bytes */ ushort count; /* Length of frame in bytes */
ulong32 pad; /* not used */ u32 pad; /* not used */
} RCV_OR_XMT_FRAME, *PRCV_OR_XMT_FRAME; };
/* /*
* Values of desc field in DUMP_OR_LOAD structure * Values of desc field in DUMP_OR_LOAD structure
@ -196,12 +195,12 @@ typedef struct _RCV_OR_XMT_FRAME {
/* /*
* Map command to replace a command in ROM with a command in WCS * Map command to replace a command in ROM with a command in WCS
*/ */
typedef struct _MAP { struct MAP {
uchar command; /* Command word defined above */ unsigned char command; /* Command word defined above */
uchar not_used[3]; unsigned char not_used[3];
ushort map_to; /* Instruction address in WCS */ ushort map_to; /* Instruction address in WCS */
ushort map_out; /* Instruction address in ROM */ ushort map_out; /* Instruction address in ROM */
} MAP, *PMAP; };
/* /*
* Misc definitions * Misc definitions
@ -221,35 +220,35 @@ typedef struct _MAP {
/* /*
* Coredump header structure * Coredump header structure
*/ */
typedef struct _CORE_Q { struct CORE_Q {
ulong32 queueOff; /* Offset of queue */ u32 queueOff; /* Offset of queue */
ulong32 queuesize; /* size of queue */ u32 queuesize; /* size of queue */
} CORE_Q; };
#define DRIVER_NAME_SIZE 32 #define DRIVER_NAME_SIZE 32
typedef struct _sliccore_hdr_t { struct sliccore_hdr {
uchar driver_version[DRIVER_NAME_SIZE]; /* Driver version string */ unsigned char driver_version[DRIVER_NAME_SIZE]; /* Driver version string */
ulong32 RcvRegOff; /* Offset of receive registers */ u32 RcvRegOff; /* Offset of receive registers */
ulong32 RcvRegsize; /* size of receive registers */ u32 RcvRegsize; /* size of receive registers */
ulong32 XmtRegOff; /* Offset of transmit registers */ u32 XmtRegOff; /* Offset of transmit registers */
ulong32 XmtRegsize; /* size of transmit registers */ u32 XmtRegsize; /* size of transmit registers */
ulong32 FileRegOff; /* Offset of register file */ u32 FileRegOff; /* Offset of register file */
ulong32 FileRegsize; /* size of register file */ u32 FileRegsize; /* size of register file */
ulong32 SramOff; /* Offset of Sram */ u32 SramOff; /* Offset of Sram */
ulong32 Sramsize; /* size of Sram */ u32 Sramsize; /* size of Sram */
ulong32 DramOff; /* Offset of Dram */ u32 DramOff; /* Offset of Dram */
ulong32 Dramsize; /* size of Dram */ u32 Dramsize; /* size of Dram */
CORE_Q queues[SLIC_MAX_QUEUE]; /* size and offsets of queues */ CORE_Q queues[SLIC_MAX_QUEUE]; /* size and offsets of queues */
ulong32 CamAMOff; /* Offset of CAM A contents */ u32 CamAMOff; /* Offset of CAM A contents */
ulong32 CamASize; /* Size of Cam A */ u32 CamASize; /* Size of Cam A */
ulong32 CamBMOff; /* Offset of CAM B contents */ u32 CamBMOff; /* Offset of CAM B contents */
ulong32 CamBSize; /* Size of Cam B */ u32 CamBSize; /* Size of Cam B */
ulong32 CamCMOff; /* Offset of CAM C contents */ u32 CamCMOff; /* Offset of CAM C contents */
ulong32 CamCSize; /* Size of Cam C */ u32 CamCSize; /* Size of Cam C */
ulong32 CamDMOff; /* Offset of CAM D contents */ u32 CamDMOff; /* Offset of CAM D contents */
ulong32 CamDSize; /* Size of Cam D */ u32 CamDSize; /* Size of Cam D */
} sliccore_hdr_t, *p_sliccore_hdr_t; };
/* /*
* definitions needed for our kernel-mode gdb stub. * definitions needed for our kernel-mode gdb stub.

View File

@ -2,7 +2,6 @@
* *
* Copyright (c) 2000-2002 Alacritech, Inc. All rights reserved. * Copyright (c) 2000-2002 Alacritech, Inc. All rights reserved.
* *
* $Id: slichw.h,v 1.3 2008/03/17 19:27:26 chris Exp $
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions * modification, are permitted provided that the following conditions
@ -236,110 +235,106 @@
#define TRUE 1 #define TRUE 1
#endif #endif
typedef struct _slic_rcvbuf_t { struct slic_rcvbuf {
uchar pad1[6]; unsigned char pad1[6];
ushort pad2; ushort pad2;
ulong32 pad3; u32 pad3;
ulong32 pad4; u32 pad4;
ulong32 buffer; u32 buffer;
ulong32 length; u32 length;
ulong32 status; u32 status;
ulong32 pad5; u32 pad5;
ushort pad6; ushort pad6;
uchar data[SLIC_RCVBUF_DATASIZE]; unsigned char data[SLIC_RCVBUF_DATASIZE];
} slic_rcvbuf_t, *p_slic_rcvbuf_t; };
typedef struct _slic_hddr_wds { struct slic_hddr_wds {
union { union {
struct { struct {
ulong32 frame_status; u32 frame_status;
ulong32 frame_status_b; u32 frame_status_b;
ulong32 time_stamp; u32 time_stamp;
ulong32 checksum; u32 checksum;
} hdrs_14port; } hdrs_14port;
struct { struct {
ulong32 frame_status; u32 frame_status;
ushort ByteCnt; ushort ByteCnt;
ushort TpChksum; ushort TpChksum;
ushort CtxHash; ushort CtxHash;
ushort MacHash; ushort MacHash;
ulong32 BufLnk; u32 BufLnk;
} hdrs_gbit; } hdrs_gbit;
} u0; } u0;
} slic_hddr_wds_t, *p_slic_hddr_wds; };
#define frame_status14 u0.hdrs_14port.frame_status #define frame_status14 u0.hdrs_14port.frame_status
#define frame_status_b14 u0.hdrs_14port.frame_status_b #define frame_status_b14 u0.hdrs_14port.frame_status_b
#define frame_statusGB u0.hdrs_gbit.frame_status #define frame_statusGB u0.hdrs_gbit.frame_status
typedef struct _slic_host64sg_t { struct slic_host64sg {
ulong32 paddrl; u32 paddrl;
ulong32 paddrh; u32 paddrh;
ulong32 length; u32 length;
} slic_host64sg_t, *p_slic_host64sg_t; };
typedef struct _slic_host64_cmd_t { struct slic_host64_cmd {
ulong32 hosthandle; u32 hosthandle;
ulong32 RSVD; u32 RSVD;
uchar command; unsigned char command;
uchar flags; unsigned char flags;
union { union {
ushort rsv1; ushort rsv1;
ushort rsv2; ushort rsv2;
} u0; } u0;
union { union {
struct { struct {
ulong32 totlen; u32 totlen;
slic_host64sg_t bufs[SLIC_MAX64_BCNT]; struct slic_host64sg bufs[SLIC_MAX64_BCNT];
} slic_buffers; } slic_buffers;
} u; } u;
};
} slic_host64_cmd_t, *p_slic_host64_cmd_t; struct slic_rspbuf {
u32 hosthandle;
u32 pad0;
u32 pad1;
u32 status;
u32 pad2[4];
typedef struct _slic_rspbuf_t { };
ulong32 hosthandle;
ulong32 pad0;
ulong32 pad1;
ulong32 status;
ulong32 pad2[4];
} slic_rspbuf_t, *p_slic_rspbuf_t; struct slic_regs {
u32 slic_reset; /* Reset Register */
u32 pad0;
typedef ulong32 SLIC_REG; u32 slic_icr; /* Interrupt Control Register */
u32 pad2;
typedef struct _slic_regs_t {
ULONG slic_reset; /* Reset Register */
ULONG pad0;
ULONG slic_icr; /* Interrupt Control Register */
ULONG pad2;
#define SLIC_ICR 0x0008 #define SLIC_ICR 0x0008
ULONG slic_isp; /* Interrupt status pointer */ u32 slic_isp; /* Interrupt status pointer */
ULONG pad1; u32 pad1;
#define SLIC_ISP 0x0010 #define SLIC_ISP 0x0010
ULONG slic_isr; /* Interrupt status */ u32 slic_isr; /* Interrupt status */
ULONG pad3; u32 pad3;
#define SLIC_ISR 0x0018 #define SLIC_ISR 0x0018
SLIC_REG slic_hbar; /* Header buffer address reg */ u32 slic_hbar; /* Header buffer address reg */
ULONG pad4; u32 pad4;
/* 31-8 - phy addr of set of contiguous hdr buffers /* 31-8 - phy addr of set of contiguous hdr buffers
7-0 - number of buffers passed 7-0 - number of buffers passed
Buffers are 256 bytes long on 256-byte boundaries. */ Buffers are 256 bytes long on 256-byte boundaries. */
#define SLIC_HBAR 0x0020 #define SLIC_HBAR 0x0020
#define SLIC_HBAR_CNT_MSK 0x000000FF #define SLIC_HBAR_CNT_MSK 0x000000FF
SLIC_REG slic_dbar; /* Data buffer handle & address reg */ u32 slic_dbar; /* Data buffer handle & address reg */
ULONG pad5; u32 pad5;
/* 4 sets of registers; Buffers are 2K bytes long 2 per 4K page. */ /* 4 sets of registers; Buffers are 2K bytes long 2 per 4K page. */
#define SLIC_DBAR 0x0028 #define SLIC_DBAR 0x0028
#define SLIC_DBAR_SIZE 2048 #define SLIC_DBAR_SIZE 2048
SLIC_REG slic_cbar; /* Xmt Cmd buf addr regs.*/ u32 slic_cbar; /* Xmt Cmd buf addr regs.*/
/* 1 per XMT interface /* 1 per XMT interface
31-5 - phy addr of host command buffer 31-5 - phy addr of host command buffer
4-0 - length of cmd in multiples of 32 bytes 4-0 - length of cmd in multiples of 32 bytes
@ -348,13 +343,13 @@ typedef struct _slic_regs_t {
#define SLIC_CBAR_LEN_MSK 0x0000001F #define SLIC_CBAR_LEN_MSK 0x0000001F
#define SLIC_CBAR_ALIGN 0x00000020 #define SLIC_CBAR_ALIGN 0x00000020
SLIC_REG slic_wcs; /* write control store*/ u32 slic_wcs; /* write control store*/
#define SLIC_WCS 0x0034 #define SLIC_WCS 0x0034
#define SLIC_WCS_START 0x80000000 /*Start the SLIC (Jump to WCS)*/ #define SLIC_WCS_START 0x80000000 /*Start the SLIC (Jump to WCS)*/
#define SLIC_WCS_COMPARE 0x40000000 /* Compare with value in WCS*/ #define SLIC_WCS_COMPARE 0x40000000 /* Compare with value in WCS*/
SLIC_REG slic_rbar; /* Response buffer address reg.*/ u32 slic_rbar; /* Response buffer address reg.*/
ULONG pad7; u32 pad7;
/*31-8 - phy addr of set of contiguous response buffers /*31-8 - phy addr of set of contiguous response buffers
7-0 - number of buffers passed 7-0 - number of buffers passed
Buffers are 32 bytes long on 32-byte boundaries.*/ Buffers are 32 bytes long on 32-byte boundaries.*/
@ -362,166 +357,166 @@ typedef struct _slic_regs_t {
#define SLIC_RBAR_CNT_MSK 0x000000FF #define SLIC_RBAR_CNT_MSK 0x000000FF
#define SLIC_RBAR_SIZE 32 #define SLIC_RBAR_SIZE 32
SLIC_REG slic_stats; /* read statistics (UPR) */ u32 slic_stats; /* read statistics (UPR) */
ULONG pad8; u32 pad8;
#define SLIC_RSTAT 0x0040 #define SLIC_RSTAT 0x0040
SLIC_REG slic_rlsr; /* read link status */ u32 slic_rlsr; /* read link status */
ULONG pad9; u32 pad9;
#define SLIC_LSTAT 0x0048 #define SLIC_LSTAT 0x0048
SLIC_REG slic_wmcfg; /* Write Mac Config */ u32 slic_wmcfg; /* Write Mac Config */
ULONG pad10; u32 pad10;
#define SLIC_WMCFG 0x0050 #define SLIC_WMCFG 0x0050
SLIC_REG slic_wphy; /* Write phy register */ u32 slic_wphy; /* Write phy register */
ULONG pad11; u32 pad11;
#define SLIC_WPHY 0x0058 #define SLIC_WPHY 0x0058
SLIC_REG slic_rcbar; /*Rcv Cmd buf addr reg*/ u32 slic_rcbar; /*Rcv Cmd buf addr reg*/
ULONG pad12; u32 pad12;
#define SLIC_RCBAR 0x0060 #define SLIC_RCBAR 0x0060
SLIC_REG slic_rconfig; /* Read SLIC Config*/ u32 slic_rconfig; /* Read SLIC Config*/
ULONG pad13; u32 pad13;
#define SLIC_RCONFIG 0x0068 #define SLIC_RCONFIG 0x0068
SLIC_REG slic_intagg; /* Interrupt aggregation time*/ u32 slic_intagg; /* Interrupt aggregation time*/
ULONG pad14; u32 pad14;
#define SLIC_INTAGG 0x0070 #define SLIC_INTAGG 0x0070
SLIC_REG slic_wxcfg; /* Write XMIT config reg*/ u32 slic_wxcfg; /* Write XMIT config reg*/
ULONG pad16; u32 pad16;
#define SLIC_WXCFG 0x0078 #define SLIC_WXCFG 0x0078
SLIC_REG slic_wrcfg; /* Write RCV config reg*/ u32 slic_wrcfg; /* Write RCV config reg*/
ULONG pad17; u32 pad17;
#define SLIC_WRCFG 0x0080 #define SLIC_WRCFG 0x0080
SLIC_REG slic_wraddral; /* Write rcv addr a low*/ u32 slic_wraddral; /* Write rcv addr a low*/
ULONG pad18; u32 pad18;
#define SLIC_WRADDRAL 0x0088 #define SLIC_WRADDRAL 0x0088
SLIC_REG slic_wraddrah; /* Write rcv addr a high*/ u32 slic_wraddrah; /* Write rcv addr a high*/
ULONG pad19; u32 pad19;
#define SLIC_WRADDRAH 0x0090 #define SLIC_WRADDRAH 0x0090
SLIC_REG slic_wraddrbl; /* Write rcv addr b low*/ u32 slic_wraddrbl; /* Write rcv addr b low*/
ULONG pad20; u32 pad20;
#define SLIC_WRADDRBL 0x0098 #define SLIC_WRADDRBL 0x0098
SLIC_REG slic_wraddrbh; /* Write rcv addr b high*/ u32 slic_wraddrbh; /* Write rcv addr b high*/
ULONG pad21; u32 pad21;
#define SLIC_WRADDRBH 0x00a0 #define SLIC_WRADDRBH 0x00a0
SLIC_REG slic_mcastlow; /* Low bits of mcast mask*/ u32 slic_mcastlow; /* Low bits of mcast mask*/
ULONG pad22; u32 pad22;
#define SLIC_MCASTLOW 0x00a8 #define SLIC_MCASTLOW 0x00a8
SLIC_REG slic_mcasthigh; /* High bits of mcast mask*/ u32 slic_mcasthigh; /* High bits of mcast mask*/
ULONG pad23; u32 pad23;
#define SLIC_MCASTHIGH 0x00b0 #define SLIC_MCASTHIGH 0x00b0
SLIC_REG slic_ping; /* Ping the card*/ u32 slic_ping; /* Ping the card*/
ULONG pad24; u32 pad24;
#define SLIC_PING 0x00b8 #define SLIC_PING 0x00b8
SLIC_REG slic_dump_cmd; /* Dump command */ u32 slic_dump_cmd; /* Dump command */
ULONG pad25; u32 pad25;
#define SLIC_DUMP_CMD 0x00c0 #define SLIC_DUMP_CMD 0x00c0
SLIC_REG slic_dump_data; /* Dump data pointer */ u32 slic_dump_data; /* Dump data pointer */
ULONG pad26; u32 pad26;
#define SLIC_DUMP_DATA 0x00c8 #define SLIC_DUMP_DATA 0x00c8
SLIC_REG slic_pcistatus; /* Read card's pci_status register */ u32 slic_pcistatus; /* Read card's pci_status register */
ULONG pad27; u32 pad27;
#define SLIC_PCISTATUS 0x00d0 #define SLIC_PCISTATUS 0x00d0
SLIC_REG slic_wrhostid; /* Write hostid field */ u32 slic_wrhostid; /* Write hostid field */
ULONG pad28; u32 pad28;
#define SLIC_WRHOSTID 0x00d8 #define SLIC_WRHOSTID 0x00d8
#define SLIC_RDHOSTID_1GB 0x1554 #define SLIC_RDHOSTID_1GB 0x1554
#define SLIC_RDHOSTID_2GB 0x1554 #define SLIC_RDHOSTID_2GB 0x1554
SLIC_REG slic_low_power; /* Put card in a low power state */ u32 slic_low_power; /* Put card in a low power state */
ULONG pad29; u32 pad29;
#define SLIC_LOW_POWER 0x00e0 #define SLIC_LOW_POWER 0x00e0
SLIC_REG slic_quiesce; /* force slic into quiescent state u32 slic_quiesce; /* force slic into quiescent state
before soft reset */ before soft reset */
ULONG pad30; u32 pad30;
#define SLIC_QUIESCE 0x00e8 #define SLIC_QUIESCE 0x00e8
SLIC_REG slic_reset_iface; /* reset interface queues */ u32 slic_reset_iface; /* reset interface queues */
ULONG pad31; u32 pad31;
#define SLIC_RESET_IFACE 0x00f0 #define SLIC_RESET_IFACE 0x00f0
SLIC_REG slic_addr_upper; /* Bits 63-32 for host i/f addrs */ u32 slic_addr_upper; /* Bits 63-32 for host i/f addrs */
ULONG pad32; u32 pad32;
#define SLIC_ADDR_UPPER 0x00f8 /*Register is only written when it has changed*/ #define SLIC_ADDR_UPPER 0x00f8 /*Register is only written when it has changed*/
SLIC_REG slic_hbar64; /* 64 bit Header buffer address reg */ u32 slic_hbar64; /* 64 bit Header buffer address reg */
ULONG pad33; u32 pad33;
#define SLIC_HBAR64 0x0100 #define SLIC_HBAR64 0x0100
SLIC_REG slic_dbar64; /* 64 bit Data buffer handle & address reg */ u32 slic_dbar64; /* 64 bit Data buffer handle & address reg */
ULONG pad34; u32 pad34;
#define SLIC_DBAR64 0x0108 #define SLIC_DBAR64 0x0108
SLIC_REG slic_cbar64; /* 64 bit Xmt Cmd buf addr regs. */ u32 slic_cbar64; /* 64 bit Xmt Cmd buf addr regs. */
ULONG pad35; u32 pad35;
#define SLIC_CBAR64 0x0110 #define SLIC_CBAR64 0x0110
SLIC_REG slic_rbar64; /* 64 bit Response buffer address reg.*/ u32 slic_rbar64; /* 64 bit Response buffer address reg.*/
ULONG pad36; u32 pad36;
#define SLIC_RBAR64 0x0118 #define SLIC_RBAR64 0x0118
SLIC_REG slic_rcbar64; /* 64 bit Rcv Cmd buf addr reg*/ u32 slic_rcbar64; /* 64 bit Rcv Cmd buf addr reg*/
ULONG pad37; u32 pad37;
#define SLIC_RCBAR64 0x0120 #define SLIC_RCBAR64 0x0120
SLIC_REG slic_stats64; /*read statistics (64 bit UPR)*/ u32 slic_stats64; /*read statistics (64 bit UPR)*/
ULONG pad38; u32 pad38;
#define SLIC_RSTAT64 0x0128 #define SLIC_RSTAT64 0x0128
SLIC_REG slic_rcv_wcs; /*Download Gigabit RCV sequencer ucode*/ u32 slic_rcv_wcs; /*Download Gigabit RCV sequencer ucode*/
ULONG pad39; u32 pad39;
#define SLIC_RCV_WCS 0x0130 #define SLIC_RCV_WCS 0x0130
#define SLIC_RCVWCS_BEGIN 0x40000000 #define SLIC_RCVWCS_BEGIN 0x40000000
#define SLIC_RCVWCS_FINISH 0x80000000 #define SLIC_RCVWCS_FINISH 0x80000000
SLIC_REG slic_wrvlanid; /* Write VlanId field */ u32 slic_wrvlanid; /* Write VlanId field */
ULONG pad40; u32 pad40;
#define SLIC_WRVLANID 0x0138 #define SLIC_WRVLANID 0x0138
SLIC_REG slic_read_xf_info; /* Read Transformer info */ u32 slic_read_xf_info; /* Read Transformer info */
ULONG pad41; u32 pad41;
#define SLIC_READ_XF_INFO 0x0140 #define SLIC_READ_XF_INFO 0x0140
SLIC_REG slic_write_xf_info; /* Write Transformer info */ u32 slic_write_xf_info; /* Write Transformer info */
ULONG pad42; u32 pad42;
#define SLIC_WRITE_XF_INFO 0x0148 #define SLIC_WRITE_XF_INFO 0x0148
SLIC_REG RSVD1; /* TOE Only */ u32 RSVD1; /* TOE Only */
ULONG pad43; u32 pad43;
SLIC_REG RSVD2; /* TOE Only */ u32 RSVD2; /* TOE Only */
ULONG pad44; u32 pad44;
SLIC_REG RSVD3; /* TOE Only */ u32 RSVD3; /* TOE Only */
ULONG pad45; u32 pad45;
SLIC_REG RSVD4; /* TOE Only */ u32 RSVD4; /* TOE Only */
ULONG pad46; u32 pad46;
SLIC_REG slic_ticks_per_sec; /* Write card ticks per second */ u32 slic_ticks_per_sec; /* Write card ticks per second */
ULONG pad47; u32 pad47;
#define SLIC_TICKS_PER_SEC 0x0170 #define SLIC_TICKS_PER_SEC 0x0170
} __iomem slic_regs_t, *p_slic_regs_t, SLIC_REGS, *PSLIC_REGS; };
typedef enum _UPR_REQUEST { enum UPR_REQUEST {
SLIC_UPR_STATS, SLIC_UPR_STATS,
SLIC_UPR_RLSR, SLIC_UPR_RLSR,
SLIC_UPR_WCFG, SLIC_UPR_WCFG,
@ -532,103 +527,102 @@ typedef enum _UPR_REQUEST {
SLIC_UPR_PDWN, SLIC_UPR_PDWN,
SLIC_UPR_PING, SLIC_UPR_PING,
SLIC_UPR_DUMP, SLIC_UPR_DUMP,
} UPR_REQUEST; };
typedef struct _inicpm_wakepattern { struct inicpm_wakepattern {
ulong32 patternlength; u32 patternlength;
uchar pattern[SLIC_PM_PATTERNSIZE]; unsigned char pattern[SLIC_PM_PATTERNSIZE];
uchar mask[SLIC_PM_PATTERNSIZE]; unsigned char mask[SLIC_PM_PATTERNSIZE];
} inicpm_wakepattern_t, *p_inicpm_wakepattern_t; };
typedef struct _inicpm_state { struct inicpm_state {
ulong32 powercaps; u32 powercaps;
ulong32 powerstate; u32 powerstate;
ulong32 wake_linkstatus; u32 wake_linkstatus;
ulong32 wake_magicpacket; u32 wake_magicpacket;
ulong32 wake_framepattern; u32 wake_framepattern;
inicpm_wakepattern_t wakepattern[SLIC_PM_MAXPATTERNS]; struct inicpm_wakepattern wakepattern[SLIC_PM_MAXPATTERNS];
} inicpm_state_t, *p_inicpm_state_t; };
typedef struct _slicpm_packet_pattern { struct slicpm_packet_pattern {
ulong32 priority; u32 priority;
ulong32 reserved; u32 reserved;
ulong32 masksize; u32 masksize;
ulong32 patternoffset; u32 patternoffset;
ulong32 patternsize; u32 patternsize;
ulong32 patternflags; u32 patternflags;
} slicpm_packet_pattern_t, *p_slicpm_packet_pattern_t; };
typedef enum _slicpm_power_state { enum slicpm_power_state {
slicpm_state_unspecified = 0, slicpm_state_unspecified = 0,
slicpm_state_d0, slicpm_state_d0,
slicpm_state_d1, slicpm_state_d1,
slicpm_state_d2, slicpm_state_d2,
slicpm_state_d3, slicpm_state_d3,
slicpm_state_maximum slicpm_state_maximum
} slicpm_state_t, *p_slicpm_state_t; };
typedef struct _slicpm_wakeup_capabilities { struct slicpm_wakeup_capabilities {
slicpm_state_t min_magic_packet_wakeup; enum slicpm_power_state min_magic_packet_wakeup;
slicpm_state_t min_pattern_wakeup; enum slicpm_power_state min_pattern_wakeup;
slicpm_state_t min_link_change_wakeup; enum slicpm_power_state min_link_change_wakeup;
} slicpm_wakeup_capabilities_t, *p_slicpm_wakeup_capabilities_t; };
struct slic_pnp_capabilities {
u32 flags;
struct slicpm_wakeup_capabilities wakeup_capabilities;
};
typedef struct _slic_pnp_capabilities { struct xmt_stats {
ulong32 flags; u32 xmit_tcp_bytes;
slicpm_wakeup_capabilities_t wakeup_capabilities; u32 xmit_tcp_segs;
} slic_pnp_capabilities_t, *p_slic_pnp_capabilities_t; u32 xmit_bytes;
u32 xmit_collisions;
u32 xmit_unicasts;
u32 xmit_other_error;
u32 xmit_excess_collisions;
};
typedef struct _xmt_stats_t { struct rcv_stats {
ulong32 xmit_tcp_bytes; u32 rcv_tcp_bytes;
ulong32 xmit_tcp_segs; u32 rcv_tcp_segs;
ulong32 xmit_bytes; u32 rcv_bytes;
ulong32 xmit_collisions; u32 rcv_unicasts;
ulong32 xmit_unicasts; u32 rcv_other_error;
ulong32 xmit_other_error; u32 rcv_drops;
ulong32 xmit_excess_collisions; };
} xmt_stats100_t;
typedef struct _rcv_stats_t { struct xmt_statsgb {
ulong32 rcv_tcp_bytes; u64 xmit_tcp_bytes;
ulong32 rcv_tcp_segs; u64 xmit_tcp_segs;
ulong32 rcv_bytes; u64 xmit_bytes;
ulong32 rcv_unicasts; u64 xmit_collisions;
ulong32 rcv_other_error; u64 xmit_unicasts;
ulong32 rcv_drops; u64 xmit_other_error;
} rcv_stats100_t; u64 xmit_excess_collisions;
};
typedef struct _xmt_statsgb_t { struct rcv_statsgb {
ulong64 xmit_tcp_bytes; u64 rcv_tcp_bytes;
ulong64 xmit_tcp_segs; u64 rcv_tcp_segs;
ulong64 xmit_bytes; u64 rcv_bytes;
ulong64 xmit_collisions; u64 rcv_unicasts;
ulong64 xmit_unicasts; u64 rcv_other_error;
ulong64 xmit_other_error; u64 rcv_drops;
ulong64 xmit_excess_collisions; };
} xmt_statsGB_t;
typedef struct _rcv_statsgb_t { struct slic_stats {
ulong64 rcv_tcp_bytes;
ulong64 rcv_tcp_segs;
ulong64 rcv_bytes;
ulong64 rcv_unicasts;
u64 rcv_other_error;
ulong64 rcv_drops;
} rcv_statsGB_t;
typedef struct _slic_stats {
union { union {
struct { struct {
xmt_stats100_t xmt100; struct xmt_stats xmt100;
rcv_stats100_t rcv100; struct rcv_stats rcv100;
} stats_100; } stats_100;
struct { struct {
xmt_statsGB_t xmtGB; struct xmt_statsgb xmtGB;
rcv_statsGB_t rcvGB; struct rcv_statsgb rcvGB;
} stats_GB; } stats_GB;
} u; } u;
} slic_stats_t, *p_slic_stats_t; };
#define xmit_tcp_segs100 u.stats_100.xmt100.xmit_tcp_segs #define xmit_tcp_segs100 u.stats_100.xmt100.xmit_tcp_segs
#define xmit_tcp_bytes100 u.stats_100.xmt100.xmit_tcp_bytes #define xmit_tcp_bytes100 u.stats_100.xmt100.xmit_tcp_bytes
@ -658,10 +652,9 @@ typedef struct _slic_stats {
#define rcv_other_error_gb u.stats_GB.rcvGB.rcv_other_error #define rcv_other_error_gb u.stats_GB.rcvGB.rcv_other_error
#define rcv_drops_gb u.stats_GB.rcvGB.rcv_drops #define rcv_drops_gb u.stats_GB.rcvGB.rcv_drops
typedef struct _slic_config_mac_t { struct slic_config_mac {
uchar macaddrA[6]; unsigned char macaddrA[6];
};
} slic_config_mac_t, *pslic_config_mac_t;
#define ATK_FRU_FORMAT 0x00 #define ATK_FRU_FORMAT 0x00
#define VENDOR1_FRU_FORMAT 0x01 #define VENDOR1_FRU_FORMAT 0x01
@ -670,68 +663,68 @@ typedef struct _slic_config_mac_t {
#define VENDOR4_FRU_FORMAT 0x04 #define VENDOR4_FRU_FORMAT 0x04
#define NO_FRU_FORMAT 0xFF #define NO_FRU_FORMAT 0xFF
typedef struct _atk_fru_t { struct atk_fru {
uchar assembly[6]; unsigned char assembly[6];
uchar revision[2]; unsigned char revision[2];
uchar serial[14]; unsigned char serial[14];
uchar pad[3]; unsigned char pad[3];
} atk_fru_t, *patk_fru_t; };
typedef struct _vendor1_fru_t { struct vendor1_fru {
uchar commodity; unsigned char commodity;
uchar assembly[4]; unsigned char assembly[4];
uchar revision[2]; unsigned char revision[2];
uchar supplier[2]; unsigned char supplier[2];
uchar date[2]; unsigned char date[2];
uchar sequence[3]; unsigned char sequence[3];
uchar pad[13]; unsigned char pad[13];
} vendor1_fru_t, *pvendor1_fru_t; };
typedef struct _vendor2_fru_t { struct vendor2_fru {
uchar part[8]; unsigned char part[8];
uchar supplier[5]; unsigned char supplier[5];
uchar date[3]; unsigned char date[3];
uchar sequence[4]; unsigned char sequence[4];
uchar pad[7]; unsigned char pad[7];
} vendor2_fru_t, *pvendor2_fru_t; };
typedef struct _vendor3_fru_t { struct vendor3_fru {
uchar assembly[6]; unsigned char assembly[6];
uchar revision[2]; unsigned char revision[2];
uchar serial[14]; unsigned char serial[14];
uchar pad[3]; unsigned char pad[3];
} vendor3_fru_t, *pvendor3_fru_t; };
typedef struct _vendor4_fru_t { struct vendor4_fru {
uchar number[8]; unsigned char number[8];
uchar part[8]; unsigned char part[8];
uchar version[8]; unsigned char version[8];
uchar pad[3]; unsigned char pad[3];
} vendor4_fru_t, *pvendor4_fru_t; };
typedef union _oemfru_t { union oemfru_t {
vendor1_fru_t vendor1_fru; struct vendor1_fru vendor1_fru;
vendor2_fru_t vendor2_fru; struct vendor2_fru vendor2_fru;
vendor3_fru_t vendor3_fru; struct vendor3_fru vendor3_fru;
vendor4_fru_t vendor4_fru; struct vendor4_fru vendor4_fru;
} oemfru_t, *poemfru_t; };
/* /*
SLIC EEPROM structure for Mojave SLIC EEPROM structure for Mojave
*/ */
typedef struct _slic_eeprom { struct slic_eeprom {
ushort Id; /* 00 EEPROM/FLASH Magic code 'A5A5'*/ ushort Id; /* 00 EEPROM/FLASH Magic code 'A5A5'*/
ushort EecodeSize; /* 01 Size of EEPROM Codes (bytes * 4)*/ ushort EecodeSize; /* 01 Size of EEPROM Codes (bytes * 4)*/
ushort FlashSize; /* 02 Flash size */ ushort FlashSize; /* 02 Flash size */
ushort EepromSize; /* 03 EEPROM Size */ ushort EepromSize; /* 03 EEPROM Size */
ushort VendorId; /* 04 Vendor ID */ ushort VendorId; /* 04 Vendor ID */
ushort DeviceId; /* 05 Device ID */ ushort DeviceId; /* 05 Device ID */
uchar RevisionId; /* 06 Revision ID */ unsigned char RevisionId; /* 06 Revision ID */
uchar ClassCode[3]; /* 07 Class Code */ unsigned char ClassCode[3]; /* 07 Class Code */
uchar DbgIntPin; /* 08 Debug Interrupt pin */ unsigned char DbgIntPin; /* 08 Debug Interrupt pin */
uchar NetIntPin0; /* Network Interrupt Pin */ unsigned char NetIntPin0; /* Network Interrupt Pin */
uchar MinGrant; /* 09 Minimum grant */ unsigned char MinGrant; /* 09 Minimum grant */
uchar MaxLat; /* Maximum Latency */ unsigned char MaxLat; /* Maximum Latency */
ushort PciStatus; /* 10 PCI Status */ ushort PciStatus; /* 10 PCI Status */
ushort SubSysVId; /* 11 Subsystem Vendor Id */ ushort SubSysVId; /* 11 Subsystem Vendor Id */
ushort SubSysId; /* 12 Subsystem ID */ ushort SubSysId; /* 12 Subsystem ID */
@ -739,58 +732,60 @@ typedef struct _slic_eeprom {
ushort DramRomFn; /* 14 Dram/Rom function */ ushort DramRomFn; /* 14 Dram/Rom function */
ushort DSize2Pci; /* 15 DRAM size to PCI (bytes * 64K) */ ushort DSize2Pci; /* 15 DRAM size to PCI (bytes * 64K) */
ushort RSize2Pci; /* 16 ROM extension size to PCI (bytes * 4k) */ ushort RSize2Pci; /* 16 ROM extension size to PCI (bytes * 4k) */
uchar NetIntPin1; /* 17 Network Interface Pin 1 (simba/leone only) */ unsigned char NetIntPin1;/* 17 Network Interface Pin 1
uchar NetIntPin2; /* Network Interface Pin 2 (simba/leone only) */ (simba/leone only) */
unsigned char NetIntPin2; /*Network Interface Pin 2 (simba/leone only)*/
union { union {
uchar NetIntPin3;/* 18 Network Interface Pin 3 (simba only) */ unsigned char NetIntPin3;/*18 Network Interface Pin 3
uchar FreeTime;/* FreeTime setting (leone/mojave only) */ (simba only)*/
unsigned char FreeTime;/*FreeTime setting (leone/mojave only) */
} u1; } u1;
uchar TBIctl; /* 10-bit interface control (Mojave only) */ unsigned char TBIctl; /* 10-bit interface control (Mojave only) */
ushort DramSize; /* 19 DRAM size (bytes * 64k) */ ushort DramSize; /* 19 DRAM size (bytes * 64k) */
union { union {
struct { struct {
/* Mac Interface Specific portions */ /* Mac Interface Specific portions */
slic_config_mac_t MacInfo[SLIC_NBR_MACS]; struct slic_config_mac MacInfo[SLIC_NBR_MACS];
} mac; /* MAC access for all boards */ } mac; /* MAC access for all boards */
struct { struct {
/* use above struct for MAC access */ /* use above struct for MAC access */
slic_config_mac_t pad[SLIC_NBR_MACS - 1]; struct slic_config_mac pad[SLIC_NBR_MACS - 1];
ushort DeviceId2; /* Device ID for 2nd ushort DeviceId2; /* Device ID for 2nd
PCI function */ PCI function */
uchar IntPin2; /* Interrupt pin for unsigned char IntPin2; /* Interrupt pin for
2nd PCI function */ 2nd PCI function */
uchar ClassCode2[3]; /* Class Code for 2nd unsigned char ClassCode2[3]; /* Class Code for 2nd
PCI function */ PCI function */
} mojave; /* 2nd function access for gigabit board */ } mojave; /* 2nd function access for gigabit board */
} u2; } u2;
ushort CfgByte6; /* Config Byte 6 */ ushort CfgByte6; /* Config Byte 6 */
ushort PMECapab; /* Power Mgment capabilities */ ushort PMECapab; /* Power Mgment capabilities */
ushort NwClkCtrls; /* NetworkClockControls */ ushort NwClkCtrls; /* NetworkClockControls */
uchar FruFormat; /* Alacritech FRU format type */ unsigned char FruFormat; /* Alacritech FRU format type */
atk_fru_t AtkFru; /* Alacritech FRU information */ struct atk_fru AtkFru; /* Alacritech FRU information */
uchar OemFruFormat; /* optional OEM FRU format type */ unsigned char OemFruFormat; /* optional OEM FRU format type */
oemfru_t OemFru; /* optional OEM FRU information */ union oemfru_t OemFru; /* optional OEM FRU information */
uchar Pad[4]; /* Pad to 128 bytes - includes 2 cksum bytes unsigned char Pad[4]; /* Pad to 128 bytes - includes 2 cksum bytes
*(if OEM FRU info exists) and two unusable *(if OEM FRU info exists) and two unusable
* bytes at the end */ * bytes at the end */
} slic_eeprom_t, *pslic_eeprom_t; };
/* SLIC EEPROM structure for Oasis */ /* SLIC EEPROM structure for Oasis */
typedef struct _oslic_eeprom_t { struct oslic_eeprom {
ushort Id; /* 00 EEPROM/FLASH Magic code 'A5A5' */ ushort Id; /* 00 EEPROM/FLASH Magic code 'A5A5' */
ushort EecodeSize; /* 01 Size of EEPROM Codes (bytes * 4)*/ ushort EecodeSize; /* 01 Size of EEPROM Codes (bytes * 4)*/
ushort FlashConfig0; /* 02 Flash Config for SPI device 0 */ ushort FlashConfig0; /* 02 Flash Config for SPI device 0 */
ushort FlashConfig1; /* 03 Flash Config for SPI device 1 */ ushort FlashConfig1; /* 03 Flash Config for SPI device 1 */
ushort VendorId; /* 04 Vendor ID */ ushort VendorId; /* 04 Vendor ID */
ushort DeviceId; /* 05 Device ID (function 0) */ ushort DeviceId; /* 05 Device ID (function 0) */
uchar RevisionId; /* 06 Revision ID */ unsigned char RevisionId; /* 06 Revision ID */
uchar ClassCode[3]; /* 07 Class Code for PCI function 0 */ unsigned char ClassCode[3]; /* 07 Class Code for PCI function 0 */
uchar IntPin1; /* 08 Interrupt pin for PCI function 1*/ unsigned char IntPin1; /* 08 Interrupt pin for PCI function 1*/
uchar ClassCode2[3]; /* 09 Class Code for PCI function 1 */ unsigned char ClassCode2[3]; /* 09 Class Code for PCI function 1 */
uchar IntPin2; /* 10 Interrupt pin for PCI function 2*/ unsigned char IntPin2; /* 10 Interrupt pin for PCI function 2*/
uchar IntPin0; /* Interrupt pin for PCI function 0*/ unsigned char IntPin0; /* Interrupt pin for PCI function 0*/
uchar MinGrant; /* 11 Minimum grant */ unsigned char MinGrant; /* 11 Minimum grant */
uchar MaxLat; /* Maximum Latency */ unsigned char MaxLat; /* Maximum Latency */
ushort SubSysVId; /* 12 Subsystem Vendor Id */ ushort SubSysVId; /* 12 Subsystem Vendor Id */
ushort SubSysId; /* 13 Subsystem ID */ ushort SubSysId; /* 13 Subsystem ID */
ushort FlashSize; /* 14 Flash size (bytes / 4K) */ ushort FlashSize; /* 14 Flash size (bytes / 4K) */
@ -801,8 +796,8 @@ typedef struct _oslic_eeprom_t {
ushort DeviceId2; /* 18 Device Id (function 2) */ ushort DeviceId2; /* 18 Device Id (function 2) */
ushort CfgByte6; /* 19 Device Status Config Bytes 6-7 */ ushort CfgByte6; /* 19 Device Status Config Bytes 6-7 */
ushort PMECapab; /* 20 Power Mgment capabilities */ ushort PMECapab; /* 20 Power Mgment capabilities */
uchar MSICapab; /* 21 MSI capabilities */ unsigned char MSICapab; /* 21 MSI capabilities */
uchar ClockDivider; /* Clock divider */ unsigned char ClockDivider; /* Clock divider */
ushort PciStatusLow; /* 22 PCI Status bits 15:0 */ ushort PciStatusLow; /* 22 PCI Status bits 15:0 */
ushort PciStatusHigh; /* 23 PCI Status bits 31:16 */ ushort PciStatusHigh; /* 23 PCI Status bits 31:16 */
ushort DramConfigLow; /* 24 DRAM Configuration bits 15:0 */ ushort DramConfigLow; /* 24 DRAM Configuration bits 15:0 */
@ -810,18 +805,18 @@ typedef struct _oslic_eeprom_t {
ushort DramSize; /* 26 DRAM size (bytes / 64K) */ ushort DramSize; /* 26 DRAM size (bytes / 64K) */
ushort GpioTbiCtl;/* 27 GPIO/TBI controls for functions 1/0 */ ushort GpioTbiCtl;/* 27 GPIO/TBI controls for functions 1/0 */
ushort EepromSize; /* 28 EEPROM Size */ ushort EepromSize; /* 28 EEPROM Size */
slic_config_mac_t MacInfo[2]; /* 29 MAC addresses (2 ports) */ struct slic_config_mac MacInfo[2]; /* 29 MAC addresses (2 ports) */
uchar FruFormat; /* 35 Alacritech FRU format type */ unsigned char FruFormat; /* 35 Alacritech FRU format type */
atk_fru_t AtkFru; /* Alacritech FRU information */ struct atk_fru AtkFru; /* Alacritech FRU information */
uchar OemFruFormat; /* optional OEM FRU format type */ unsigned char OemFruFormat; /* optional OEM FRU format type */
oemfru_t OemFru; /* optional OEM FRU information */ union oemfru_t OemFru; /* optional OEM FRU information */
uchar Pad[4]; /* Pad to 128 bytes - includes 2 checksum bytes unsigned char Pad[4]; /* Pad to 128 bytes - includes 2 checksum bytes
* (if OEM FRU info exists) and two unusable * (if OEM FRU info exists) and two unusable
* bytes at the end * bytes at the end
*/ */
} oslic_eeprom_t, *poslic_eeprom_t; };
#define MAX_EECODE_SIZE sizeof(slic_eeprom_t) #define MAX_EECODE_SIZE sizeof(struct slic_eeprom)
#define MIN_EECODE_SIZE 0x62 /* code size without optional OEM FRU stuff */ #define MIN_EECODE_SIZE 0x62 /* code size without optional OEM FRU stuff */
/* SLIC CONFIG structure /* SLIC CONFIG structure
@ -830,20 +825,20 @@ typedef struct _oslic_eeprom_t {
board types. It is filled in from the appropriate EEPROM structure board types. It is filled in from the appropriate EEPROM structure
by SlicGetConfigData(). by SlicGetConfigData().
*/ */
typedef struct _slic_config_t { struct slic_config {
boolean EepromValid; /* Valid EEPROM flag (checksum good?) */ bool EepromValid; /* Valid EEPROM flag (checksum good?) */
ushort DramSize; /* DRAM size (bytes / 64K) */ ushort DramSize; /* DRAM size (bytes / 64K) */
slic_config_mac_t MacInfo[SLIC_NBR_MACS]; /* MAC addresses */ struct slic_config_mac MacInfo[SLIC_NBR_MACS]; /* MAC addresses */
uchar FruFormat; /* Alacritech FRU format type */ unsigned char FruFormat; /* Alacritech FRU format type */
atk_fru_t AtkFru; /* Alacritech FRU information */ struct atk_fru AtkFru; /* Alacritech FRU information */
uchar OemFruFormat; /* optional OEM FRU format type */ unsigned char OemFruFormat; /* optional OEM FRU format type */
union { union {
vendor1_fru_t vendor1_fru; struct vendor1_fru vendor1_fru;
vendor2_fru_t vendor2_fru; struct vendor2_fru vendor2_fru;
vendor3_fru_t vendor3_fru; struct vendor3_fru vendor3_fru;
vendor4_fru_t vendor4_fru; struct vendor4_fru vendor4_fru;
} OemFru; } OemFru;
} slic_config_t, *pslic_config_t; };
#pragma pack() #pragma pack()

View File

@ -2,7 +2,6 @@
* *
* Copyright (c) 2000-2002 Alacritech, Inc. All rights reserved. * Copyright (c) 2000-2002 Alacritech, Inc. All rights reserved.
* *
* $Id: slicinc.h,v 1.4 2006/07/14 16:42:56 mook Exp $
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions * modification, are permitted provided that the following conditions
@ -48,164 +47,135 @@
#include "slichw.h" #include "slichw.h"
#include "slic.h" #include "slic.h"
int slic_entry_probe(struct pci_dev *pcidev, static int slic_entry_probe(struct pci_dev *pcidev,
const struct pci_device_id *ent); const struct pci_device_id *ent);
int slic_init(struct pci_dev *pcidev, static void slic_entry_remove(struct pci_dev *pcidev);
const struct pci_device_id *pci_tbl_entry,
long memaddr,
int chip_idx,
int acpi_idle_state);
void slic_entry_remove(struct pci_dev *pcidev);
void slic_init_driver(void); static void slic_init_driver(void);
int slic_entry_open(struct net_device *dev); static int slic_entry_open(struct net_device *dev);
int slic_entry_halt(struct net_device *dev); static int slic_entry_halt(struct net_device *dev);
int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
int slic_xmit_start(struct sk_buff *skb, struct net_device *dev); static int slic_xmit_start(struct sk_buff *skb, struct net_device *dev);
void slic_xmit_fail(p_adapter_t adapter, static void slic_xmit_fail(struct adapter *adapter,
struct sk_buff *skb, struct sk_buff *skb,
pvoid cmd, void *cmd,
ulong32 skbtype, u32 skbtype,
ulong32 status); u32 status);
void slic_xmit_timeout(struct net_device *dev); static void slic_xmit_timeout(struct net_device *dev);
void slic_config_pci(struct pci_dev *pcidev); static void slic_config_pci(struct pci_dev *pcidev);
struct sk_buff *slic_rcvqueue_getnext(p_adapter_t adapter); static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter);
inline void slic_reg32_write(void __iomem *reg, ulong32 value, uint flush); static inline void slic_reg32_write(void __iomem *reg, u32 value, uint flush);
inline void slic_reg64_write(p_adapter_t adapter, void __iomem *reg, static inline void slic_reg64_write(struct adapter *adapter, void __iomem *reg,
ulong32 value, void __iomem *regh, ulong32 paddrh, uint flush); u32 value, void __iomem *regh, u32 paddrh, uint flush);
inline ulong32 slic_reg32_read(pulong32 reg, uint flush);
inline ulong32 slic_reg16_read(pulong32 reg, uint flush);
#if SLIC_GET_STATS_ENABLED #if SLIC_GET_STATS_ENABLED
struct net_device_stats *slic_get_stats(struct net_device *dev); static struct net_device_stats *slic_get_stats(struct net_device *dev);
#endif #endif
int slic_mac_set_address(struct net_device *dev, pvoid ptr); static int slic_mac_set_address(struct net_device *dev, void *ptr);
static void slic_rcv_handler(struct adapter *adapter);
static void slic_link_event_handler(struct adapter *adapter);
static void slic_xmit_complete(struct adapter *adapter);
static void slic_upr_request_complete(struct adapter *adapter, u32 isr);
static int slic_rspqueue_init(struct adapter *adapter);
static int slic_rspqueue_reset(struct adapter *adapter);
static void slic_rspqueue_free(struct adapter *adapter);
static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter);
static void slic_cmdqmem_init(struct adapter *adapter);
static void slic_cmdqmem_free(struct adapter *adapter);
static u32 *slic_cmdqmem_addpage(struct adapter *adapter);
static int slic_cmdq_init(struct adapter *adapter);
static void slic_cmdq_free(struct adapter *adapter);
static void slic_cmdq_reset(struct adapter *adapter);
static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page);
static void slic_cmdq_getdone(struct adapter *adapter);
static void slic_cmdq_putdone(struct adapter *adapter,
struct slic_hostcmd *cmd);
static void slic_cmdq_putdone_irq(struct adapter *adapter,
struct slic_hostcmd *cmd);
static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter);
static int slic_rcvqueue_init(struct adapter *adapter);
static int slic_rcvqueue_reset(struct adapter *adapter);
static int slic_rcvqueue_fill(struct adapter *adapter);
static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb);
static void slic_rcvqueue_free(struct adapter *adapter);
static void slic_rcv_handle_error(struct adapter *adapter,
struct slic_rcvbuf *rcvbuf);
static void slic_adapter_set_hwaddr(struct adapter *adapter);
static void slic_card_halt(struct sliccard *card, struct adapter *adapter);
static int slic_card_init(struct sliccard *card, struct adapter *adapter);
static void slic_intagg_set(struct adapter *adapter, u32 value);
static int slic_card_download(struct adapter *adapter);
static u32 slic_card_locate(struct adapter *adapter);
int slicproc_card_read(char *page, char **start, off_t off, int count, static void slic_if_stop_queue(struct adapter *adapter);
int *eof, void *data); static void slic_if_start_queue(struct adapter *adapter);
int slicproc_card_write(struct file *file, const char __user *buffer, static int slic_if_init(struct adapter *adapter);
ulong count, void *data); static int slic_adapter_allocresources(struct adapter *adapter);
void slicproc_card_create(p_sliccard_t card); static void slic_adapter_freeresources(struct adapter *adapter);
void slicproc_card_destroy(p_sliccard_t card); static void slic_link_config(struct adapter *adapter, u32 linkspeed,
int slicproc_adapter_read(char *page, char **start, off_t off, int count, u32 linkduplex);
int *eof, void *data); static void slic_unmap_mmio_space(struct adapter *adapter);
int slicproc_adapter_write(struct file *file, const char __user *buffer, static void slic_card_cleanup(struct sliccard *card);
ulong count, void *data); static void slic_init_cleanup(struct adapter *adapter);
void slicproc_adapter_create(p_adapter_t adapter); static void slic_soft_reset(struct adapter *adapter);
void slicproc_adapter_destroy(p_adapter_t adapter); static void slic_card_reset(struct adapter *adapter);
void slicproc_create(void); static bool slic_mac_filter(struct adapter *adapter,
void slicproc_destroy(void); struct ether_header *ether_frame);
static void slic_mac_address_config(struct adapter *adapter);
void slic_interrupt_process(p_adapter_t adapter, ulong32 isr); static void slic_mac_config(struct adapter *adapter);
void slic_rcv_handler(p_adapter_t adapter); static void slic_mcast_set_mask(struct adapter *adapter);
void slic_upr_handler(p_adapter_t adapter); static int slic_mcast_add_list(struct adapter *adapter, char *address);
void slic_link_event_handler(p_adapter_t adapter); static unsigned char slic_mcast_get_mac_hash(char *macaddr);
void slic_xmit_complete(p_adapter_t adapter); static void slic_mcast_set_bit(struct adapter *adapter, char *address);
void slic_upr_request_complete(p_adapter_t adapter, ulong32 isr); static void slic_config_set(struct adapter *adapter, bool linkchange);
int slic_rspqueue_init(p_adapter_t adapter); static void slic_config_clear(struct adapter *adapter);
int slic_rspqueue_reset(p_adapter_t adapter); static void slic_config_get(struct adapter *adapter, u32 config,
void slic_rspqueue_free(p_adapter_t adapter); u32 configh);
p_slic_rspbuf_t slic_rspqueue_getnext(p_adapter_t adapter); static void slic_timer_get_stats(ulong device);
void slic_cmdqmem_init(p_adapter_t adapter); static void slic_timer_load_check(ulong context);
void slic_cmdqmem_free(p_adapter_t adapter); static void slic_timer_ping(ulong dev);
pulong32 slic_cmdqmem_addpage(p_adapter_t adapter); static void slic_assert_fail(void);
int slic_cmdq_init(p_adapter_t adapter); static ushort slic_eeprom_cksum(char *m, int len);
void slic_cmdq_free(p_adapter_t adapter);
void slic_cmdq_reset(p_adapter_t adapter);
void slic_cmdq_addcmdpage(p_adapter_t adapter, pulong32 page);
void slic_cmdq_getdone(p_adapter_t adapter);
void slic_cmdq_putdone(p_adapter_t adapter, p_slic_hostcmd_t cmd);
void slic_cmdq_putdone_irq(p_adapter_t adapter, p_slic_hostcmd_t cmd);
p_slic_hostcmd_t slic_cmdq_getfree(p_adapter_t adapter);
int slic_rcvqueue_init(p_adapter_t adapter);
int slic_rcvqueue_reset(p_adapter_t adapter);
int slic_rcvqueue_fill(p_adapter_t adapter);
ulong32 slic_rcvqueue_reinsert(p_adapter_t adapter, struct sk_buff *skb);
void slic_rcvqueue_free(p_adapter_t adapter);
void slic_rcv_handle_error(p_adapter_t adapter, p_slic_rcvbuf_t rcvbuf);
void slic_adapter_set_hwaddr(p_adapter_t adapter);
void slic_card_halt(p_sliccard_t card, p_adapter_t adapter);
int slic_card_init(p_sliccard_t card, p_adapter_t adapter);
void slic_intagg_set(p_adapter_t adapter, ulong32 value);
int slic_card_download(p_adapter_t adapter);
ulong32 slic_card_locate(p_adapter_t adapter);
int slic_card_removeadapter(p_adapter_t adapter);
void slic_card_remaster(p_adapter_t adapter);
void slic_card_softreset(p_adapter_t adapter);
void slic_card_up(p_adapter_t adapter);
void slic_card_down(p_adapter_t adapter);
void slic_if_stop_queue(p_adapter_t adapter);
void slic_if_start_queue(p_adapter_t adapter);
int slic_if_init(p_adapter_t adapter);
void slic_adapter_close(p_adapter_t adapter);
int slic_adapter_allocresources(p_adapter_t adapter);
void slic_adapter_freeresources(p_adapter_t adapter);
void slic_link_config(p_adapter_t adapter, ulong32 linkspeed,
ulong32 linkduplex);
void slic_unmap_mmio_space(p_adapter_t adapter);
void slic_card_cleanup(p_sliccard_t card);
void slic_init_cleanup(p_adapter_t adapter);
void slic_card_reclaim_buffers(p_adapter_t adapter);
void slic_soft_reset(p_adapter_t adapter);
void slic_card_reset(p_adapter_t adapter);
boolean slic_mac_filter(p_adapter_t adapter, p_ether_header ether_frame);
void slic_mac_address_config(p_adapter_t adapter);
void slic_mac_config(p_adapter_t adapter);
void slic_mcast_set_mask(p_adapter_t adapter);
void slic_mac_setmcastaddrs(p_adapter_t adapter);
int slic_mcast_add_list(p_adapter_t adapter, pchar address);
uchar slic_mcast_get_mac_hash(pchar macaddr);
void slic_mcast_set_bit(p_adapter_t adapter, pchar address);
void slic_config_set(p_adapter_t adapter, boolean linkchange);
void slic_config_clear(p_adapter_t adapter);
void slic_config_get(p_adapter_t adapter, ulong32 config, ulong32 configh);
void slic_timer_get_stats(ulong device);
void slic_timer_load_check(ulong context);
void slic_timer_ping(ulong dev);
void slic_stall_msec(int stall);
void slic_stall_usec(int stall);
void slic_assert_fail(void);
ushort slic_eeprom_cksum(pchar m, int len);
/* upr */ /* upr */
void slic_upr_start(p_adapter_t adapter); static void slic_upr_start(struct adapter *adapter);
void slic_link_upr_complete(p_adapter_t adapter, ulong32 Isr); static void slic_link_upr_complete(struct adapter *adapter, u32 Isr);
int slic_upr_request(p_adapter_t adapter, static int slic_upr_request(struct adapter *adapter,
ulong32 upr_request, u32 upr_request,
ulong32 upr_data, u32 upr_data,
ulong32 upr_data_h, u32 upr_data_h,
ulong32 upr_buffer, u32 upr_buffer,
ulong32 upr_buffer_h); u32 upr_buffer_h);
int slic_upr_queue_request(p_adapter_t adapter, static int slic_upr_queue_request(struct adapter *adapter,
ulong32 upr_request, u32 upr_request,
ulong32 upr_data, u32 upr_data,
ulong32 upr_data_h, u32 upr_data_h,
ulong32 upr_buffer, u32 upr_buffer,
ulong32 upr_buffer_h); u32 upr_buffer_h);
void slic_mcast_set_list(struct net_device *dev); static void slic_mcast_set_list(struct net_device *dev);
void slic_mcast_init_crc32(void); static void slic_mcast_init_crc32(void);
#if SLIC_DUMP_ENABLED #if SLIC_DUMP_ENABLED
int slic_dump_thread(void *context); static int slic_dump_thread(void *context);
uint slic_init_dump_thread(p_sliccard_t card); static uint slic_init_dump_thread(struct sliccard *card);
uchar slic_get_dump_index(pchar path); static unsigned char slic_get_dump_index(char *path);
ulong32 slic_dump_card(p_sliccard_t card, boolean resume); static u32 slic_dump_card(struct sliccard *card, bool resume);
ulong32 slic_dump_halt(p_sliccard_t card, uchar proc); static u32 slic_dump_halt(struct sliccard *card, unsigned char proc);
ulong32 slic_dump_reg(p_sliccard_t card, uchar proc); static u32 slic_dump_reg(struct sliccard *card, unsigned char proc);
ulong32 slic_dump_data(p_sliccard_t card, ulong32 addr, static u32 slic_dump_data(struct sliccard *card, u32 addr,
ushort count, uchar desc); ushort count, unsigned char desc);
ulong32 slic_dump_queue(p_sliccard_t card, ulong32 buf_phys, static u32 slic_dump_queue(struct sliccard *card, u32 buf_phys,
ulong32 buf_physh, ulong32 queue); u32 buf_physh, u32 queue);
ulong32 slic_dump_load_queue(p_sliccard_t card, ulong32 data, ulong32 queue); static u32 slic_dump_load_queue(struct sliccard *card, u32 data,
ulong32 slic_dump_cam(p_sliccard_t card, ulong32 addr, u32 queue);
ulong32 count, uchar desc); static u32 slic_dump_cam(struct sliccard *card, u32 addr,
u32 count, unsigned char desc);
ulong32 slic_dump_resume(p_sliccard_t card, uchar proc); static u32 slic_dump_resume(struct sliccard *card, unsigned char proc);
ulong32 slic_dump_send_cmd(p_sliccard_t card, ulong32 cmd_phys, static u32 slic_dump_send_cmd(struct sliccard *card, u32 cmd_phys,
ulong32 cmd_physh, ulong32 buf_phys, u32 cmd_physh, u32 buf_phys,
ulong32 buf_physh); u32 buf_physh);
#define create_file(x) STATUS_SUCCESS #define create_file(x) STATUS_SUCCESS
#define write_file(w, x, y, z) STATUS_SUCCESS #define write_file(w, x, y, z) STATUS_SUCCESS

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