dt-bindings: aspeed-lpc: Document LPC Host Interface Controller

The LPC Host Interface Controller is part of a BMC SoC that is used for
communication with the host.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Joel Stanley 2018-02-19 17:54:20 +10:30 committed by Greg Kroah-Hartman
parent 474cca5fd8
commit eb105eace9
1 changed files with 41 additions and 0 deletions

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@ -109,9 +109,50 @@ lpc: lpc@1e789000 {
};
};
BMC Node Children
==================
Host Node Children
==================
LPC Host Interface Controller
-------------------
The LPC Host Interface Controller manages functions exposed to the host such as
LPC firmware hub cycles, configuration of the LPC-to-AHB mapping, UART
management and bus snoop configuration.
Required properties:
- compatible: One of:
"aspeed,ast2400-lpc-ctrl";
"aspeed,ast2500-lpc-ctrl";
- reg: contains offset/length values of the host interface controller
memory regions
- clocks: contains a phandle to the syscon node describing the clocks.
There should then be one cell representing the clock to use
- memory-region: A phandle to a reserved_memory region to be used for the LPC
to AHB mapping
- flash: A phandle to the SPI flash controller containing the flash to
be exposed over the LPC to AHB mapping
Example:
lpc-host@80 {
lpc_ctrl: lpc-ctrl@0 {
compatible = "aspeed,ast2500-lpc-ctrl";
reg = <0x0 0x80>;
clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
memory-region = <&flash_memory>;
flash = <&spi>;
};
};
LPC Host Controller
-------------------