Merge branches 'pm-cpuidle', 'pm-opp' and 'pm-tools'

* pm-cpuidle:
  intel_idle: Skylake Client Support - updated

* pm-opp:
  PM / OPP: Fix typo modifcation -> modification
  PM / OPP: of_property_count_u32_elems() can return errors

* pm-tools:
  tools/power turbosat: update version number
  tools/power turbostat: SKL: Adjust for TSC difference from base frequency
  tools/power turbostat: KNL workaround for %Busy and Avg_MHz
  tools/power turbostat: IVB Xeon: fix --debug regression
This commit is contained in:
Rafael J. Wysocki 2015-10-01 22:30:47 +02:00
commit eb6d1c287a
3 changed files with 56 additions and 12 deletions

View File

@ -892,10 +892,17 @@ static int opp_get_microvolt(struct dev_pm_opp *opp, struct device *dev)
u32 microvolt[3] = {0}; u32 microvolt[3] = {0};
int count, ret; int count, ret;
count = of_property_count_u32_elems(opp->np, "opp-microvolt"); /* Missing property isn't a problem, but an invalid entry is */
if (!count) if (!of_find_property(opp->np, "opp-microvolt", NULL))
return 0; return 0;
count = of_property_count_u32_elems(opp->np, "opp-microvolt");
if (count < 0) {
dev_err(dev, "%s: Invalid opp-microvolt property (%d)\n",
__func__, count);
return count;
}
/* There can be one or three elements here */ /* There can be one or three elements here */
if (count != 1 && count != 3) { if (count != 1 && count != 3) {
dev_err(dev, "%s: Invalid number of elements in opp-microvolt property (%d)\n", dev_err(dev, "%s: Invalid number of elements in opp-microvolt property (%d)\n",
@ -1063,7 +1070,7 @@ EXPORT_SYMBOL_GPL(dev_pm_opp_add);
* share a common logic which is isolated here. * share a common logic which is isolated here.
* *
* Return: -EINVAL for bad pointers, -ENOMEM if no memory available for the * Return: -EINVAL for bad pointers, -ENOMEM if no memory available for the
* copy operation, returns 0 if no modifcation was done OR modification was * copy operation, returns 0 if no modification was done OR modification was
* successful. * successful.
* *
* Locking: The internal device_opp and opp structures are RCU protected. * Locking: The internal device_opp and opp structures are RCU protected.
@ -1151,7 +1158,7 @@ unlock:
* mutex locking or synchronize_rcu() blocking calls cannot be used. * mutex locking or synchronize_rcu() blocking calls cannot be used.
* *
* Return: -EINVAL for bad pointers, -ENOMEM if no memory available for the * Return: -EINVAL for bad pointers, -ENOMEM if no memory available for the
* copy operation, returns 0 if no modifcation was done OR modification was * copy operation, returns 0 if no modification was done OR modification was
* successful. * successful.
*/ */
int dev_pm_opp_enable(struct device *dev, unsigned long freq) int dev_pm_opp_enable(struct device *dev, unsigned long freq)
@ -1177,7 +1184,7 @@ EXPORT_SYMBOL_GPL(dev_pm_opp_enable);
* mutex locking or synchronize_rcu() blocking calls cannot be used. * mutex locking or synchronize_rcu() blocking calls cannot be used.
* *
* Return: -EINVAL for bad pointers, -ENOMEM if no memory available for the * Return: -EINVAL for bad pointers, -ENOMEM if no memory available for the
* copy operation, returns 0 if no modifcation was done OR modification was * copy operation, returns 0 if no modification was done OR modification was
* successful. * successful.
*/ */
int dev_pm_opp_disable(struct device *dev, unsigned long freq) int dev_pm_opp_disable(struct device *dev, unsigned long freq)

View File

@ -620,7 +620,7 @@ static struct cpuidle_state skl_cstates[] = {
.name = "C6-SKL", .name = "C6-SKL",
.desc = "MWAIT 0x20", .desc = "MWAIT 0x20",
.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED, .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 75, .exit_latency = 85,
.target_residency = 200, .target_residency = 200,
.enter = &intel_idle, .enter = &intel_idle,
.enter_freeze = intel_idle_freeze, }, .enter_freeze = intel_idle_freeze, },
@ -636,10 +636,18 @@ static struct cpuidle_state skl_cstates[] = {
.name = "C8-SKL", .name = "C8-SKL",
.desc = "MWAIT 0x40", .desc = "MWAIT 0x40",
.flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED, .flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 174, .exit_latency = 200,
.target_residency = 800, .target_residency = 800,
.enter = &intel_idle, .enter = &intel_idle,
.enter_freeze = intel_idle_freeze, }, .enter_freeze = intel_idle_freeze, },
{
.name = "C9-SKL",
.desc = "MWAIT 0x50",
.flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 480,
.target_residency = 5000,
.enter = &intel_idle,
.enter_freeze = intel_idle_freeze, },
{ {
.name = "C10-SKL", .name = "C10-SKL",
.desc = "MWAIT 0x60", .desc = "MWAIT 0x60",

View File

@ -71,8 +71,11 @@ unsigned int extra_msr_offset32;
unsigned int extra_msr_offset64; unsigned int extra_msr_offset64;
unsigned int extra_delta_offset32; unsigned int extra_delta_offset32;
unsigned int extra_delta_offset64; unsigned int extra_delta_offset64;
unsigned int aperf_mperf_multiplier = 1;
int do_smi; int do_smi;
double bclk; double bclk;
double base_hz;
double tsc_tweak = 1.0;
unsigned int show_pkg; unsigned int show_pkg;
unsigned int show_core; unsigned int show_core;
unsigned int show_cpu; unsigned int show_cpu;
@ -502,7 +505,7 @@ int format_counters(struct thread_data *t, struct core_data *c,
/* %Busy */ /* %Busy */
if (has_aperf) { if (has_aperf) {
if (!skip_c0) if (!skip_c0)
outp += sprintf(outp, "%8.2f", 100.0 * t->mperf/t->tsc); outp += sprintf(outp, "%8.2f", 100.0 * t->mperf/t->tsc/tsc_tweak);
else else
outp += sprintf(outp, "********"); outp += sprintf(outp, "********");
} }
@ -510,7 +513,7 @@ int format_counters(struct thread_data *t, struct core_data *c,
/* Bzy_MHz */ /* Bzy_MHz */
if (has_aperf) if (has_aperf)
outp += sprintf(outp, "%8.0f", outp += sprintf(outp, "%8.0f",
1.0 * t->tsc / units * t->aperf / t->mperf / interval_float); 1.0 * t->tsc * tsc_tweak / units * t->aperf / t->mperf / interval_float);
/* TSC_MHz */ /* TSC_MHz */
outp += sprintf(outp, "%8.0f", 1.0 * t->tsc/units/interval_float); outp += sprintf(outp, "%8.0f", 1.0 * t->tsc/units/interval_float);
@ -984,6 +987,8 @@ int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
return -3; return -3;
if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf)) if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf))
return -4; return -4;
t->aperf = t->aperf * aperf_mperf_multiplier;
t->mperf = t->mperf * aperf_mperf_multiplier;
} }
if (do_smi) { if (do_smi) {
@ -1149,6 +1154,19 @@ int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV,
int amt_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV}; int amt_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV}; int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
static void
calculate_tsc_tweak()
{
unsigned long long msr;
unsigned int base_ratio;
get_msr(base_cpu, MSR_NHM_PLATFORM_INFO, &msr);
base_ratio = (msr >> 8) & 0xFF;
base_hz = base_ratio * bclk * 1000000;
tsc_tweak = base_hz / tsc_hz;
}
static void static void
dump_nhm_platform_info(void) dump_nhm_platform_info(void)
{ {
@ -1926,8 +1944,6 @@ int has_config_tdp(unsigned int family, unsigned int model)
switch (model) { switch (model) {
case 0x3A: /* IVB */ case 0x3A: /* IVB */
case 0x3E: /* IVB Xeon */
case 0x3C: /* HSW */ case 0x3C: /* HSW */
case 0x3F: /* HSX */ case 0x3F: /* HSX */
case 0x45: /* HSW */ case 0x45: /* HSW */
@ -2543,6 +2559,13 @@ int is_knl(unsigned int family, unsigned int model)
return 0; return 0;
} }
unsigned int get_aperf_mperf_multiplier(unsigned int family, unsigned int model)
{
if (is_knl(family, model))
return 1024;
return 1;
}
#define SLM_BCLK_FREQS 5 #define SLM_BCLK_FREQS 5
double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0}; double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0};
@ -2744,6 +2767,9 @@ void process_cpuid()
} }
} }
if (has_aperf)
aperf_mperf_multiplier = get_aperf_mperf_multiplier(family, model);
do_nhm_platform_info = do_nhm_cstates = do_smi = probe_nhm_msrs(family, model); do_nhm_platform_info = do_nhm_cstates = do_smi = probe_nhm_msrs(family, model);
do_snb_cstates = has_snb_msrs(family, model); do_snb_cstates = has_snb_msrs(family, model);
do_pc2 = do_snb_cstates && (pkg_cstate_limit >= PCL__2); do_pc2 = do_snb_cstates && (pkg_cstate_limit >= PCL__2);
@ -2762,6 +2788,9 @@ void process_cpuid()
if (debug) if (debug)
dump_cstate_pstate_config_info(); dump_cstate_pstate_config_info();
if (has_skl_msrs(family, model))
calculate_tsc_tweak();
return; return;
} }
@ -3090,7 +3119,7 @@ int get_and_dump_counters(void)
} }
void print_version() { void print_version() {
fprintf(stderr, "turbostat version 4.7 17-June, 2015" fprintf(stderr, "turbostat version 4.8 26-Sep, 2015"
" - Len Brown <lenb@kernel.org>\n"); " - Len Brown <lenb@kernel.org>\n");
} }