Merge branches 'pm-cpuidle', 'pm-opp' and 'pm-tools'
* pm-cpuidle: intel_idle: Skylake Client Support - updated * pm-opp: PM / OPP: Fix typo modifcation -> modification PM / OPP: of_property_count_u32_elems() can return errors * pm-tools: tools/power turbosat: update version number tools/power turbostat: SKL: Adjust for TSC difference from base frequency tools/power turbostat: KNL workaround for %Busy and Avg_MHz tools/power turbostat: IVB Xeon: fix --debug regression
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commit
eb6d1c287a
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@ -892,10 +892,17 @@ static int opp_get_microvolt(struct dev_pm_opp *opp, struct device *dev)
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u32 microvolt[3] = {0};
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u32 microvolt[3] = {0};
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int count, ret;
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int count, ret;
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count = of_property_count_u32_elems(opp->np, "opp-microvolt");
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/* Missing property isn't a problem, but an invalid entry is */
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if (!count)
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if (!of_find_property(opp->np, "opp-microvolt", NULL))
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return 0;
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return 0;
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count = of_property_count_u32_elems(opp->np, "opp-microvolt");
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if (count < 0) {
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dev_err(dev, "%s: Invalid opp-microvolt property (%d)\n",
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__func__, count);
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return count;
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}
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/* There can be one or three elements here */
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/* There can be one or three elements here */
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if (count != 1 && count != 3) {
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if (count != 1 && count != 3) {
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dev_err(dev, "%s: Invalid number of elements in opp-microvolt property (%d)\n",
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dev_err(dev, "%s: Invalid number of elements in opp-microvolt property (%d)\n",
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@ -1063,7 +1070,7 @@ EXPORT_SYMBOL_GPL(dev_pm_opp_add);
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* share a common logic which is isolated here.
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* share a common logic which is isolated here.
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*
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*
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* Return: -EINVAL for bad pointers, -ENOMEM if no memory available for the
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* Return: -EINVAL for bad pointers, -ENOMEM if no memory available for the
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* copy operation, returns 0 if no modifcation was done OR modification was
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* copy operation, returns 0 if no modification was done OR modification was
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* successful.
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* successful.
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*
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*
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* Locking: The internal device_opp and opp structures are RCU protected.
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* Locking: The internal device_opp and opp structures are RCU protected.
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@ -1151,7 +1158,7 @@ unlock:
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* mutex locking or synchronize_rcu() blocking calls cannot be used.
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* mutex locking or synchronize_rcu() blocking calls cannot be used.
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*
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*
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* Return: -EINVAL for bad pointers, -ENOMEM if no memory available for the
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* Return: -EINVAL for bad pointers, -ENOMEM if no memory available for the
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* copy operation, returns 0 if no modifcation was done OR modification was
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* copy operation, returns 0 if no modification was done OR modification was
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* successful.
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* successful.
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*/
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*/
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int dev_pm_opp_enable(struct device *dev, unsigned long freq)
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int dev_pm_opp_enable(struct device *dev, unsigned long freq)
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@ -1177,7 +1184,7 @@ EXPORT_SYMBOL_GPL(dev_pm_opp_enable);
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* mutex locking or synchronize_rcu() blocking calls cannot be used.
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* mutex locking or synchronize_rcu() blocking calls cannot be used.
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*
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*
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* Return: -EINVAL for bad pointers, -ENOMEM if no memory available for the
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* Return: -EINVAL for bad pointers, -ENOMEM if no memory available for the
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* copy operation, returns 0 if no modifcation was done OR modification was
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* copy operation, returns 0 if no modification was done OR modification was
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* successful.
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* successful.
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*/
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*/
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int dev_pm_opp_disable(struct device *dev, unsigned long freq)
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int dev_pm_opp_disable(struct device *dev, unsigned long freq)
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@ -620,7 +620,7 @@ static struct cpuidle_state skl_cstates[] = {
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.name = "C6-SKL",
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.name = "C6-SKL",
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.desc = "MWAIT 0x20",
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.desc = "MWAIT 0x20",
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.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
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.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
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.exit_latency = 75,
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.exit_latency = 85,
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.target_residency = 200,
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.target_residency = 200,
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.enter = &intel_idle,
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.enter = &intel_idle,
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.enter_freeze = intel_idle_freeze, },
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.enter_freeze = intel_idle_freeze, },
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@ -636,10 +636,18 @@ static struct cpuidle_state skl_cstates[] = {
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.name = "C8-SKL",
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.name = "C8-SKL",
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.desc = "MWAIT 0x40",
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.desc = "MWAIT 0x40",
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.flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED,
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.flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED,
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.exit_latency = 174,
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.exit_latency = 200,
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.target_residency = 800,
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.target_residency = 800,
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.enter = &intel_idle,
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.enter = &intel_idle,
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.enter_freeze = intel_idle_freeze, },
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.enter_freeze = intel_idle_freeze, },
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{
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.name = "C9-SKL",
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.desc = "MWAIT 0x50",
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.flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED,
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.exit_latency = 480,
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.target_residency = 5000,
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.enter = &intel_idle,
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.enter_freeze = intel_idle_freeze, },
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{
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{
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.name = "C10-SKL",
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.name = "C10-SKL",
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.desc = "MWAIT 0x60",
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.desc = "MWAIT 0x60",
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@ -71,8 +71,11 @@ unsigned int extra_msr_offset32;
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unsigned int extra_msr_offset64;
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unsigned int extra_msr_offset64;
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unsigned int extra_delta_offset32;
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unsigned int extra_delta_offset32;
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unsigned int extra_delta_offset64;
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unsigned int extra_delta_offset64;
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unsigned int aperf_mperf_multiplier = 1;
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int do_smi;
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int do_smi;
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double bclk;
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double bclk;
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double base_hz;
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double tsc_tweak = 1.0;
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unsigned int show_pkg;
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unsigned int show_pkg;
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unsigned int show_core;
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unsigned int show_core;
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unsigned int show_cpu;
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unsigned int show_cpu;
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@ -502,7 +505,7 @@ int format_counters(struct thread_data *t, struct core_data *c,
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/* %Busy */
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/* %Busy */
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if (has_aperf) {
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if (has_aperf) {
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if (!skip_c0)
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if (!skip_c0)
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outp += sprintf(outp, "%8.2f", 100.0 * t->mperf/t->tsc);
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outp += sprintf(outp, "%8.2f", 100.0 * t->mperf/t->tsc/tsc_tweak);
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else
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else
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outp += sprintf(outp, "********");
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outp += sprintf(outp, "********");
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}
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}
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@ -510,7 +513,7 @@ int format_counters(struct thread_data *t, struct core_data *c,
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/* Bzy_MHz */
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/* Bzy_MHz */
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if (has_aperf)
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if (has_aperf)
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outp += sprintf(outp, "%8.0f",
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outp += sprintf(outp, "%8.0f",
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1.0 * t->tsc / units * t->aperf / t->mperf / interval_float);
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1.0 * t->tsc * tsc_tweak / units * t->aperf / t->mperf / interval_float);
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/* TSC_MHz */
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/* TSC_MHz */
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outp += sprintf(outp, "%8.0f", 1.0 * t->tsc/units/interval_float);
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outp += sprintf(outp, "%8.0f", 1.0 * t->tsc/units/interval_float);
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@ -984,6 +987,8 @@ int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
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return -3;
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return -3;
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if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf))
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if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf))
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return -4;
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return -4;
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t->aperf = t->aperf * aperf_mperf_multiplier;
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t->mperf = t->mperf * aperf_mperf_multiplier;
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}
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}
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if (do_smi) {
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if (do_smi) {
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@ -1149,6 +1154,19 @@ int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV,
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int amt_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
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int amt_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
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int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
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int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
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static void
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calculate_tsc_tweak()
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{
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unsigned long long msr;
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unsigned int base_ratio;
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get_msr(base_cpu, MSR_NHM_PLATFORM_INFO, &msr);
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base_ratio = (msr >> 8) & 0xFF;
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base_hz = base_ratio * bclk * 1000000;
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tsc_tweak = base_hz / tsc_hz;
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}
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static void
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static void
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dump_nhm_platform_info(void)
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dump_nhm_platform_info(void)
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{
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{
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@ -1926,8 +1944,6 @@ int has_config_tdp(unsigned int family, unsigned int model)
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switch (model) {
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switch (model) {
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case 0x3A: /* IVB */
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case 0x3A: /* IVB */
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case 0x3E: /* IVB Xeon */
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case 0x3C: /* HSW */
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case 0x3C: /* HSW */
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case 0x3F: /* HSX */
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case 0x3F: /* HSX */
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case 0x45: /* HSW */
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case 0x45: /* HSW */
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@ -2543,6 +2559,13 @@ int is_knl(unsigned int family, unsigned int model)
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return 0;
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return 0;
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}
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}
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unsigned int get_aperf_mperf_multiplier(unsigned int family, unsigned int model)
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{
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if (is_knl(family, model))
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return 1024;
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return 1;
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}
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#define SLM_BCLK_FREQS 5
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#define SLM_BCLK_FREQS 5
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double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0};
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double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0};
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@ -2744,6 +2767,9 @@ void process_cpuid()
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}
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}
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}
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}
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if (has_aperf)
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aperf_mperf_multiplier = get_aperf_mperf_multiplier(family, model);
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do_nhm_platform_info = do_nhm_cstates = do_smi = probe_nhm_msrs(family, model);
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do_nhm_platform_info = do_nhm_cstates = do_smi = probe_nhm_msrs(family, model);
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do_snb_cstates = has_snb_msrs(family, model);
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do_snb_cstates = has_snb_msrs(family, model);
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do_pc2 = do_snb_cstates && (pkg_cstate_limit >= PCL__2);
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do_pc2 = do_snb_cstates && (pkg_cstate_limit >= PCL__2);
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@ -2762,6 +2788,9 @@ void process_cpuid()
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if (debug)
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if (debug)
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dump_cstate_pstate_config_info();
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dump_cstate_pstate_config_info();
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if (has_skl_msrs(family, model))
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calculate_tsc_tweak();
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return;
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return;
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}
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}
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@ -3090,7 +3119,7 @@ int get_and_dump_counters(void)
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}
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}
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void print_version() {
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void print_version() {
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fprintf(stderr, "turbostat version 4.7 17-June, 2015"
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fprintf(stderr, "turbostat version 4.8 26-Sep, 2015"
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" - Len Brown <lenb@kernel.org>\n");
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" - Len Brown <lenb@kernel.org>\n");
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}
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}
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