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ARM: dts: uniphier: add SoC-Glue node to UniPhier 32bit SoCs 

This node consists of various system-level configuration registers.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Masahiro Yamada 2016-06-14 11:59:45 +09:00 committed by Olof Johansson
parent fdaf72e52f
commit ebe161d3e4
7 changed files with 13 additions and 9 deletions
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10
arch/arm/boot/dts/uniphier-common32.dtsi
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@ -136,9 +136,13 @@
interrupt-controller;
};
pinctrl: pinctrl@5f801000 {
/* specify compatible in each SoC DTSI */
reg = <0x5f801000 0xe00>;
soc-glue@5f800000 {
compatible = "simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
pinctrl: pinctrl {
/* specify compatible in each SoC DTSI */
};
};
};
};

2
arch/arm/boot/dts/uniphier-ph1-ld4.dtsi
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@ -182,5 +182,5 @@
};
&pinctrl {
compatible = "socionext,ph1-ld4-pinctrl", "syscon";
compatible = "socionext,uniphier-ld4-pinctrl";
};

2
arch/arm/boot/dts/uniphier-ph1-ld6b.dtsi
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@ -63,5 +63,5 @@
* which makes the pinctrl driver unshareable.
*/
&pinctrl {
compatible = "socionext,ph1-ld6b-pinctrl", "syscon";
compatible = "socionext,uniphier-ld6b-pinctrl";
};

2
arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
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@ -200,5 +200,5 @@
};
&pinctrl {
compatible = "socionext,ph1-pro4-pinctrl", "syscon";
compatible = "socionext,uniphier-pro4-pinctrl";
};

2
arch/arm/boot/dts/uniphier-ph1-pro5.dtsi
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@ -194,5 +194,5 @@
};
&pinctrl {
compatible = "socionext,ph1-pro5-pinctrl", "syscon";
compatible = "socionext,uniphier-pro5-pinctrl";
};

2
arch/arm/boot/dts/uniphier-ph1-sld8.dtsi
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@ -181,5 +181,5 @@
};
&pinctrl {
compatible = "socionext,ph1-sld8-pinctrl", "syscon";
compatible = "socionext,uniphier-sld8-pinctrl";
};

2
arch/arm/boot/dts/uniphier-proxstream2.dtsi
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@ -205,5 +205,5 @@
};
&pinctrl {
compatible = "socionext,proxstream2-pinctrl", "syscon";
compatible = "socionext,uniphier-pxs2-pinctrl";
};