Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-2.6.26

This commit is contained in:
David S. Miller 2008-03-27 18:01:13 -07:00
commit ed85f2c3b2
40 changed files with 2052 additions and 880 deletions

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@ -284,7 +284,7 @@ config LIBERTAS_USB
config LIBERTAS_CS
tristate "Marvell Libertas 8385 CompactFlash 802.11b/g cards"
depends on LIBERTAS && PCMCIA && EXPERIMENTAL
depends on LIBERTAS && PCMCIA
select FW_LOADER
---help---
A driver for Marvell Libertas 8385 CompactFlash devices.

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@ -2,6 +2,13 @@ config IWLCORE
tristate "Intel Wireless Wifi Core"
depends on PCI && MAC80211 && WLAN_80211 && EXPERIMENTAL
config IWLWIFI_LEDS
bool "Enable LEDS features in iwlwifi driver"
depends on IWLCORE && MAC80211_LEDS && LEDS_CLASS
---help---
This option enables LEDS for the iwlwifi drivers
config IWL4965
tristate "Intel Wireless WiFi 4965AGN"
depends on PCI && MAC80211 && WLAN_80211 && EXPERIMENTAL
@ -37,6 +44,13 @@ config IWL4965_HT
This option enables IEEE 802.11n High Throughput features
for the iwl4965 driver.
config IWL4965_LEDS
bool "Enable LEDS features in iwl4965 driver"
depends on IWL4965 && IWLWIFI_LEDS
---help---
This option enables LEDS for the iwlwifi drivers
config IWL4965_SPECTRUM_MEASUREMENT
bool "Enable Spectrum Measurement in iwl4965 driver"
depends on IWL4965
@ -114,6 +128,12 @@ config IWL3945_SPECTRUM_MEASUREMENT
---help---
This option will enable spectrum measurement for the iwl3945 driver.
config IWL3945_LEDS
bool "Enable LEDS features in iwl3945 driver"
depends on IWL3945 && MAC80211_LEDS && LEDS_CLASS
---help---
This option enables LEDS for the iwl3945 driver.
config IWL3945_DEBUG
bool "Enable full debugging output in iwl3945 driver"
depends on IWL3945

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@ -5,8 +5,18 @@ ifeq ($(CONFIG_IWLWIFI_DEBUGFS),y)
iwlcore-objs += iwl-debugfs.o
endif
ifeq ($(CONFIG_IWLWIFI_LEDS),y)
iwlcore-objs += iwl-led.o
endif
obj-$(CONFIG_IWL3945) += iwl3945.o
iwl3945-objs = iwl3945-base.o iwl-3945.o iwl-3945-rs.o
ifeq ($(CONFIG_IWL3945_LEDS),y)
iwl3945-objs += iwl-3945-led.o
endif
obj-$(CONFIG_IWL4965) += iwl4965.o
iwl4965-objs = iwl4965-base.o iwl-4965.o iwl-4965-rs.o

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@ -0,0 +1,433 @@
/******************************************************************************
*
* Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* James P. Ketrenos <ipw2100-admin@linux.intel.com>
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*
*****************************************************************************/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/version.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/dma-mapping.h>
#include <linux/delay.h>
#include <linux/skbuff.h>
#include <linux/netdevice.h>
#include <linux/wireless.h>
#include <net/mac80211.h>
#include <linux/etherdevice.h>
#include <asm/unaligned.h>
#include "iwl-3945.h"
#include "iwl-helpers.h"
#define IWL_1MB_RATE (128 * 1024)
#define IWL_LED_THRESHOLD (16)
#define IWL_MAX_BLINK_TBL (10)
static const struct {
u16 brightness;
u8 on_time;
u8 of_time;
} blink_tbl[] =
{
{300, 25, 25},
{200, 40, 40},
{100, 55, 55},
{70, 65, 65},
{50, 75, 75},
{20, 85, 85},
{15, 95, 95 },
{10, 110, 110},
{5, 130, 130},
{0, 167, 167}
};
static int iwl3945_led_cmd_callback(struct iwl3945_priv *priv,
struct iwl3945_cmd *cmd,
struct sk_buff *skb)
{
return 1;
}
/* Send led command */
static int iwl_send_led_cmd(struct iwl3945_priv *priv,
struct iwl3945_led_cmd *led_cmd)
{
struct iwl3945_host_cmd cmd = {
.id = REPLY_LEDS_CMD,
.len = sizeof(struct iwl3945_led_cmd),
.data = led_cmd,
.meta.flags = CMD_ASYNC,
.meta.u.callback = iwl3945_led_cmd_callback
};
return iwl3945_send_cmd(priv, &cmd);
}
/* Set led on command */
static int iwl3945_led_on(struct iwl3945_priv *priv, int led_id)
{
struct iwl3945_led_cmd led_cmd = {
.id = led_id,
.on = IWL_LED_SOLID,
.off = 0,
.interval = IWL_DEF_LED_INTRVL
};
return iwl_send_led_cmd(priv, &led_cmd);
}
/* Set led on command */
static int iwl3945_led_pattern(struct iwl3945_priv *priv, int led_id,
enum led_brightness brightness)
{
struct iwl3945_led_cmd led_cmd = {
.id = led_id,
.on = brightness,
.off = brightness,
.interval = IWL_DEF_LED_INTRVL
};
if (brightness == LED_FULL) {
led_cmd.on = IWL_LED_SOLID;
led_cmd.off = 0;
}
return iwl_send_led_cmd(priv, &led_cmd);
}
/* Set led register off */
static int iwl3945_led_on_reg(struct iwl3945_priv *priv, int led_id)
{
IWL_DEBUG_LED("led on %d\n", led_id);
return iwl3945_led_on(priv, led_id);
}
/* Set led off command */
static int iwl3945_led_off(struct iwl3945_priv *priv, int led_id)
{
struct iwl3945_led_cmd led_cmd = {
.id = led_id,
.on = 0,
.off = 0,
.interval = IWL_DEF_LED_INTRVL
};
IWL_DEBUG_LED("led off %d\n", led_id);
return iwl_send_led_cmd(priv, &led_cmd);
}
/* Set led register off */
static int iwl3945_led_off_reg(struct iwl3945_priv *priv, int led_id)
{
iwl3945_led_off(priv, led_id);
return 0;
}
/* Set led blink command */
static int iwl3945_led_not_solid(struct iwl3945_priv *priv, int led_id,
u8 brightness)
{
struct iwl3945_led_cmd led_cmd = {
.id = led_id,
.on = brightness,
.off = brightness,
.interval = IWL_DEF_LED_INTRVL
};
return iwl_send_led_cmd(priv, &led_cmd);
}
/*
* brightness call back function for Tx/Rx LED
*/
static int iwl3945_led_associated(struct iwl3945_priv *priv, int led_id)
{
if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
!test_bit(STATUS_READY, &priv->status))
return 0;
/* start counting Tx/Rx bytes */
if (!priv->last_blink_time && priv->allow_blinking)
priv->last_blink_time = jiffies;
return 0;
}
/*
* brightness call back for association and radio
*/
static void iwl3945_led_brightness_set(struct led_classdev *led_cdev,
enum led_brightness brightness)
{
struct iwl3945_led *led = container_of(led_cdev,
struct iwl3945_led, led_dev);
struct iwl3945_priv *priv = led->priv;
if (test_bit(STATUS_EXIT_PENDING, &priv->status))
return;
switch (brightness) {
case LED_FULL:
if (led->type == IWL_LED_TRG_ASSOC) {
priv->allow_blinking = 1;
IWL_DEBUG_LED("MAC is associated\n");
}
if (led->led_on)
led->led_on(priv, IWL_LED_LINK);
break;
case LED_OFF:
if (led->type == IWL_LED_TRG_ASSOC) {
priv->allow_blinking = 0;
IWL_DEBUG_LED("MAC is disassociated\n");
}
if (led->led_off)
led->led_off(priv, IWL_LED_LINK);
break;
default:
if (led->led_pattern)
led->led_pattern(priv, IWL_LED_LINK, brightness);
break;
}
}
/*
* Register led class with the system
*/
static int iwl3945_led_register_led(struct iwl3945_priv *priv,
struct iwl3945_led *led,
enum led_type type, u8 set_led,
const char *name, char *trigger)
{
struct device *device = wiphy_dev(priv->hw->wiphy);
int ret;
led->led_dev.name = name;
led->led_dev.brightness_set = iwl3945_led_brightness_set;
led->led_dev.default_trigger = trigger;
ret = led_classdev_register(device, &led->led_dev);
if (ret) {
IWL_ERROR("Error: failed to register led handler.\n");
return ret;
}
led->priv = priv;
led->type = type;
led->registered = 1;
if (set_led && led->led_on)
led->led_on(priv, IWL_LED_LINK);
return 0;
}
/*
* calculate blink rate according to last 2 sec Tx/Rx activities
*/
static inline u8 get_blink_rate(struct iwl3945_priv *priv)
{
int index;
u8 blink_rate;
if (priv->rxtxpackets < IWL_LED_THRESHOLD)
index = 10;
else {
for (index = 0; index < IWL_MAX_BLINK_TBL; index++) {
if (priv->rxtxpackets > (blink_tbl[index].brightness *
IWL_1MB_RATE))
break;
}
}
/* if 0 frame is transfered */
if ((index == IWL_MAX_BLINK_TBL) || !priv->allow_blinking)
blink_rate = IWL_LED_SOLID;
else
blink_rate = blink_tbl[index].on_time;
return blink_rate;
}
static inline int is_rf_kill(struct iwl3945_priv *priv)
{
return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
test_bit(STATUS_RF_KILL_SW, &priv->status);
}
/*
* this function called from handler. Since setting Led command can
* happen very frequent we postpone led command to be called from
* REPLY handler so we know ucode is up
*/
void iwl3945_led_background(struct iwl3945_priv *priv)
{
u8 blink_rate;
if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
priv->last_blink_time = 0;
return;
}
if (is_rf_kill(priv)) {
priv->last_blink_time = 0;
return;
}
if (!priv->allow_blinking) {
priv->last_blink_time = 0;
if (priv->last_blink_rate != IWL_LED_SOLID) {
priv->last_blink_rate = IWL_LED_SOLID;
iwl3945_led_on(priv, IWL_LED_LINK);
}
return;
}
if (!priv->last_blink_time ||
!time_after(jiffies, priv->last_blink_time +
msecs_to_jiffies(1000)))
return;
blink_rate = get_blink_rate(priv);
/* call only if blink rate change */
if (blink_rate != priv->last_blink_rate) {
if (blink_rate != IWL_LED_SOLID) {
priv->last_blink_time = jiffies +
msecs_to_jiffies(1000);
iwl3945_led_not_solid(priv, IWL_LED_LINK, blink_rate);
} else {
priv->last_blink_time = 0;
iwl3945_led_on(priv, IWL_LED_LINK);
}
}
priv->last_blink_rate = blink_rate;
priv->rxtxpackets = 0;
}
/* Register all led handler */
int iwl3945_led_register(struct iwl3945_priv *priv)
{
char *trigger;
char name[32];
int ret;
priv->last_blink_rate = 0;
priv->rxtxpackets = 0;
priv->last_blink_time = 0;
priv->allow_blinking = 0;
trigger = ieee80211_get_radio_led_name(priv->hw);
snprintf(name, sizeof(name), "iwl-%s:radio",
wiphy_name(priv->hw->wiphy));
priv->led[IWL_LED_TRG_RADIO].led_on = iwl3945_led_on_reg;
priv->led[IWL_LED_TRG_RADIO].led_off = iwl3945_led_off_reg;
priv->led[IWL_LED_TRG_RADIO].led_pattern = NULL;
ret = iwl3945_led_register_led(priv,
&priv->led[IWL_LED_TRG_RADIO],
IWL_LED_TRG_RADIO, 1,
name, trigger);
if (ret)
goto exit_fail;
trigger = ieee80211_get_assoc_led_name(priv->hw);
snprintf(name, sizeof(name), "iwl-%s:assoc",
wiphy_name(priv->hw->wiphy));
ret = iwl3945_led_register_led(priv,
&priv->led[IWL_LED_TRG_ASSOC],
IWL_LED_TRG_ASSOC, 0,
name, trigger);
/* for assoc always turn led on */
priv->led[IWL_LED_TRG_ASSOC].led_on = iwl3945_led_on_reg;
priv->led[IWL_LED_TRG_ASSOC].led_off = iwl3945_led_on_reg;
priv->led[IWL_LED_TRG_ASSOC].led_pattern = NULL;
if (ret)
goto exit_fail;
trigger = ieee80211_get_rx_led_name(priv->hw);
snprintf(name, sizeof(name), "iwl-%s:RX",
wiphy_name(priv->hw->wiphy));
ret = iwl3945_led_register_led(priv,
&priv->led[IWL_LED_TRG_RX],
IWL_LED_TRG_RX, 0,
name, trigger);
priv->led[IWL_LED_TRG_RX].led_on = iwl3945_led_associated;
priv->led[IWL_LED_TRG_RX].led_off = iwl3945_led_associated;
priv->led[IWL_LED_TRG_RX].led_pattern = iwl3945_led_pattern;
if (ret)
goto exit_fail;
trigger = ieee80211_get_tx_led_name(priv->hw);
snprintf(name, sizeof(name), "iwl-%s:TX",
wiphy_name(priv->hw->wiphy));
ret = iwl3945_led_register_led(priv,
&priv->led[IWL_LED_TRG_TX],
IWL_LED_TRG_TX, 0,
name, trigger);
priv->led[IWL_LED_TRG_TX].led_on = iwl3945_led_associated;
priv->led[IWL_LED_TRG_TX].led_off = iwl3945_led_associated;
priv->led[IWL_LED_TRG_TX].led_pattern = iwl3945_led_pattern;
if (ret)
goto exit_fail;
return 0;
exit_fail:
iwl3945_led_unregister(priv);
return ret;
}
/* unregister led class */
static void iwl3945_led_unregister_led(struct iwl3945_led *led, u8 set_led)
{
if (!led->registered)
return;
led_classdev_unregister(&led->led_dev);
if (set_led)
led->led_dev.brightness_set(&led->led_dev, LED_OFF);
led->registered = 0;
}
/* Unregister all led handlers */
void iwl3945_led_unregister(struct iwl3945_priv *priv)
{
iwl3945_led_unregister_led(&priv->led[IWL_LED_TRG_ASSOC], 0);
iwl3945_led_unregister_led(&priv->led[IWL_LED_TRG_RX], 0);
iwl3945_led_unregister_led(&priv->led[IWL_LED_TRG_TX], 0);
iwl3945_led_unregister_led(&priv->led[IWL_LED_TRG_RADIO], 1);
}

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@ -0,0 +1,73 @@
/******************************************************************************
*
* Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* James P. Ketrenos <ipw2100-admin@linux.intel.com>
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*
*****************************************************************************/
#ifndef IWL3945_LEDS_H
#define IWL3945_LEDS_H
struct iwl3945_priv;
#ifdef CONFIG_IWL3945_LEDS
#define IWL_LED_SOLID 11
#define IWL_LED_NAME_LEN 31
#define IWL_DEF_LED_INTRVL __constant_cpu_to_le32(1000)
#define IWL_LED_ACTIVITY (0<<1)
#define IWL_LED_LINK (1<<1)
enum led_type {
IWL_LED_TRG_TX,
IWL_LED_TRG_RX,
IWL_LED_TRG_ASSOC,
IWL_LED_TRG_RADIO,
IWL_LED_TRG_MAX,
};
#include <linux/leds.h>
struct iwl3945_led {
struct iwl3945_priv *priv;
struct led_classdev led_dev;
int (*led_on) (struct iwl3945_priv *priv, int led_id);
int (*led_off) (struct iwl3945_priv *priv, int led_id);
int (*led_pattern) (struct iwl3945_priv *priv, int led_id,
enum led_brightness brightness);
enum led_type type;
unsigned int registered;
};
extern int iwl3945_led_register(struct iwl3945_priv *priv);
extern void iwl3945_led_unregister(struct iwl3945_priv *priv);
extern void iwl3945_led_background(struct iwl3945_priv *priv);
#else
static inline int iwl3945_led_register(struct iwl3945_priv *priv) { return 0; }
static inline void iwl3945_led_unregister(struct iwl3945_priv *priv) {}
static inline void iwl3945_led_background(struct iwl3945_priv *priv) {}
#endif /* CONFIG_IWL3945_LEDS */
#endif /* IWL3945_LEDS_H */

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@ -358,6 +358,8 @@ void iwl3945_hw_rx_statistics(struct iwl3945_priv *priv, struct iwl3945_rx_mem_b
memcpy(&priv->statistics, pkt->u.raw, sizeof(priv->statistics));
iwl3945_led_background(priv);
priv->last_statistics_time = jiffies;
}
@ -640,6 +642,10 @@ static void iwl3945_handle_data_packet(struct iwl3945_priv *priv, int is_data,
if (priv->add_radiotap)
iwl3945_add_radiotap(priv, rxb->skb, rx_hdr, stats);
#ifdef CONFIG_IWL3945_LEDS
if (is_data)
priv->rxtxpackets += len;
#endif
ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
rxb->skb = NULL;
}

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@ -44,6 +44,7 @@ extern struct pci_device_id iwl3945_hw_card_ids[];
#include "iwl-prph.h"
#include "iwl-3945-hw.h"
#include "iwl-3945-debug.h"
#include "iwl-3945-led.h"
/* Change firmware file name, using "-" and incrementing number,
* *only* when uCode interface or architecture changes so that it
@ -777,13 +778,15 @@ struct iwl3945_priv {
struct iwl3945_init_alive_resp card_alive_init;
struct iwl3945_alive_resp card_alive;
#ifdef LED
/* LED related variables */
struct iwl3945_activity_blink activity;
unsigned long led_packets;
int led_state;
#ifdef CONFIG_IWL4965_LEDS
struct iwl3945_led led[IWL_LED_TRG_MAX];
unsigned long last_blink_time;
u8 last_blink_rate;
u8 allow_blinking;
unsigned int rxtxpackets;
#endif
u16 active_rate;
u16 active_rate_basic;
@ -827,7 +830,7 @@ struct iwl3945_priv {
struct iwl3945_station_entry stations[IWL_STATION_COUNT];
/* Indication if ieee80211_ops->open has been called */
int is_open;
u8 is_open;
u8 mac80211_registered;
@ -848,7 +851,7 @@ struct iwl3945_priv {
/* eeprom */
struct iwl3945_eeprom eeprom;
int iw_mode;
enum ieee80211_if_types iw_mode;
struct sk_buff *ibss_beacon;

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@ -1,426 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
*
* Portions of this file are derived from the ipw3945 project.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* James P. Ketrenos <ipw2100-admin@linux.intel.com>
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*
*****************************************************************************/
#ifndef __iwl4965_io_h__
#define __iwl4965_io_h__
#include <linux/io.h>
#include "iwl-debug.h"
/*
* IO, register, and NIC memory access functions
*
* NOTE on naming convention and macro usage for these
*
* A single _ prefix before a an access function means that no state
* check or debug information is printed when that function is called.
*
* A double __ prefix before an access function means that state is checked
* and the current line number is printed in addition to any other debug output.
*
* The non-prefixed name is the #define that maps the caller into a
* #define that provides the caller's __LINE__ to the double prefix version.
*
* If you wish to call the function without any debug or state checking,
* you should use the single _ prefix version (as is used by dependent IO
* routines, for example _iwl4965_read_direct32 calls the non-check version of
* _iwl4965_read32.)
*
* These declarations are *extremely* useful in quickly isolating code deltas
* which result in misconfiguring of the hardware I/O. In combination with
* git-bisect and the IO debug level you can quickly determine the specific
* commit which breaks the IO sequence to the hardware.
*
*/
#define _iwl4965_write32(priv, ofs, val) writel((val), (priv)->hw_base + (ofs))
#ifdef CONFIG_IWLWIFI_DEBUG
static inline void __iwl4965_write32(const char *f, u32 l, struct iwl_priv *priv,
u32 ofs, u32 val)
{
IWL_DEBUG_IO("write32(0x%08X, 0x%08X) - %s %d\n", ofs, val, f, l);
_iwl4965_write32(priv, ofs, val);
}
#define iwl4965_write32(priv, ofs, val) \
__iwl4965_write32(__FILE__, __LINE__, priv, ofs, val)
#else
#define iwl4965_write32(priv, ofs, val) _iwl4965_write32(priv, ofs, val)
#endif
#define _iwl4965_read32(priv, ofs) readl((priv)->hw_base + (ofs))
#ifdef CONFIG_IWLWIFI_DEBUG
static inline u32 __iwl4965_read32(char *f, u32 l, struct iwl_priv *priv, u32 ofs)
{
IWL_DEBUG_IO("read_direct32(0x%08X) - %s %d\n", ofs, f, l);
return _iwl4965_read32(priv, ofs);
}
#define iwl4965_read32(priv, ofs) __iwl4965_read32(__FILE__, __LINE__, priv, ofs)
#else
#define iwl4965_read32(p, o) _iwl4965_read32(p, o)
#endif
static inline int _iwl4965_poll_bit(struct iwl_priv *priv, u32 addr,
u32 bits, u32 mask, int timeout)
{
int i = 0;
do {
if ((_iwl4965_read32(priv, addr) & mask) == (bits & mask))
return i;
mdelay(10);
i += 10;
} while (i < timeout);
return -ETIMEDOUT;
}
#ifdef CONFIG_IWLWIFI_DEBUG
static inline int __iwl4965_poll_bit(const char *f, u32 l,
struct iwl_priv *priv, u32 addr,
u32 bits, u32 mask, int timeout)
{
int ret = _iwl4965_poll_bit(priv, addr, bits, mask, timeout);
IWL_DEBUG_IO("poll_bit(0x%08X, 0x%08X, 0x%08X) - %s- %s %d\n",
addr, bits, mask,
unlikely(ret == -ETIMEDOUT)?"timeout":"", f, l);
return ret;
}
#define iwl4965_poll_bit(priv, addr, bits, mask, timeout) \
__iwl4965_poll_bit(__FILE__, __LINE__, priv, addr, bits, mask, timeout)
#else
#define iwl4965_poll_bit(p, a, b, m, t) _iwl4965_poll_bit(p, a, b, m, t)
#endif
static inline void _iwl4965_set_bit(struct iwl_priv *priv, u32 reg, u32 mask)
{
_iwl4965_write32(priv, reg, _iwl4965_read32(priv, reg) | mask);
}
#ifdef CONFIG_IWLWIFI_DEBUG
static inline void __iwl4965_set_bit(const char *f, u32 l,
struct iwl_priv *priv, u32 reg, u32 mask)
{
u32 val = _iwl4965_read32(priv, reg) | mask;
IWL_DEBUG_IO("set_bit(0x%08X, 0x%08X) = 0x%08X\n", reg, mask, val);
_iwl4965_write32(priv, reg, val);
}
#define iwl4965_set_bit(p, r, m) __iwl4965_set_bit(__FILE__, __LINE__, p, r, m)
#else
#define iwl4965_set_bit(p, r, m) _iwl4965_set_bit(p, r, m)
#endif
static inline void _iwl4965_clear_bit(struct iwl_priv *priv, u32 reg, u32 mask)
{
_iwl4965_write32(priv, reg, _iwl4965_read32(priv, reg) & ~mask);
}
#ifdef CONFIG_IWLWIFI_DEBUG
static inline void __iwl4965_clear_bit(const char *f, u32 l,
struct iwl_priv *priv, u32 reg, u32 mask)
{
u32 val = _iwl4965_read32(priv, reg) & ~mask;
IWL_DEBUG_IO("clear_bit(0x%08X, 0x%08X) = 0x%08X\n", reg, mask, val);
_iwl4965_write32(priv, reg, val);
}
#define iwl4965_clear_bit(p, r, m) __iwl4965_clear_bit(__FILE__, __LINE__, p, r, m)
#else
#define iwl4965_clear_bit(p, r, m) _iwl4965_clear_bit(p, r, m)
#endif
static inline int _iwl4965_grab_nic_access(struct iwl_priv *priv)
{
int ret;
u32 gp_ctl;
#ifdef CONFIG_IWLWIFI_DEBUG
if (atomic_read(&priv->restrict_refcnt))
return 0;
#endif
if (test_bit(STATUS_RF_KILL_HW, &priv->status) ||
test_bit(STATUS_RF_KILL_SW, &priv->status)) {
IWL_WARNING("WARNING: Requesting MAC access during RFKILL "
"wakes up NIC\n");
/* 10 msec allows time for NIC to complete its data save */
gp_ctl = _iwl4965_read32(priv, CSR_GP_CNTRL);
if (gp_ctl & CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY) {
IWL_DEBUG_RF_KILL("Wait for complete power-down, "
"gpctl = 0x%08x\n", gp_ctl);
mdelay(10);
} else
IWL_DEBUG_RF_KILL("power-down complete, "
"gpctl = 0x%08x\n", gp_ctl);
}
/* this bit wakes up the NIC */
_iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
ret = _iwl4965_poll_bit(priv, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN,
(CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY |
CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 50);
if (ret < 0) {
IWL_ERROR("MAC is in deep sleep!\n");
return -EIO;
}
#ifdef CONFIG_IWLWIFI_DEBUG
atomic_inc(&priv->restrict_refcnt);
#endif
return 0;
}
#ifdef CONFIG_IWLWIFI_DEBUG
static inline int __iwl4965_grab_nic_access(const char *f, u32 l,
struct iwl_priv *priv)
{
if (atomic_read(&priv->restrict_refcnt))
IWL_DEBUG_INFO("Grabbing access while already held at "
"line %d.\n", l);
IWL_DEBUG_IO("grabbing nic access - %s %d\n", f, l);
return _iwl4965_grab_nic_access(priv);
}
#define iwl4965_grab_nic_access(priv) \
__iwl4965_grab_nic_access(__FILE__, __LINE__, priv)
#else
#define iwl4965_grab_nic_access(priv) \
_iwl4965_grab_nic_access(priv)
#endif
static inline void _iwl4965_release_nic_access(struct iwl_priv *priv)
{
#ifdef CONFIG_IWLWIFI_DEBUG
if (atomic_dec_and_test(&priv->restrict_refcnt))
#endif
_iwl4965_clear_bit(priv, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
}
#ifdef CONFIG_IWLWIFI_DEBUG
static inline void __iwl4965_release_nic_access(const char *f, u32 l,
struct iwl_priv *priv)
{
if (atomic_read(&priv->restrict_refcnt) <= 0)
IWL_ERROR("Release unheld nic access at line %d.\n", l);
IWL_DEBUG_IO("releasing nic access - %s %d\n", f, l);
_iwl4965_release_nic_access(priv);
}
#define iwl4965_release_nic_access(priv) \
__iwl4965_release_nic_access(__FILE__, __LINE__, priv)
#else
#define iwl4965_release_nic_access(priv) \
_iwl4965_release_nic_access(priv)
#endif
static inline u32 _iwl4965_read_direct32(struct iwl_priv *priv, u32 reg)
{
return _iwl4965_read32(priv, reg);
}
#ifdef CONFIG_IWLWIFI_DEBUG
static inline u32 __iwl4965_read_direct32(const char *f, u32 l,
struct iwl_priv *priv, u32 reg)
{
u32 value = _iwl4965_read_direct32(priv, reg);
if (!atomic_read(&priv->restrict_refcnt))
IWL_ERROR("Nic access not held from %s %d\n", f, l);
IWL_DEBUG_IO("read_direct32(0x%4X) = 0x%08x - %s %d \n", reg, value,
f, l);
return value;
}
#define iwl4965_read_direct32(priv, reg) \
__iwl4965_read_direct32(__FILE__, __LINE__, priv, reg)
#else
#define iwl4965_read_direct32 _iwl4965_read_direct32
#endif
static inline void _iwl4965_write_direct32(struct iwl_priv *priv,
u32 reg, u32 value)
{
_iwl4965_write32(priv, reg, value);
}
#ifdef CONFIG_IWLWIFI_DEBUG
static void __iwl4965_write_direct32(u32 line,
struct iwl_priv *priv, u32 reg, u32 value)
{
if (!atomic_read(&priv->restrict_refcnt))
IWL_ERROR("Nic access not held from line %d\n", line);
_iwl4965_write_direct32(priv, reg, value);
}
#define iwl4965_write_direct32(priv, reg, value) \
__iwl4965_write_direct32(__LINE__, priv, reg, value)
#else
#define iwl4965_write_direct32 _iwl4965_write_direct32
#endif
static inline void iwl4965_write_reg_buf(struct iwl_priv *priv,
u32 reg, u32 len, u32 *values)
{
u32 count = sizeof(u32);
if ((priv != NULL) && (values != NULL)) {
for (; 0 < len; len -= count, reg += count, values++)
_iwl4965_write_direct32(priv, reg, *values);
}
}
static inline int _iwl4965_poll_direct_bit(struct iwl_priv *priv,
u32 addr, u32 mask, int timeout)
{
int i = 0;
do {
if ((_iwl4965_read_direct32(priv, addr) & mask) == mask)
return i;
mdelay(10);
i += 10;
} while (i < timeout);
return -ETIMEDOUT;
}
#ifdef CONFIG_IWLWIFI_DEBUG
static inline int __iwl4965_poll_direct_bit(const char *f, u32 l,
struct iwl_priv *priv,
u32 addr, u32 mask, int timeout)
{
int ret = _iwl4965_poll_direct_bit(priv, addr, mask, timeout);
if (unlikely(ret == -ETIMEDOUT))
IWL_DEBUG_IO("poll_direct_bit(0x%08X, 0x%08X) - "
"timedout - %s %d\n", addr, mask, f, l);
else
IWL_DEBUG_IO("poll_direct_bit(0x%08X, 0x%08X) = 0x%08X "
"- %s %d\n", addr, mask, ret, f, l);
return ret;
}
#define iwl4965_poll_direct_bit(priv, addr, mask, timeout) \
__iwl4965_poll_direct_bit(__FILE__, __LINE__, priv, addr, mask, timeout)
#else
#define iwl4965_poll_direct_bit _iwl4965_poll_direct_bit
#endif
static inline u32 _iwl4965_read_prph(struct iwl_priv *priv, u32 reg)
{
_iwl4965_write_direct32(priv, HBUS_TARG_PRPH_RADDR, reg | (3 << 24));
return _iwl4965_read_direct32(priv, HBUS_TARG_PRPH_RDAT);
}
#ifdef CONFIG_IWLWIFI_DEBUG
static inline u32 __iwl4965_read_prph(u32 line, struct iwl_priv *priv, u32 reg)
{
if (!atomic_read(&priv->restrict_refcnt))
IWL_ERROR("Nic access not held from line %d\n", line);
return _iwl4965_read_prph(priv, reg);
}
#define iwl4965_read_prph(priv, reg) \
__iwl4965_read_prph(__LINE__, priv, reg)
#else
#define iwl4965_read_prph _iwl4965_read_prph
#endif
static inline void _iwl4965_write_prph(struct iwl_priv *priv,
u32 addr, u32 val)
{
_iwl4965_write_direct32(priv, HBUS_TARG_PRPH_WADDR,
((addr & 0x0000FFFF) | (3 << 24)));
_iwl4965_write_direct32(priv, HBUS_TARG_PRPH_WDAT, val);
}
#ifdef CONFIG_IWLWIFI_DEBUG
static inline void __iwl4965_write_prph(u32 line, struct iwl_priv *priv,
u32 addr, u32 val)
{
if (!atomic_read(&priv->restrict_refcnt))
IWL_ERROR("Nic access from line %d\n", line);
_iwl4965_write_prph(priv, addr, val);
}
#define iwl4965_write_prph(priv, addr, val) \
__iwl4965_write_prph(__LINE__, priv, addr, val);
#else
#define iwl4965_write_prph _iwl4965_write_prph
#endif
#define _iwl4965_set_bits_prph(priv, reg, mask) \
_iwl4965_write_prph(priv, reg, (_iwl4965_read_prph(priv, reg) | mask))
#ifdef CONFIG_IWLWIFI_DEBUG
static inline void __iwl4965_set_bits_prph(u32 line, struct iwl_priv *priv,
u32 reg, u32 mask)
{
if (!atomic_read(&priv->restrict_refcnt))
IWL_ERROR("Nic access not held from line %d\n", line);
_iwl4965_set_bits_prph(priv, reg, mask);
}
#define iwl4965_set_bits_prph(priv, reg, mask) \
__iwl4965_set_bits_prph(__LINE__, priv, reg, mask)
#else
#define iwl4965_set_bits_prph _iwl4965_set_bits_prph
#endif
#define _iwl4965_set_bits_mask_prph(priv, reg, bits, mask) \
_iwl4965_write_prph(priv, reg, ((_iwl4965_read_prph(priv, reg) & mask) | bits))
#ifdef CONFIG_IWLWIFI_DEBUG
static inline void __iwl4965_set_bits_mask_prph(u32 line,
struct iwl_priv *priv, u32 reg, u32 bits, u32 mask)
{
if (!atomic_read(&priv->restrict_refcnt))
IWL_ERROR("Nic access not held from line %d\n", line);
_iwl4965_set_bits_mask_prph(priv, reg, bits, mask);
}
#define iwl4965_set_bits_mask_prph(priv, reg, bits, mask) \
__iwl4965_set_bits_mask_prph(__LINE__, priv, reg, bits, mask)
#else
#define iwl4965_set_bits_mask_prph _iwl4965_set_bits_mask_prph
#endif
static inline void iwl4965_clear_bits_prph(struct iwl_priv
*priv, u32 reg, u32 mask)
{
u32 val = _iwl4965_read_prph(priv, reg);
_iwl4965_write_prph(priv, reg, (val & ~mask));
}
static inline u32 iwl4965_read_targ_mem(struct iwl_priv *priv, u32 addr)
{
iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, addr);
return iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
}
static inline void iwl4965_write_targ_mem(struct iwl_priv *priv, u32 addr, u32 val)
{
iwl4965_write_direct32(priv, HBUS_TARG_MEM_WADDR, addr);
iwl4965_write_direct32(priv, HBUS_TARG_MEM_WDAT, val);
}
static inline void iwl4965_write_targ_mem_buf(struct iwl_priv *priv, u32 addr,
u32 len, u32 *values)
{
iwl4965_write_direct32(priv, HBUS_TARG_MEM_WADDR, addr);
for (; 0 < len; len -= sizeof(u32), values++)
iwl4965_write_direct32(priv, HBUS_TARG_MEM_WDAT, *values);
}
#endif

View File

@ -397,7 +397,7 @@ static void rs_tl_turn_on_agg_for_tid(struct iwl_priv *priv,
DECLARE_MAC_BUF(mac);
spin_lock_bh(&sta->ampdu_mlme.ampdu_tx);
state = sta->ampdu_mlme.tid_tx[tid].state;
state = sta->ampdu_mlme.tid_state_tx[tid];
spin_unlock_bh(&sta->ampdu_mlme.ampdu_tx);
if (state == HT_AGG_STATE_IDLE &&

View File

@ -41,6 +41,7 @@
#include "iwl-eeprom.h"
#include "iwl-core.h"
#include "iwl-4965.h"
#include "iwl-io.h"
#include "iwl-helpers.h"
/* module parameters */
@ -315,20 +316,20 @@ int iwl4965_hw_rxq_stop(struct iwl_priv *priv)
unsigned long flags;
spin_lock_irqsave(&priv->lock, flags);
rc = iwl4965_grab_nic_access(priv);
rc = iwl_grab_nic_access(priv);
if (rc) {
spin_unlock_irqrestore(&priv->lock, flags);
return rc;
}
/* stop Rx DMA */
iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
rc = iwl4965_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
rc = iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
(1 << 24), 1000);
if (rc < 0)
IWL_ERROR("Can't stop Rx DMA.\n");
iwl4965_release_nic_access(priv);
iwl_release_nic_access(priv);
spin_unlock_irqrestore(&priv->lock, flags);
return 0;
@ -372,7 +373,7 @@ static int iwl4965_nic_set_pwr_src(struct iwl_priv *priv, int pwr_max)
unsigned long flags;
spin_lock_irqsave(&priv->lock, flags);
ret = iwl4965_grab_nic_access(priv);
ret = iwl_grab_nic_access(priv);
if (ret) {
spin_unlock_irqrestore(&priv->lock, flags);
return ret;
@ -385,15 +386,15 @@ static int iwl4965_nic_set_pwr_src(struct iwl_priv *priv, int pwr_max)
&val);
if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT)
iwl4965_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
~APMG_PS_CTRL_MSK_PWR_SRC);
} else
iwl4965_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
~APMG_PS_CTRL_MSK_PWR_SRC);
iwl4965_release_nic_access(priv);
iwl_release_nic_access(priv);
spin_unlock_irqrestore(&priv->lock, flags);
return ret;
@ -406,7 +407,7 @@ static int iwl4965_rx_init(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
unsigned int rb_size;
spin_lock_irqsave(&priv->lock, flags);
rc = iwl4965_grab_nic_access(priv);
rc = iwl_grab_nic_access(priv);
if (rc) {
spin_unlock_irqrestore(&priv->lock, flags);
return rc;
@ -418,34 +419,34 @@ static int iwl4965_rx_init(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
/* Stop Rx DMA */
iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
/* Reset driver's Rx queue write index */
iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
/* Tell device where to find RBD circular buffer in DRAM */
iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
rxq->dma_addr >> 8);
iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
rxq->dma_addr >> 8);
/* Tell device where in DRAM to update its Rx status */
iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
(priv->hw_setting.shared_phys +
offsetof(struct iwl4965_shared, val0)) >> 4);
iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
(priv->hw_setting.shared_phys +
offsetof(struct iwl4965_shared, val0)) >> 4);
/* Enable Rx DMA, enable host interrupt, Rx buffer size 4k, 256 RBDs */
iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
rb_size |
iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
rb_size |
/*0x10 << 4 | */
(RX_QUEUE_SIZE_LOG <<
(RX_QUEUE_SIZE_LOG <<
FH_RCSR_RX_CONFIG_RBDCB_SIZE_BITSHIFT));
/*
* iwl4965_write32(priv,CSR_INT_COAL_REG,0);
* iwl_write32(priv,CSR_INT_COAL_REG,0);
*/
iwl4965_release_nic_access(priv);
iwl_release_nic_access(priv);
spin_unlock_irqrestore(&priv->lock, flags);
return 0;
@ -458,13 +459,13 @@ static int iwl4965_kw_init(struct iwl_priv *priv)
int rc;
spin_lock_irqsave(&priv->lock, flags);
rc = iwl4965_grab_nic_access(priv);
rc = iwl_grab_nic_access(priv);
if (rc)
goto out;
iwl4965_write_direct32(priv, IWL_FH_KW_MEM_ADDR_REG,
iwl_write_direct32(priv, IWL_FH_KW_MEM_ADDR_REG,
priv->kw.dma_addr >> 4);
iwl4965_release_nic_access(priv);
iwl_release_nic_access(priv);
out:
spin_unlock_irqrestore(&priv->lock, flags);
return rc;
@ -524,7 +525,7 @@ static int iwl4965_txq_ctx_reset(struct iwl_priv *priv)
spin_lock_irqsave(&priv->lock, flags);
rc = iwl4965_grab_nic_access(priv);
rc = iwl_grab_nic_access(priv);
if (unlikely(rc)) {
IWL_ERROR("TX reset failed");
spin_unlock_irqrestore(&priv->lock, flags);
@ -532,8 +533,8 @@ static int iwl4965_txq_ctx_reset(struct iwl_priv *priv)
}
/* Turn off all Tx DMA channels */
iwl4965_write_prph(priv, KDR_SCD_TXFACT, 0);
iwl4965_release_nic_access(priv);
iwl_write_prph(priv, KDR_SCD_TXFACT, 0);
iwl_release_nic_access(priv);
spin_unlock_irqrestore(&priv->lock, flags);
/* Tell 4965 where to find the keep-warm buffer */
@ -580,11 +581,11 @@ int iwl4965_hw_nic_init(struct iwl_priv *priv)
/* nic_init */
spin_lock_irqsave(&priv->lock, flags);
iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
rc = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
rc = iwl_poll_bit(priv, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
if (rc < 0) {
@ -593,26 +594,25 @@ int iwl4965_hw_nic_init(struct iwl_priv *priv)
return rc;
}
rc = iwl4965_grab_nic_access(priv);
rc = iwl_grab_nic_access(priv);
if (rc) {
spin_unlock_irqrestore(&priv->lock, flags);
return rc;
}
iwl4965_read_prph(priv, APMG_CLK_CTRL_REG);
iwl_read_prph(priv, APMG_CLK_CTRL_REG);
iwl4965_write_prph(priv, APMG_CLK_CTRL_REG,
APMG_CLK_VAL_DMA_CLK_RQT |
APMG_CLK_VAL_BSM_CLK_RQT);
iwl4965_read_prph(priv, APMG_CLK_CTRL_REG);
iwl_write_prph(priv, APMG_CLK_CTRL_REG,
APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
iwl_read_prph(priv, APMG_CLK_CTRL_REG);
udelay(20);
iwl4965_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
iwl4965_release_nic_access(priv);
iwl4965_write32(priv, CSR_INT_COALESCING, 512 / 32);
iwl_release_nic_access(priv);
iwl_write32(priv, CSR_INT_COALESCING, 512 / 32);
spin_unlock_irqrestore(&priv->lock, flags);
/* Determine HW type */
@ -648,26 +648,24 @@ int iwl4965_hw_nic_init(struct iwl_priv *priv)
/* set CSR_HW_CONFIG_REG for uCode use */
iwl4965_set_bit(priv, CSR_HW_IF_CONFIG_REG,
CSR49_HW_IF_CONFIG_REG_BIT_4965_R |
CSR49_HW_IF_CONFIG_REG_BIT_RADIO_SI |
CSR49_HW_IF_CONFIG_REG_BIT_MAC_SI);
iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
CSR49_HW_IF_CONFIG_REG_BIT_4965_R |
CSR49_HW_IF_CONFIG_REG_BIT_RADIO_SI |
CSR49_HW_IF_CONFIG_REG_BIT_MAC_SI);
rc = iwl4965_grab_nic_access(priv);
rc = iwl_grab_nic_access(priv);
if (rc < 0) {
spin_unlock_irqrestore(&priv->lock, flags);
IWL_DEBUG_INFO("Failed to init the card\n");
return rc;
}
iwl4965_read_prph(priv, APMG_PS_CTRL_REG);
iwl4965_set_bits_prph(priv, APMG_PS_CTRL_REG,
APMG_PS_CTRL_VAL_RESET_REQ);
iwl_read_prph(priv, APMG_PS_CTRL_REG);
iwl_set_bits_prph(priv, APMG_PS_CTRL_REG, APMG_PS_CTRL_VAL_RESET_REQ);
udelay(5);
iwl4965_clear_bits_prph(priv, APMG_PS_CTRL_REG,
APMG_PS_CTRL_VAL_RESET_REQ);
iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG, APMG_PS_CTRL_VAL_RESET_REQ);
iwl4965_release_nic_access(priv);
iwl_release_nic_access(priv);
spin_unlock_irqrestore(&priv->lock, flags);
iwl4965_hw_card_show_info(priv);
@ -720,16 +718,16 @@ int iwl4965_hw_nic_stop_master(struct iwl_priv *priv)
spin_lock_irqsave(&priv->lock, flags);
/* set stop master bit */
iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
reg_val = iwl4965_read32(priv, CSR_GP_CNTRL);
reg_val = iwl_read32(priv, CSR_GP_CNTRL);
if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
(reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
IWL_DEBUG_INFO("Card in power save, master is already "
"stopped\n");
else {
rc = iwl4965_poll_bit(priv, CSR_RESET,
rc = iwl_poll_bit(priv, CSR_RESET,
CSR_RESET_REG_FLAG_MASTER_DISABLED,
CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
if (rc < 0) {
@ -756,18 +754,17 @@ void iwl4965_hw_txq_ctx_stop(struct iwl_priv *priv)
/* Stop each Tx DMA channel, and wait for it to be idle */
for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++) {
spin_lock_irqsave(&priv->lock, flags);
if (iwl4965_grab_nic_access(priv)) {
if (iwl_grab_nic_access(priv)) {
spin_unlock_irqrestore(&priv->lock, flags);
continue;
}
iwl4965_write_direct32(priv,
IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id),
0x0);
iwl4965_poll_direct_bit(priv, IWL_FH_TSSR_TX_STATUS_REG,
IWL_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE
(txq_id), 200);
iwl4965_release_nic_access(priv);
iwl_write_direct32(priv,
IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id), 0x0);
iwl_poll_direct_bit(priv, IWL_FH_TSSR_TX_STATUS_REG,
IWL_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE
(txq_id), 200);
iwl_release_nic_access(priv);
spin_unlock_irqrestore(&priv->lock, flags);
}
@ -784,29 +781,29 @@ int iwl4965_hw_nic_reset(struct iwl_priv *priv)
spin_lock_irqsave(&priv->lock, flags);
iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
udelay(10);
iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
rc = iwl4965_poll_bit(priv, CSR_RESET,
iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
rc = iwl_poll_bit(priv, CSR_RESET,
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
udelay(10);
rc = iwl4965_grab_nic_access(priv);
rc = iwl_grab_nic_access(priv);
if (!rc) {
iwl4965_write_prph(priv, APMG_CLK_EN_REG,
APMG_CLK_VAL_DMA_CLK_RQT |
APMG_CLK_VAL_BSM_CLK_RQT);
iwl_write_prph(priv, APMG_CLK_EN_REG,
APMG_CLK_VAL_DMA_CLK_RQT |
APMG_CLK_VAL_BSM_CLK_RQT);
udelay(10);
iwl4965_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
iwl4965_release_nic_access(priv);
iwl_release_nic_access(priv);
}
clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
@ -872,7 +869,7 @@ void iwl4965_rf_kill_ct_config(struct iwl_priv *priv)
int ret = 0;
spin_lock_irqsave(&priv->lock, flags);
iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
spin_unlock_irqrestore(&priv->lock, flags);
@ -1733,9 +1730,9 @@ static void iwl4965_bg_txpower_work(struct work_struct *work)
*/
static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
{
iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
iwl_write_direct32(priv, HBUS_TARG_WRPTR,
(index & 0xff) | (txq_id << 8));
iwl4965_write_prph(priv, KDR_SCD_QUEUE_RDPTR(txq_id), index);
iwl_write_prph(priv, KDR_SCD_QUEUE_RDPTR(txq_id), index);
}
/**
@ -1755,7 +1752,7 @@ static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0;
/* Set up and activate */
iwl4965_write_prph(priv, KDR_SCD_QUEUE_STATUS_BITS(txq_id),
iwl_write_prph(priv, KDR_SCD_QUEUE_STATUS_BITS(txq_id),
(active << SCD_QUEUE_STTS_REG_POS_ACTIVE) |
(tx_fifo_id << SCD_QUEUE_STTS_REG_POS_TXF) |
(scd_retry << SCD_QUEUE_STTS_REG_POS_WSL) |
@ -1807,46 +1804,46 @@ int iwl4965_alive_notify(struct iwl_priv *priv)
priv->chain_noise_data.delta_gain_code[i] =
CHAIN_NOISE_DELTA_GAIN_INIT_VAL;
#endif /* CONFIG_IWL4965_SENSITIVITY*/
ret = iwl4965_grab_nic_access(priv);
ret = iwl_grab_nic_access(priv);
if (ret) {
spin_unlock_irqrestore(&priv->lock, flags);
return ret;
}
/* Clear 4965's internal Tx Scheduler data base */
priv->scd_base_addr = iwl4965_read_prph(priv, KDR_SCD_SRAM_BASE_ADDR);
priv->scd_base_addr = iwl_read_prph(priv, KDR_SCD_SRAM_BASE_ADDR);
a = priv->scd_base_addr + SCD_CONTEXT_DATA_OFFSET;
for (; a < priv->scd_base_addr + SCD_TX_STTS_BITMAP_OFFSET; a += 4)
iwl4965_write_targ_mem(priv, a, 0);
iwl_write_targ_mem(priv, a, 0);
for (; a < priv->scd_base_addr + SCD_TRANSLATE_TBL_OFFSET; a += 4)
iwl4965_write_targ_mem(priv, a, 0);
iwl_write_targ_mem(priv, a, 0);
for (; a < sizeof(u16) * priv->hw_setting.max_txq_num; a += 4)
iwl4965_write_targ_mem(priv, a, 0);
iwl_write_targ_mem(priv, a, 0);
/* Tel 4965 where to find Tx byte count tables */
iwl4965_write_prph(priv, KDR_SCD_DRAM_BASE_ADDR,
iwl_write_prph(priv, KDR_SCD_DRAM_BASE_ADDR,
(priv->hw_setting.shared_phys +
offsetof(struct iwl4965_shared, queues_byte_cnt_tbls)) >> 10);
/* Disable chain mode for all queues */
iwl4965_write_prph(priv, KDR_SCD_QUEUECHAIN_SEL, 0);
iwl_write_prph(priv, KDR_SCD_QUEUECHAIN_SEL, 0);
/* Initialize each Tx queue (including the command queue) */
for (i = 0; i < priv->hw_setting.max_txq_num; i++) {
/* TFD circular buffer read/write indexes */
iwl4965_write_prph(priv, KDR_SCD_QUEUE_RDPTR(i), 0);
iwl4965_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
iwl_write_prph(priv, KDR_SCD_QUEUE_RDPTR(i), 0);
iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
/* Max Tx Window size for Scheduler-ACK mode */
iwl4965_write_targ_mem(priv, priv->scd_base_addr +
iwl_write_targ_mem(priv, priv->scd_base_addr +
SCD_CONTEXT_QUEUE_OFFSET(i),
(SCD_WIN_SIZE <<
SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
/* Frame limit */
iwl4965_write_targ_mem(priv, priv->scd_base_addr +
iwl_write_targ_mem(priv, priv->scd_base_addr +
SCD_CONTEXT_QUEUE_OFFSET(i) +
sizeof(u32),
(SCD_FRAME_LIMIT <<
@ -1854,11 +1851,11 @@ int iwl4965_alive_notify(struct iwl_priv *priv)
SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
}
iwl4965_write_prph(priv, KDR_SCD_INTERRUPT_MASK,
iwl_write_prph(priv, KDR_SCD_INTERRUPT_MASK,
(1 << priv->hw_setting.max_txq_num) - 1);
/* Activate all Tx DMA/FIFO channels */
iwl4965_write_prph(priv, KDR_SCD_TXFACT,
iwl_write_prph(priv, KDR_SCD_TXFACT,
SCD_TXFACT_REG_TXFIFO_MASK(0, 7));
iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
@ -1870,7 +1867,7 @@ int iwl4965_alive_notify(struct iwl_priv *priv)
iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
}
iwl4965_release_nic_access(priv);
iwl_release_nic_access(priv);
spin_unlock_irqrestore(&priv->lock, flags);
return ret;
@ -2929,22 +2926,22 @@ int iwl4965_hw_tx_queue_init(struct iwl_priv *priv, struct iwl4965_tx_queue *txq
int txq_id = txq->q.id;
spin_lock_irqsave(&priv->lock, flags);
rc = iwl4965_grab_nic_access(priv);
rc = iwl_grab_nic_access(priv);
if (rc) {
spin_unlock_irqrestore(&priv->lock, flags);
return rc;
}
/* Circular buffer (TFD queue in DRAM) physical base address */
iwl4965_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
txq->q.dma_addr >> 8);
/* Enable DMA channel, using same id as for TFD queue */
iwl4965_write_direct32(
iwl_write_direct32(
priv, IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id),
IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL);
iwl4965_release_nic_access(priv);
iwl_release_nic_access(priv);
spin_unlock_irqrestore(&priv->lock, flags);
return 0;
@ -3258,6 +3255,8 @@ void iwl4965_hw_rx_statistics(struct iwl_priv *priv, struct iwl4965_rx_mem_buffe
#endif
}
iwl_leds_background(priv);
/* If the hardware hasn't reported a change in
* temperature then don't bother computing a
* calibrated temperature value */
@ -3539,10 +3538,6 @@ static void iwl4965_handle_data_packet(struct iwl_priv *priv, int is_data,
ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
priv->alloc_rxb_skb--;
rxb->skb = NULL;
#ifdef LED
priv->led_packets += len;
iwl4965_setup_activity_timer(priv);
#endif
}
/* Calc max signal level (dBm) among 3 possible receivers */
@ -4261,7 +4256,7 @@ static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
{
/* Simply stop the queue, but don't change any configuration;
* the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
iwl4965_write_prph(priv,
iwl_write_prph(priv,
KDR_SCD_QUEUE_STATUS_BITS(txq_id),
(0 << SCD_QUEUE_STTS_REG_POS_ACTIVE)|
(1 << SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
@ -4282,24 +4277,24 @@ static int iwl4965_tx_queue_agg_disable(struct iwl_priv *priv, u16 txq_id,
return -EINVAL;
}
ret = iwl4965_grab_nic_access(priv);
ret = iwl_grab_nic_access(priv);
if (ret)
return ret;
iwl4965_tx_queue_stop_scheduler(priv, txq_id);
iwl4965_clear_bits_prph(priv, KDR_SCD_QUEUECHAIN_SEL, (1 << txq_id));
iwl_clear_bits_prph(priv, KDR_SCD_QUEUECHAIN_SEL, (1 << txq_id));
priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
/* supposes that ssn_idx is valid (!= 0xFFF) */
iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
iwl4965_clear_bits_prph(priv, KDR_SCD_INTERRUPT_MASK, (1 << txq_id));
iwl_clear_bits_prph(priv, KDR_SCD_INTERRUPT_MASK, (1 << txq_id));
iwl4965_txq_ctx_deactivate(priv, txq_id);
iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
iwl4965_release_nic_access(priv);
iwl_release_nic_access(priv);
return 0;
}
@ -4434,14 +4429,14 @@ static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
tbl_dw_addr = priv->scd_base_addr +
SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
tbl_dw = iwl4965_read_targ_mem(priv, tbl_dw_addr);
tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
if (txq_id & 0x1)
tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
else
tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
iwl4965_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
return 0;
}
@ -4471,7 +4466,7 @@ static int iwl4965_tx_queue_agg_enable(struct iwl_priv *priv, int txq_id,
iwl4965_sta_modify_enable_tid_tx(priv, sta_id, tid);
spin_lock_irqsave(&priv->lock, flags);
rc = iwl4965_grab_nic_access(priv);
rc = iwl_grab_nic_access(priv);
if (rc) {
spin_unlock_irqrestore(&priv->lock, flags);
return rc;
@ -4484,7 +4479,7 @@ static int iwl4965_tx_queue_agg_enable(struct iwl_priv *priv, int txq_id,
iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
/* Set this queue as a chain-building queue */
iwl4965_set_bits_prph(priv, KDR_SCD_QUEUECHAIN_SEL, (1 << txq_id));
iwl_set_bits_prph(priv, KDR_SCD_QUEUECHAIN_SEL, (1 << txq_id));
/* Place first TFD at index corresponding to start sequence number.
* Assumes that ssn_idx is valid (!= 0xFFF) */
@ -4493,22 +4488,22 @@ static int iwl4965_tx_queue_agg_enable(struct iwl_priv *priv, int txq_id,
iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
/* Set up Tx window size and frame limit for this queue */
iwl4965_write_targ_mem(priv,
iwl_write_targ_mem(priv,
priv->scd_base_addr + SCD_CONTEXT_QUEUE_OFFSET(txq_id),
(SCD_WIN_SIZE << SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
iwl4965_write_targ_mem(priv, priv->scd_base_addr +
iwl_write_targ_mem(priv, priv->scd_base_addr +
SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
(SCD_FRAME_LIMIT << SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
& SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
iwl4965_set_bits_prph(priv, KDR_SCD_INTERRUPT_MASK, (1 << txq_id));
iwl_set_bits_prph(priv, KDR_SCD_INTERRUPT_MASK, (1 << txq_id));
/* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
iwl4965_release_nic_access(priv);
iwl_release_nic_access(priv);
spin_unlock_irqrestore(&priv->lock, flags);
return 0;

View File

@ -45,6 +45,7 @@ extern struct pci_device_id iwl4965_hw_card_ids[];
#include "iwl-csr.h"
#include "iwl-prph.h"
#include "iwl-debug.h"
#include "iwl-led.h"
/* Change firmware file name, using "-" and incrementing number,
* *only* when uCode interface or architecture changes so that it
@ -1050,11 +1051,12 @@ struct iwl_priv {
struct iwl4965_init_alive_resp card_alive_init;
struct iwl4965_alive_resp card_alive;
#ifdef LED
/* LED related variables */
struct iwl4965_activity_blink activity;
unsigned long led_packets;
int led_state;
#ifdef CONFIG_IWL4965_LEDS
struct iwl4965_led led[IWL_LED_TRG_MAX];
unsigned long last_blink_time;
u8 last_blink_rate;
u8 allow_blinking;
u64 led_tpt;
#endif
u16 active_rate;
@ -1127,7 +1129,7 @@ struct iwl_priv {
struct iwl4965_station_entry stations[IWL_STATION_COUNT];
/* Indication if ieee80211_ops->open has been called */
int is_open;
u8 is_open;
u8 mac80211_registered;
@ -1148,7 +1150,7 @@ struct iwl_priv {
/* eeprom */
struct iwl4965_eeprom eeprom;
int iw_mode;
enum ieee80211_if_types iw_mode;
struct sk_buff *ibss_beacon;
@ -1264,6 +1266,5 @@ extern const struct iwl_channel_info *iwl_get_channel_info(
const struct iwl_priv *priv, enum ieee80211_band band, u16 channel);
/* Requires full declaration of iwl_priv before including */
#include "iwl-4965-io.h"
#endif /* __iwl4965_4965_h__ */

View File

@ -93,6 +93,7 @@
#define CSR_UCODE_DRV_GP1_CLR (CSR_BASE+0x05c)
#define CSR_UCODE_DRV_GP2 (CSR_BASE+0x060)
#define CSR_GIO_CHICKEN_BITS (CSR_BASE+0x100)
#define CSR_LED_REG (CSR_BASE+0x094)
/* Analog phase-lock-loop configuration (3945 only)
* Set bit 24. */
@ -214,6 +215,11 @@
#define CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX (0x00800000)
#define CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER (0x20000000)
/* LED */
#define CSR_LED_BSM_CTRL_MSK (0xFFFFFFDF)
#define CSR_LED_REG_TRUN_ON (0x78)
#define CSR_LED_REG_TRUN_OFF (0x38)
/*=== HBUS (Host-side Bus) ===*/
#define HBUS_BASE (0x400)
/*

View File

@ -36,7 +36,7 @@
#include "iwl-4965.h"
#include "iwl-debug.h"
#include "iwl-4965-io.h"
#include "iwl-io.h"
/* create and remove of files */
@ -141,9 +141,9 @@ static ssize_t iwl_dbgfs_sram_read(struct file *file,
printk(KERN_DEBUG "offset is: 0x%x\tlen is: 0x%x\n",
priv->dbgfs->sram_offset, priv->dbgfs->sram_len);
iwl4965_grab_nic_access(priv);
iwl_grab_nic_access(priv);
for (i = priv->dbgfs->sram_len; i > 0; i -= 4) {
val = iwl4965_read_targ_mem(priv, priv->dbgfs->sram_offset + \
val = iwl_read_targ_mem(priv, priv->dbgfs->sram_offset + \
priv->dbgfs->sram_len - i);
if (i < 4) {
switch (i) {
@ -161,7 +161,7 @@ static ssize_t iwl_dbgfs_sram_read(struct file *file,
pos += sprintf(buf+pos, "0x%08x ", val);
}
pos += sprintf(buf+pos, "\n");
iwl4965_release_nic_access(priv);
iwl_release_nic_access(priv);
ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
return ret;

View File

@ -73,7 +73,7 @@
#include "iwl-core.h"
#include "iwl-debug.h"
#include "iwl-eeprom.h"
#include "iwl-4965-io.h"
#include "iwl-io.h"
/************************** EEPROM BANDS ****************************
*
@ -144,7 +144,7 @@ static const u8 iwl_eeprom_band_7[] = { /* 5.2 FAT channel */
int iwlcore_eeprom_verify_signature(struct iwl_priv *priv)
{
u32 gp = iwl4965_read32(priv, CSR_EEPROM_GP);
u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
return -ENOENT;
@ -166,14 +166,14 @@ int iwlcore_eeprom_acquire_semaphore(struct iwl_priv *priv)
for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) {
/* Request semaphore */
iwl4965_set_bit(priv, CSR_HW_IF_CONFIG_REG,
CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
/* See if we got it */
ret = iwl4965_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
EEPROM_SEM_TIMEOUT);
ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
EEPROM_SEM_TIMEOUT);
if (ret >= 0) {
IWL_DEBUG_IO("Acquired semaphore after %d tries.\n",
count+1);
@ -187,7 +187,7 @@ EXPORT_SYMBOL(iwlcore_eeprom_acquire_semaphore);
void iwlcore_eeprom_release_semaphore(struct iwl_priv *priv)
{
iwl4965_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
iwl_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
}
@ -204,7 +204,7 @@ EXPORT_SYMBOL(iwlcore_eeprom_release_semaphore);
int iwl_eeprom_init(struct iwl_priv *priv)
{
u16 *e = (u16 *)&priv->eeprom;
u32 gp = iwl4965_read32(priv, CSR_EEPROM_GP);
u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
u32 r;
int sz = sizeof(priv->eeprom);
int ret;
@ -231,12 +231,12 @@ int iwl_eeprom_init(struct iwl_priv *priv)
/* eeprom is an array of 16bit values */
for (addr = 0; addr < sz; addr += sizeof(u16)) {
_iwl4965_write32(priv, CSR_EEPROM_REG, addr << 1);
_iwl4965_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
_iwl_write32(priv, CSR_EEPROM_REG, addr << 1);
_iwl_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
i += IWL_EEPROM_ACCESS_DELAY) {
r = _iwl4965_read_direct32(priv, CSR_EEPROM_REG);
r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
if (r & CSR_EEPROM_REG_READ_VALID_MSK)
break;
udelay(IWL_EEPROM_ACCESS_DELAY);

View File

@ -97,6 +97,31 @@ EXPORT_SYMBOL(get_cmd_string);
#define HOST_COMPLETE_TIMEOUT (HZ / 2)
static int iwl_generic_cmd_callback(struct iwl_priv *priv,
struct iwl_cmd *cmd, struct sk_buff *skb)
{
struct iwl4965_rx_packet *pkt = NULL;
if (!skb) {
IWL_ERROR("Error: Response NULL in %s.\n",
get_cmd_string(cmd->hdr.cmd));
return 1;
}
pkt = (struct iwl4965_rx_packet *)skb->data;
if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
IWL_ERROR("Bad return from %s (0x%08X)\n",
get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
return 1;
}
IWL_DEBUG_HC("back from %s (0x%08X)\n",
get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
/* Let iwl_tx_complete free the response skb */
return 1;
}
static int iwl_send_cmd_async(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
{
int ret;
@ -106,8 +131,9 @@ static int iwl_send_cmd_async(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
/* An asynchronous command can not expect an SKB to be set. */
BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
/* An asynchronous command MUST have a callback. */
BUG_ON(!cmd->meta.u.callback);
/* Assign a generic callback if one is not provided */
if (!cmd->meta.u.callback)
cmd->meta.u.callback = iwl_generic_cmd_callback;
if (test_bit(STATUS_EXIT_PENDING, &priv->status))
return -EBUSY;

View File

@ -0,0 +1,429 @@
/******************************************************************************
*
* Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
*
* Portions of this file are derived from the ipw3945 project.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* James P. Ketrenos <ipw2100-admin@linux.intel.com>
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*
*****************************************************************************/
#ifndef __iwl_io_h__
#define __iwl_io_h__
#include <linux/io.h>
#include "iwl-debug.h"
/*
* IO, register, and NIC memory access functions
*
* NOTE on naming convention and macro usage for these
*
* A single _ prefix before a an access function means that no state
* check or debug information is printed when that function is called.
*
* A double __ prefix before an access function means that state is checked
* and the current line number and caller function name are printed in addition
* to any other debug output.
*
* The non-prefixed name is the #define that maps the caller into a
* #define that provides the caller's name and __LINE__ to the double
* prefix version.
*
* If you wish to call the function without any debug or state checking,
* you should use the single _ prefix version (as is used by dependent IO
* routines, for example _iwl_read_direct32 calls the non-check version of
* _iwl_read32.)
*
* These declarations are *extremely* useful in quickly isolating code deltas
* which result in misconfiguring of the hardware I/O. In combination with
* git-bisect and the IO debug level you can quickly determine the specific
* commit which breaks the IO sequence to the hardware.
*
*/
#define _iwl_write32(priv, ofs, val) writel((val), (priv)->hw_base + (ofs))
#ifdef CONFIG_IWLWIFI_DEBUG
static inline void __iwl_write32(const char *f, u32 l, struct iwl_priv *priv,
u32 ofs, u32 val)
{
IWL_DEBUG_IO("write32(0x%08X, 0x%08X) - %s %d\n", ofs, val, f, l);
_iwl_write32(priv, ofs, val);
}
#define iwl_write32(priv, ofs, val) \
__iwl_write32(__FILE__, __LINE__, priv, ofs, val)
#else
#define iwl_write32(priv, ofs, val) _iwl_write32(priv, ofs, val)
#endif
#define _iwl_read32(priv, ofs) readl((priv)->hw_base + (ofs))
#ifdef CONFIG_IWLWIFI_DEBUG
static inline u32 __iwl_read32(char *f, u32 l, struct iwl_priv *priv, u32 ofs)
{
IWL_DEBUG_IO("read_direct32(0x%08X) - %s %d\n", ofs, f, l);
return _iwl_read32(priv, ofs);
}
#define iwl_read32(priv, ofs) __iwl_read32(__FILE__, __LINE__, priv, ofs)
#else
#define iwl_read32(p, o) _iwl_read32(p, o)
#endif
static inline int _iwl_poll_bit(struct iwl_priv *priv, u32 addr,
u32 bits, u32 mask, int timeout)
{
int i = 0;
do {
if ((_iwl_read32(priv, addr) & mask) == (bits & mask))
return i;
mdelay(10);
i += 10;
} while (i < timeout);
return -ETIMEDOUT;
}
#ifdef CONFIG_IWLWIFI_DEBUG
static inline int __iwl_poll_bit(const char *f, u32 l,
struct iwl_priv *priv, u32 addr,
u32 bits, u32 mask, int timeout)
{
int ret = _iwl_poll_bit(priv, addr, bits, mask, timeout);
IWL_DEBUG_IO("poll_bit(0x%08X, 0x%08X, 0x%08X) - %s- %s %d\n",
addr, bits, mask,
unlikely(ret == -ETIMEDOUT)?"timeout":"", f, l);
return ret;
}
#define iwl_poll_bit(priv, addr, bits, mask, timeout) \
__iwl_poll_bit(__FILE__, __LINE__, priv, addr, bits, mask, timeout)
#else
#define iwl_poll_bit(p, a, b, m, t) _iwl_poll_bit(p, a, b, m, t)
#endif
static inline void _iwl_set_bit(struct iwl_priv *priv, u32 reg, u32 mask)
{
_iwl_write32(priv, reg, _iwl_read32(priv, reg) | mask);
}
#ifdef CONFIG_IWLWIFI_DEBUG
static inline void __iwl_set_bit(const char *f, u32 l,
struct iwl_priv *priv, u32 reg, u32 mask)
{
u32 val = _iwl_read32(priv, reg) | mask;
IWL_DEBUG_IO("set_bit(0x%08X, 0x%08X) = 0x%08X\n", reg, mask, val);
_iwl_write32(priv, reg, val);
}
#define iwl_set_bit(p, r, m) __iwl_set_bit(__FILE__, __LINE__, p, r, m)
#else
#define iwl_set_bit(p, r, m) _iwl_set_bit(p, r, m)
#endif
static inline void _iwl_clear_bit(struct iwl_priv *priv, u32 reg, u32 mask)
{
_iwl_write32(priv, reg, _iwl_read32(priv, reg) & ~mask);
}
#ifdef CONFIG_IWLWIFI_DEBUG
static inline void __iwl_clear_bit(const char *f, u32 l,
struct iwl_priv *priv, u32 reg, u32 mask)
{
u32 val = _iwl_read32(priv, reg) & ~mask;
IWL_DEBUG_IO("clear_bit(0x%08X, 0x%08X) = 0x%08X\n", reg, mask, val);
_iwl_write32(priv, reg, val);
}
#define iwl_clear_bit(p, r, m) __iwl_clear_bit(__FILE__, __LINE__, p, r, m)
#else
#define iwl_clear_bit(p, r, m) _iwl_clear_bit(p, r, m)
#endif
static inline int _iwl_grab_nic_access(struct iwl_priv *priv)
{
int ret;
u32 gp_ctl;
#ifdef CONFIG_IWLWIFI_DEBUG
if (atomic_read(&priv->restrict_refcnt))
return 0;
#endif
if (test_bit(STATUS_RF_KILL_HW, &priv->status) ||
test_bit(STATUS_RF_KILL_SW, &priv->status)) {
IWL_WARNING("WARNING: Requesting MAC access during RFKILL "
"wakes up NIC\n");
/* 10 msec allows time for NIC to complete its data save */
gp_ctl = _iwl_read32(priv, CSR_GP_CNTRL);
if (gp_ctl & CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY) {
IWL_DEBUG_RF_KILL("Wait for complete power-down, "
"gpctl = 0x%08x\n", gp_ctl);
mdelay(10);
} else
IWL_DEBUG_RF_KILL("power-down complete, "
"gpctl = 0x%08x\n", gp_ctl);
}
/* this bit wakes up the NIC */
_iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
ret = _iwl_poll_bit(priv, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN,
(CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY |
CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 50);
if (ret < 0) {
IWL_ERROR("MAC is in deep sleep!\n");
return -EIO;
}
#ifdef CONFIG_IWLWIFI_DEBUG
atomic_inc(&priv->restrict_refcnt);
#endif
return 0;
}
#ifdef CONFIG_IWLWIFI_DEBUG
static inline int __iwl_grab_nic_access(const char *f, u32 l,
struct iwl_priv *priv)
{
if (atomic_read(&priv->restrict_refcnt))
IWL_ERROR("Grabbing access while already held %s %d.\n", f, l);
IWL_DEBUG_IO("grabbing nic access - %s %d\n", f, l);
return _iwl_grab_nic_access(priv);
}
#define iwl_grab_nic_access(priv) \
__iwl_grab_nic_access(__FILE__, __LINE__, priv)
#else
#define iwl_grab_nic_access(priv) \
_iwl_grab_nic_access(priv)
#endif
static inline void _iwl_release_nic_access(struct iwl_priv *priv)
{
#ifdef CONFIG_IWLWIFI_DEBUG
if (atomic_dec_and_test(&priv->restrict_refcnt))
#endif
_iwl_clear_bit(priv, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
}
#ifdef CONFIG_IWLWIFI_DEBUG
static inline void __iwl_release_nic_access(const char *f, u32 l,
struct iwl_priv *priv)
{
if (atomic_read(&priv->restrict_refcnt) <= 0)
IWL_ERROR("Release unheld nic access at line %s %d.\n", f, l);
IWL_DEBUG_IO("releasing nic access - %s %d\n", f, l);
_iwl_release_nic_access(priv);
}
#define iwl_release_nic_access(priv) \
__iwl_release_nic_access(__FILE__, __LINE__, priv)
#else
#define iwl_release_nic_access(priv) \
_iwl_release_nic_access(priv)
#endif
static inline u32 _iwl_read_direct32(struct iwl_priv *priv, u32 reg)
{
return _iwl_read32(priv, reg);
}
#ifdef CONFIG_IWLWIFI_DEBUG
static inline u32 __iwl_read_direct32(const char *f, u32 l,
struct iwl_priv *priv, u32 reg)
{
u32 value = _iwl_read_direct32(priv, reg);
if (!atomic_read(&priv->restrict_refcnt))
IWL_ERROR("Nic access not held from %s %d\n", f, l);
IWL_DEBUG_IO("read_direct32(0x%4X) = 0x%08x - %s %d \n", reg, value,
f, l);
return value;
}
#define iwl_read_direct32(priv, reg) \
__iwl_read_direct32(__FILE__, __LINE__, priv, reg)
#else
#define iwl_read_direct32 _iwl_read_direct32
#endif
static inline void _iwl_write_direct32(struct iwl_priv *priv,
u32 reg, u32 value)
{
_iwl_write32(priv, reg, value);
}
#ifdef CONFIG_IWLWIFI_DEBUG
static void __iwl_write_direct32(const char *f , u32 line,
struct iwl_priv *priv, u32 reg, u32 value)
{
if (!atomic_read(&priv->restrict_refcnt))
IWL_ERROR("Nic access not held from %s line %d\n", f, line);
_iwl_write_direct32(priv, reg, value);
}
#define iwl_write_direct32(priv, reg, value) \
__iwl_write_direct32(__func__, __LINE__, priv, reg, value)
#else
#define iwl_write_direct32 _iwl_write_direct32
#endif
static inline void iwl_write_reg_buf(struct iwl_priv *priv,
u32 reg, u32 len, u32 *values)
{
u32 count = sizeof(u32);
if ((priv != NULL) && (values != NULL)) {
for (; 0 < len; len -= count, reg += count, values++)
_iwl_write_direct32(priv, reg, *values);
}
}
static inline int _iwl_poll_direct_bit(struct iwl_priv *priv,
u32 addr, u32 mask, int timeout)
{
int i = 0;
do {
if ((_iwl_read_direct32(priv, addr) & mask) == mask)
return i;
mdelay(10);
i += 10;
} while (i < timeout);
return -ETIMEDOUT;
}
#ifdef CONFIG_IWLWIFI_DEBUG
static inline int __iwl_poll_direct_bit(const char *f, u32 l,
struct iwl_priv *priv,
u32 addr, u32 mask, int timeout)
{
int ret = _iwl_poll_direct_bit(priv, addr, mask, timeout);
if (unlikely(ret == -ETIMEDOUT))
IWL_DEBUG_IO("poll_direct_bit(0x%08X, 0x%08X) - "
"timedout - %s %d\n", addr, mask, f, l);
else
IWL_DEBUG_IO("poll_direct_bit(0x%08X, 0x%08X) = 0x%08X "
"- %s %d\n", addr, mask, ret, f, l);
return ret;
}
#define iwl_poll_direct_bit(priv, addr, mask, timeout) \
__iwl_poll_direct_bit(__FILE__, __LINE__, priv, addr, mask, timeout)
#else
#define iwl_poll_direct_bit _iwl_poll_direct_bit
#endif
static inline u32 _iwl_read_prph(struct iwl_priv *priv, u32 reg)
{
_iwl_write_direct32(priv, HBUS_TARG_PRPH_RADDR, reg | (3 << 24));
return _iwl_read_direct32(priv, HBUS_TARG_PRPH_RDAT);
}
#ifdef CONFIG_IWLWIFI_DEBUG
static inline u32 __iwl_read_prph(const char *f, u32 line,
struct iwl_priv *priv, u32 reg)
{
if (!atomic_read(&priv->restrict_refcnt))
IWL_ERROR("Nic access not held from %s line %d\n", f, line);
return _iwl_read_prph(priv, reg);
}
#define iwl_read_prph(priv, reg) \
__iwl_read_prph(__func__, __LINE__, priv, reg)
#else
#define iwl_read_prph _iwl_read_prph
#endif
static inline void _iwl_write_prph(struct iwl_priv *priv,
u32 addr, u32 val)
{
_iwl_write_direct32(priv, HBUS_TARG_PRPH_WADDR,
((addr & 0x0000FFFF) | (3 << 24)));
_iwl_write_direct32(priv, HBUS_TARG_PRPH_WDAT, val);
}
#ifdef CONFIG_IWLWIFI_DEBUG
static inline void __iwl_write_prph(const char *f, u32 line,
struct iwl_priv *priv, u32 addr, u32 val)
{
if (!atomic_read(&priv->restrict_refcnt))
IWL_ERROR("Nic access not held from %s line %d\n", f, line);
_iwl_write_prph(priv, addr, val);
}
#define iwl_write_prph(priv, addr, val) \
__iwl_write_prph(__func__, __LINE__, priv, addr, val);
#else
#define iwl_write_prph _iwl_write_prph
#endif
#define _iwl_set_bits_prph(priv, reg, mask) \
_iwl_write_prph(priv, reg, (_iwl_read_prph(priv, reg) | mask))
#ifdef CONFIG_IWLWIFI_DEBUG
static inline void __iwl_set_bits_prph(const char *f, u32 line,
struct iwl_priv *priv,
u32 reg, u32 mask)
{
if (!atomic_read(&priv->restrict_refcnt))
IWL_ERROR("Nic access not held from %s line %d\n", f, line);
_iwl_set_bits_prph(priv, reg, mask);
}
#define iwl_set_bits_prph(priv, reg, mask) \
__iwl_set_bits_prph(__func__, __LINE__, priv, reg, mask)
#else
#define iwl_set_bits_prph _iwl_set_bits_prph
#endif
#define _iwl_set_bits_mask_prph(priv, reg, bits, mask) \
_iwl_write_prph(priv, reg, ((_iwl_read_prph(priv, reg) & mask) | bits))
#ifdef CONFIG_IWLWIFI_DEBUG
static inline void __iwl_set_bits_mask_prph(const char *f, u32 line,
struct iwl_priv *priv, u32 reg, u32 bits, u32 mask)
{
if (!atomic_read(&priv->restrict_refcnt))
IWL_ERROR("Nic access not held from %s line %d\n", f, line);
_iwl_set_bits_mask_prph(priv, reg, bits, mask);
}
#define iwl_set_bits_mask_prph(priv, reg, bits, mask) \
__iwl_set_bits_mask_prph(__func__, __LINE__, priv, reg, bits, mask)
#else
#define iwl_set_bits_mask_prph _iwl_set_bits_mask_prph
#endif
static inline void iwl_clear_bits_prph(struct iwl_priv
*priv, u32 reg, u32 mask)
{
u32 val = _iwl_read_prph(priv, reg);
_iwl_write_prph(priv, reg, (val & ~mask));
}
static inline u32 iwl_read_targ_mem(struct iwl_priv *priv, u32 addr)
{
iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, addr);
return iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
}
static inline void iwl_write_targ_mem(struct iwl_priv *priv, u32 addr, u32 val)
{
iwl_write_direct32(priv, HBUS_TARG_MEM_WADDR, addr);
iwl_write_direct32(priv, HBUS_TARG_MEM_WDAT, val);
}
static inline void iwl_write_targ_mem_buf(struct iwl_priv *priv, u32 addr,
u32 len, u32 *values)
{
iwl_write_direct32(priv, HBUS_TARG_MEM_WADDR, addr);
for (; 0 < len; len -= sizeof(u32), values++)
iwl_write_direct32(priv, HBUS_TARG_MEM_WDAT, *values);
}
#endif

View File

@ -0,0 +1,447 @@
/******************************************************************************
*
* Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* James P. Ketrenos <ipw2100-admin@linux.intel.com>
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*
*****************************************************************************/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/version.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/dma-mapping.h>
#include <linux/delay.h>
#include <linux/skbuff.h>
#include <linux/netdevice.h>
#include <linux/wireless.h>
#include <net/mac80211.h>
#include <linux/etherdevice.h>
#include <asm/unaligned.h>
#include "iwl-4965.h"
#include "iwl-io.h"
#include "iwl-core.h"
#include "iwl-helpers.h"
#define IWL_1MB_RATE (128 * 1024)
#define IWL_LED_THRESHOLD (16)
#define IWL_MAX_BLINK_TBL (10)
static const struct {
u16 tpt;
u8 on_time;
u8 of_time;
} blink_tbl[] =
{
{300, 25, 25},
{200, 40, 40},
{100, 55, 55},
{70, 65, 65},
{50, 75, 75},
{20, 85, 85},
{15, 95, 95 },
{10, 110, 110},
{5, 130, 130},
{0, 167, 167}
};
static int iwl_led_cmd_callback(struct iwl_priv *priv,
struct iwl_cmd *cmd, struct sk_buff *skb)
{
return 1;
}
/* Send led command */
static int iwl_send_led_cmd(struct iwl_priv *priv,
struct iwl4965_led_cmd *led_cmd)
{
struct iwl_host_cmd cmd = {
.id = REPLY_LEDS_CMD,
.len = sizeof(struct iwl4965_led_cmd),
.data = led_cmd,
.meta.flags = CMD_ASYNC,
.meta.u.callback = iwl_led_cmd_callback
};
u32 reg;
reg = iwl_read32(priv, CSR_LED_REG);
if (reg != (reg & CSR_LED_BSM_CTRL_MSK))
iwl_write32(priv, CSR_LED_REG, reg & CSR_LED_BSM_CTRL_MSK);
return iwl_send_cmd(priv, &cmd);
}
/* Set led on command */
static int iwl4965_led_on(struct iwl_priv *priv, int led_id)
{
struct iwl4965_led_cmd led_cmd = {
.id = led_id,
.on = IWL_LED_SOLID,
.off = 0,
.interval = IWL_DEF_LED_INTRVL
};
return iwl_send_led_cmd(priv, &led_cmd);
}
/* Set led on command */
static int iwl4965_led_pattern(struct iwl_priv *priv, int led_id,
enum led_brightness brightness)
{
struct iwl4965_led_cmd led_cmd = {
.id = led_id,
.on = brightness,
.off = brightness,
.interval = IWL_DEF_LED_INTRVL
};
if (brightness == LED_FULL) {
led_cmd.on = IWL_LED_SOLID;
led_cmd.off = 0;
}
return iwl_send_led_cmd(priv, &led_cmd);
}
/* Set led register off */
static int iwl4965_led_on_reg(struct iwl_priv *priv, int led_id)
{
IWL_DEBUG_LED("led on %d\n", led_id);
iwl_write32(priv, CSR_LED_REG, CSR_LED_REG_TRUN_ON);
return 0;
}
#if 0
/* Set led off command */
int iwl4965_led_off(struct iwl_priv *priv, int led_id)
{
struct iwl4965_led_cmd led_cmd = {
.id = led_id,
.on = 0,
.off = 0,
.interval = IWL_DEF_LED_INTRVL
};
IWL_DEBUG_LED("led off %d\n", led_id);
return iwl_send_led_cmd(priv, &led_cmd);
}
#endif
/* Set led register off */
static int iwl4965_led_off_reg(struct iwl_priv *priv, int led_id)
{
IWL_DEBUG_LED("radio off\n");
iwl_write32(priv, CSR_LED_REG, CSR_LED_REG_TRUN_OFF);
return 0;
}
/* Set led blink command */
static int iwl4965_led_not_solid(struct iwl_priv *priv, int led_id,
u8 brightness)
{
struct iwl4965_led_cmd led_cmd = {
.id = led_id,
.on = brightness,
.off = brightness,
.interval = IWL_DEF_LED_INTRVL
};
return iwl_send_led_cmd(priv, &led_cmd);
}
/*
* brightness call back function for Tx/Rx LED
*/
static int iwl4965_led_associated(struct iwl_priv *priv, int led_id)
{
if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
!test_bit(STATUS_READY, &priv->status))
return 0;
/* start counting Tx/Rx bytes */
if (!priv->last_blink_time && priv->allow_blinking)
priv->last_blink_time = jiffies;
return 0;
}
/*
* brightness call back for association and radio
*/
static void iwl4965_led_brightness_set(struct led_classdev *led_cdev,
enum led_brightness brightness)
{
struct iwl4965_led *led = container_of(led_cdev,
struct iwl4965_led, led_dev);
struct iwl_priv *priv = led->priv;
if (test_bit(STATUS_EXIT_PENDING, &priv->status))
return;
switch (brightness) {
case LED_FULL:
if (led->type == IWL_LED_TRG_ASSOC)
priv->allow_blinking = 1;
if (led->led_on)
led->led_on(priv, IWL_LED_LINK);
break;
case LED_OFF:
if (led->type == IWL_LED_TRG_ASSOC)
priv->allow_blinking = 0;
if (led->led_off)
led->led_off(priv, IWL_LED_LINK);
break;
default:
if (led->led_pattern)
led->led_pattern(priv, IWL_LED_LINK, brightness);
break;
}
}
/*
* Register led class with the system
*/
static int iwl_leds_register_led(struct iwl_priv *priv,
struct iwl4965_led *led,
enum led_type type, u8 set_led,
const char *name, char *trigger)
{
struct device *device = wiphy_dev(priv->hw->wiphy);
int ret;
led->led_dev.name = name;
led->led_dev.brightness_set = iwl4965_led_brightness_set;
led->led_dev.default_trigger = trigger;
ret = led_classdev_register(device, &led->led_dev);
if (ret) {
IWL_ERROR("Error: failed to register led handler.\n");
return ret;
}
led->priv = priv;
led->type = type;
led->registered = 1;
if (set_led && led->led_on)
led->led_on(priv, IWL_LED_LINK);
return 0;
}
/*
* calculate blink rate according to last 2 sec Tx/Rx activities
*/
static inline u8 get_blink_rate(struct iwl_priv *priv)
{
int i;
u8 blink_rate;
u64 current_tpt = priv->tx_stats[2].bytes + priv->rx_stats[2].bytes;
s64 tpt = current_tpt - priv->led_tpt;
if (tpt < 0) /* wrapparound */
tpt = -tpt;
priv->led_tpt = current_tpt;
if (tpt < IWL_LED_THRESHOLD) {
i = IWL_MAX_BLINK_TBL;
} else {
for (i = 0; i < IWL_MAX_BLINK_TBL; i++)
if (tpt > (blink_tbl[i].tpt * IWL_1MB_RATE))
break;
}
/* if 0 frame is transfered */
if ((i == IWL_MAX_BLINK_TBL) || !priv->allow_blinking)
blink_rate = IWL_LED_SOLID;
else
blink_rate = blink_tbl[i].on_time;
return blink_rate;
}
static inline int is_rf_kill(struct iwl_priv *priv)
{
return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
test_bit(STATUS_RF_KILL_SW, &priv->status);
}
/*
* this function called from handler. Since setting Led command can
* happen very frequent we postpone led command to be called from
* REPLY handler so we know ucode is up
*/
void iwl_leds_background(struct iwl_priv *priv)
{
u8 blink_rate;
if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
priv->last_blink_time = 0;
return;
}
if (is_rf_kill(priv)) {
priv->last_blink_time = 0;
return;
}
if (!priv->allow_blinking) {
priv->last_blink_time = 0;
if (priv->last_blink_rate != IWL_LED_SOLID) {
priv->last_blink_rate = IWL_LED_SOLID;
iwl4965_led_on(priv, IWL_LED_LINK);
}
return;
}
if (!priv->last_blink_time ||
!time_after(jiffies, priv->last_blink_time +
msecs_to_jiffies(1000)))
return;
blink_rate = get_blink_rate(priv);
/* call only if blink rate change */
if (blink_rate != priv->last_blink_rate) {
if (blink_rate != IWL_LED_SOLID) {
priv->last_blink_time = jiffies +
msecs_to_jiffies(1000);
iwl4965_led_not_solid(priv, IWL_LED_LINK, blink_rate);
} else {
priv->last_blink_time = 0;
iwl4965_led_on(priv, IWL_LED_LINK);
}
}
priv->last_blink_rate = blink_rate;
}
EXPORT_SYMBOL(iwl_leds_background);
/* Register all led handler */
int iwl_leds_register(struct iwl_priv *priv)
{
char *trigger;
char name[32];
int ret;
priv->last_blink_rate = 0;
priv->led_tpt = 0;
priv->last_blink_time = 0;
priv->allow_blinking = 0;
trigger = ieee80211_get_radio_led_name(priv->hw);
snprintf(name, sizeof(name), "iwl-%s:radio",
wiphy_name(priv->hw->wiphy));
priv->led[IWL_LED_TRG_RADIO].led_on = iwl4965_led_on_reg;
priv->led[IWL_LED_TRG_RADIO].led_off = iwl4965_led_off_reg;
priv->led[IWL_LED_TRG_RADIO].led_pattern = NULL;
ret = iwl_leds_register_led(priv,
&priv->led[IWL_LED_TRG_RADIO],
IWL_LED_TRG_RADIO, 1,
name, trigger);
if (ret)
goto exit_fail;
trigger = ieee80211_get_assoc_led_name(priv->hw);
snprintf(name, sizeof(name), "iwl-%s:assoc",
wiphy_name(priv->hw->wiphy));
ret = iwl_leds_register_led(priv,
&priv->led[IWL_LED_TRG_ASSOC],
IWL_LED_TRG_ASSOC, 0,
name, trigger);
/* for assoc always turn led on */
priv->led[IWL_LED_TRG_ASSOC].led_on = iwl4965_led_on_reg;
priv->led[IWL_LED_TRG_ASSOC].led_off = iwl4965_led_on_reg;
priv->led[IWL_LED_TRG_ASSOC].led_pattern = NULL;
if (ret)
goto exit_fail;
trigger = ieee80211_get_rx_led_name(priv->hw);
snprintf(name, sizeof(name), "iwl-%s:RX",
wiphy_name(priv->hw->wiphy));
ret = iwl_leds_register_led(priv,
&priv->led[IWL_LED_TRG_RX],
IWL_LED_TRG_RX, 0,
name, trigger);
priv->led[IWL_LED_TRG_RX].led_on = iwl4965_led_associated;
priv->led[IWL_LED_TRG_RX].led_off = iwl4965_led_associated;
priv->led[IWL_LED_TRG_RX].led_pattern = iwl4965_led_pattern;
if (ret)
goto exit_fail;
trigger = ieee80211_get_tx_led_name(priv->hw);
snprintf(name, sizeof(name), "iwl-%s:TX",
wiphy_name(priv->hw->wiphy));
ret = iwl_leds_register_led(priv,
&priv->led[IWL_LED_TRG_TX],
IWL_LED_TRG_TX, 0,
name, trigger);
priv->led[IWL_LED_TRG_TX].led_on = iwl4965_led_associated;
priv->led[IWL_LED_TRG_TX].led_off = iwl4965_led_associated;
priv->led[IWL_LED_TRG_TX].led_pattern = iwl4965_led_pattern;
if (ret)
goto exit_fail;
return 0;
exit_fail:
iwl_leds_unregister(priv);
return ret;
}
EXPORT_SYMBOL(iwl_leds_register);
/* unregister led class */
static void iwl_leds_unregister_led(struct iwl4965_led *led, u8 set_led)
{
if (!led->registered)
return;
led_classdev_unregister(&led->led_dev);
if (set_led)
led->led_dev.brightness_set(&led->led_dev, LED_OFF);
led->registered = 0;
}
/* Unregister all led handlers */
void iwl_leds_unregister(struct iwl_priv *priv)
{
iwl_leds_unregister_led(&priv->led[IWL_LED_TRG_ASSOC], 0);
iwl_leds_unregister_led(&priv->led[IWL_LED_TRG_RX], 0);
iwl_leds_unregister_led(&priv->led[IWL_LED_TRG_TX], 0);
iwl_leds_unregister_led(&priv->led[IWL_LED_TRG_RADIO], 1);
}
EXPORT_SYMBOL(iwl_leds_unregister);

View File

@ -0,0 +1,82 @@
/******************************************************************************
*
* Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* James P. Ketrenos <ipw2100-admin@linux.intel.com>
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*
*****************************************************************************/
#ifndef __iwl_leds_h__
#define __iwl_leds_h__
struct iwl_priv;
#ifdef CONFIG_IWLWIFI_LEDS
#include <linux/leds.h>
#define IWL_LED_SOLID 11
#define IWL_LED_NAME_LEN 31
#define IWL_DEF_LED_INTRVL __constant_cpu_to_le32(1000)
#define IWL_LED_ACTIVITY (0<<1)
#define IWL_LED_LINK (1<<1)
enum led_type {
IWL_LED_TRG_TX,
IWL_LED_TRG_RX,
IWL_LED_TRG_ASSOC,
IWL_LED_TRG_RADIO,
IWL_LED_TRG_MAX,
};
struct iwl4965_led {
struct iwl_priv *priv;
struct led_classdev led_dev;
int (*led_on) (struct iwl_priv *priv, int led_id);
int (*led_off) (struct iwl_priv *priv, int led_id);
int (*led_pattern) (struct iwl_priv *priv, int led_id,
enum led_brightness brightness);
enum led_type type;
unsigned int registered;
};
int iwl_leds_register(struct iwl_priv *priv);
void iwl_leds_unregister(struct iwl_priv *priv);
void iwl_leds_background(struct iwl_priv *priv);
#else
static inline int iwl_leds_register(struct iwl_priv *priv)
{
return 0;
}
static inline void iwl_leds_unregister(struct iwl_priv *priv)
{
}
static inline void iwl_leds_background(struct iwl_priv *priv)
{
}
#endif /* CONFIG_IWLWIFI_LEDS */
#endif /* __iwl_leds_h__ */

View File

@ -2058,6 +2058,8 @@ int iwl3945_is_network_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *h
return !compare_ether_addr(header->addr2, priv->bssid);
/* packets to our adapter go through */
return !compare_ether_addr(header->addr1, priv->mac_addr);
default:
return 1;
}
return 1;
@ -2302,6 +2304,9 @@ static void iwl3945_connection_init_rx_config(struct iwl3945_priv *priv)
priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
break;
default:
IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode);
break;
}
#if 0
@ -2481,8 +2486,12 @@ static void iwl3945_build_tx_cmd_basic(struct iwl3945_priv *priv,
cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
else
cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
} else
} else {
cmd->cmd.tx.timeout.pm_frame_timeout = 0;
#ifdef CONFIG_IWL3945_LEDS
priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
#endif
}
cmd->cmd.tx.driver_txop = 0;
cmd->cmd.tx.tx_flags = tx_flags;
@ -5136,8 +5145,12 @@ static int iwl3945_init_geos(struct iwl3945_priv *priv)
priv->bands[IEEE80211_BAND_2GHZ].n_channels,
priv->bands[IEEE80211_BAND_5GHZ].n_channels);
priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->bands[IEEE80211_BAND_2GHZ];
priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->bands[IEEE80211_BAND_5GHZ];
if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
&priv->bands[IEEE80211_BAND_2GHZ];
if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
&priv->bands[IEEE80211_BAND_5GHZ];
set_bit(STATUS_GEO_CONFIGURED, &priv->status);
@ -5851,6 +5864,8 @@ static void iwl3945_alive_start(struct iwl3945_priv *priv)
IWL_DEBUG_INFO("ALIVE processing complete.\n");
wake_up_interruptible(&priv->wait_command_queue);
iwl3945_led_register(priv);
if (priv->error_recovering)
iwl3945_error_recovery(priv);
@ -5875,6 +5890,7 @@ static void __iwl3945_down(struct iwl3945_priv *priv)
if (!exit_pending)
set_bit(STATUS_EXIT_PENDING, &priv->status);
iwl3945_led_unregister(priv);
iwl3945_clear_stations_table(priv);
/* Unblock any waiting calls */

View File

@ -48,6 +48,7 @@
#include "iwl-eeprom.h"
#include "iwl-core.h"
#include "iwl-4965.h"
#include "iwl-io.h"
#include "iwl-helpers.h"
static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
@ -1792,6 +1793,8 @@ int iwl4965_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *heade
return !compare_ether_addr(header->addr2, priv->bssid);
/* packets to our adapter go through */
return !compare_ether_addr(header->addr1, priv->mac_addr);
default:
break;
}
return 1;
@ -2053,6 +2056,9 @@ static void iwl4965_connection_init_rx_config(struct iwl_priv *priv)
priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
break;
default:
IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode);
break;
}
#if 0
@ -2238,8 +2244,9 @@ static void iwl4965_build_tx_cmd_basic(struct iwl_priv *priv,
cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
else
cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
} else
} else {
cmd->cmd.tx.timeout.pm_frame_timeout = 0;
}
cmd->cmd.tx.driver_txop = 0;
cmd->cmd.tx.tx_flags = tx_flags;
@ -2615,7 +2622,7 @@ static void iwl4965_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
/* FIXME: This is a workaround for AP */
if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
spin_lock_irqsave(&priv->lock, flags);
iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
CSR_UCODE_SW_BIT_RFKILL);
spin_unlock_irqrestore(&priv->lock, flags);
iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
@ -2625,7 +2632,7 @@ static void iwl4965_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
}
spin_lock_irqsave(&priv->lock, flags);
iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
clear_bit(STATUS_RF_KILL_SW, &priv->status);
spin_unlock_irqrestore(&priv->lock, flags);
@ -2634,9 +2641,9 @@ static void iwl4965_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
msleep(10);
spin_lock_irqsave(&priv->lock, flags);
iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
if (!iwl4965_grab_nic_access(priv))
iwl4965_release_nic_access(priv);
iwl_read32(priv, CSR_UCODE_DRV_GP1);
if (!iwl_grab_nic_access(priv))
iwl_release_nic_access(priv);
spin_unlock_irqrestore(&priv->lock, flags);
if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
@ -3513,35 +3520,35 @@ static void iwl4965_rx_card_state_notif(struct iwl_priv *priv,
if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
RF_CARD_DISABLED)) {
iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
if (!iwl4965_grab_nic_access(priv)) {
iwl4965_write_direct32(
if (!iwl_grab_nic_access(priv)) {
iwl_write_direct32(
priv, HBUS_TARG_MBX_C,
HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
iwl4965_release_nic_access(priv);
iwl_release_nic_access(priv);
}
if (!(flags & RXON_CARD_DISABLED)) {
iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
if (!iwl4965_grab_nic_access(priv)) {
iwl4965_write_direct32(
if (!iwl_grab_nic_access(priv)) {
iwl_write_direct32(
priv, HBUS_TARG_MBX_C,
HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
iwl4965_release_nic_access(priv);
iwl_release_nic_access(priv);
}
}
if (flags & RF_CARD_DISABLED) {
iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
if (!iwl4965_grab_nic_access(priv))
iwl4965_release_nic_access(priv);
iwl_read32(priv, CSR_UCODE_DRV_GP1);
if (!iwl_grab_nic_access(priv))
iwl_release_nic_access(priv);
}
}
@ -3755,27 +3762,27 @@ int iwl4965_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl4965_rx_q
/* If power-saving is in use, make sure device is awake */
if (test_bit(STATUS_POWER_PMI, &priv->status)) {
reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
iwl4965_set_bit(priv, CSR_GP_CNTRL,
iwl_set_bit(priv, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
goto exit_unlock;
}
rc = iwl4965_grab_nic_access(priv);
rc = iwl_grab_nic_access(priv);
if (rc)
goto exit_unlock;
/* Device expects a multiple of 8 */
iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
iwl_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
q->write & ~0x7);
iwl4965_release_nic_access(priv);
iwl_release_nic_access(priv);
/* Else device is assumed to be awake */
} else
/* Device expects a multiple of 8 */
iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
q->need_update = 0;
@ -4212,27 +4219,27 @@ static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
/* wake up nic if it's powered down ...
* uCode will wake up, and interrupt us again, so next
* time we'll skip this part. */
reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
iwl4965_set_bit(priv, CSR_GP_CNTRL,
iwl_set_bit(priv, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
return rc;
}
/* restore this queue's parameters in nic hardware. */
rc = iwl4965_grab_nic_access(priv);
rc = iwl_grab_nic_access(priv);
if (rc)
return rc;
iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
iwl_write_direct32(priv, HBUS_TARG_WRPTR,
txq->q.write_ptr | (txq_id << 8));
iwl4965_release_nic_access(priv);
iwl_release_nic_access(priv);
/* else not in power-save mode, uCode will never sleep when we're
* trying to tx (during RFKILL, we're not trying to tx). */
} else
iwl4965_write32(priv, HBUS_TARG_WRPTR,
iwl_write32(priv, HBUS_TARG_WRPTR,
txq->q.write_ptr | (txq_id << 8));
txq->need_update = 0;
@ -4267,7 +4274,7 @@ static void iwl4965_enable_interrupts(struct iwl_priv *priv)
{
IWL_DEBUG_ISR("Enabling interrupts\n");
set_bit(STATUS_INT_ENABLED, &priv->status);
iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
}
static inline void iwl4965_disable_interrupts(struct iwl_priv *priv)
@ -4275,12 +4282,12 @@ static inline void iwl4965_disable_interrupts(struct iwl_priv *priv)
clear_bit(STATUS_INT_ENABLED, &priv->status);
/* disable interrupts from uCode/NIC to host */
iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
iwl_write32(priv, CSR_INT_MASK, 0x00000000);
/* acknowledge/clear/reset any interrupts still pending
* from uCode or flow handler (Rx/Tx DMA) */
iwl4965_write32(priv, CSR_INT, 0xffffffff);
iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
iwl_write32(priv, CSR_INT, 0xffffffff);
iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
IWL_DEBUG_ISR("Disabled interrupts\n");
}
@ -4321,28 +4328,28 @@ static void iwl4965_dump_nic_error_log(struct iwl_priv *priv)
return;
}
rc = iwl4965_grab_nic_access(priv);
rc = iwl_grab_nic_access(priv);
if (rc) {
IWL_WARNING("Can not read from adapter at this time.\n");
return;
}
count = iwl4965_read_targ_mem(priv, base);
count = iwl_read_targ_mem(priv, base);
if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
IWL_ERROR("Start IWL Error Log Dump:\n");
IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
}
desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32));
blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32));
blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32));
ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32));
ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32));
data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32));
data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32));
line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32));
time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32));
desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
IWL_ERROR("Desc Time "
"data1 data2 line\n");
@ -4352,7 +4359,7 @@ static void iwl4965_dump_nic_error_log(struct iwl_priv *priv)
IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
ilink1, ilink2);
iwl4965_release_nic_access(priv);
iwl_release_nic_access(priv);
}
#define EVENT_START_OFFSET (4 * sizeof(u32))
@ -4360,7 +4367,7 @@ static void iwl4965_dump_nic_error_log(struct iwl_priv *priv)
/**
* iwl4965_print_event_log - Dump error event log to syslog
*
* NOTE: Must be called with iwl4965_grab_nic_access() already obtained!
* NOTE: Must be called with iwl_grab_nic_access() already obtained!
*/
static void iwl4965_print_event_log(struct iwl_priv *priv, u32 start_idx,
u32 num_events, u32 mode)
@ -4386,14 +4393,14 @@ static void iwl4965_print_event_log(struct iwl_priv *priv, u32 start_idx,
/* "time" is actually "data" for mode 0 (no timestamp).
* place event id # at far right for easier visual parsing. */
for (i = 0; i < num_events; i++) {
ev = iwl4965_read_targ_mem(priv, ptr);
ev = iwl_read_targ_mem(priv, ptr);
ptr += sizeof(u32);
time = iwl4965_read_targ_mem(priv, ptr);
time = iwl_read_targ_mem(priv, ptr);
ptr += sizeof(u32);
if (mode == 0)
IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
else {
data = iwl4965_read_targ_mem(priv, ptr);
data = iwl_read_targ_mem(priv, ptr);
ptr += sizeof(u32);
IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
}
@ -4416,24 +4423,24 @@ static void iwl4965_dump_nic_event_log(struct iwl_priv *priv)
return;
}
rc = iwl4965_grab_nic_access(priv);
rc = iwl_grab_nic_access(priv);
if (rc) {
IWL_WARNING("Can not read from adapter at this time.\n");
return;
}
/* event log header */
capacity = iwl4965_read_targ_mem(priv, base);
mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32)));
num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32)));
next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32)));
capacity = iwl_read_targ_mem(priv, base);
mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
size = num_wraps ? capacity : next_entry;
/* bail out if nothing in log */
if (size == 0) {
IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
iwl4965_release_nic_access(priv);
iwl_release_nic_access(priv);
return;
}
@ -4449,7 +4456,7 @@ static void iwl4965_dump_nic_event_log(struct iwl_priv *priv)
/* (then/else) start at top of log */
iwl4965_print_event_log(priv, 0, next_entry, mode);
iwl4965_release_nic_access(priv);
iwl_release_nic_access(priv);
}
/**
@ -4521,19 +4528,19 @@ static void iwl4965_irq_tasklet(struct iwl_priv *priv)
/* Ack/clear/reset pending uCode interrupts.
* Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
* and will clear only when CSR_FH_INT_STATUS gets cleared. */
inta = iwl4965_read32(priv, CSR_INT);
iwl4965_write32(priv, CSR_INT, inta);
inta = iwl_read32(priv, CSR_INT);
iwl_write32(priv, CSR_INT, inta);
/* Ack/clear/reset pending flow-handler (DMA) interrupts.
* Any new interrupts that happen after this, either while we're
* in this tasklet, or later, will show up in next ISR/tasklet. */
inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh);
inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
#ifdef CONFIG_IWLWIFI_DEBUG
if (iwl_debug_level & IWL_DL_ISR) {
/* just for debug */
inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
inta_mask = iwl_read32(priv, CSR_INT_MASK);
IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
inta, inta_mask, inta_fh);
}
@ -4582,7 +4589,7 @@ static void iwl4965_irq_tasklet(struct iwl_priv *priv)
/* HW RF KILL switch toggled */
if (inta & CSR_INT_BIT_RF_KILL) {
int hw_rf_kill = 0;
if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
if (!(iwl_read32(priv, CSR_GP_CNTRL) &
CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
hw_rf_kill = 1;
@ -4657,9 +4664,9 @@ static void iwl4965_irq_tasklet(struct iwl_priv *priv)
#ifdef CONFIG_IWLWIFI_DEBUG
if (iwl_debug_level & (IWL_DL_ISR)) {
inta = iwl4965_read32(priv, CSR_INT);
inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
inta = iwl_read32(priv, CSR_INT);
inta_mask = iwl_read32(priv, CSR_INT_MASK);
inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
"flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
}
@ -4681,12 +4688,12 @@ static irqreturn_t iwl4965_isr(int irq, void *data)
* back-to-back ISRs and sporadic interrupts from our NIC.
* If we have something to service, the tasklet will re-enable ints.
* If we *don't* have something, we'll re-enable before leaving here. */
inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
iwl_write32(priv, CSR_INT_MASK, 0x00000000);
/* Discover which interrupts are active/pending */
inta = iwl4965_read32(priv, CSR_INT);
inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
inta = iwl_read32(priv, CSR_INT);
inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
/* Ignore interrupt if there's nothing in NIC to service.
* This may be due to IRQ shared with another device,
@ -5001,8 +5008,12 @@ int iwl4965_init_geos(struct iwl_priv *priv)
priv->bands[IEEE80211_BAND_2GHZ].n_channels,
priv->bands[IEEE80211_BAND_5GHZ].n_channels);
priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->bands[IEEE80211_BAND_2GHZ];
priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->bands[IEEE80211_BAND_5GHZ];
if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
&priv->bands[IEEE80211_BAND_2GHZ];
if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
&priv->bands[IEEE80211_BAND_5GHZ];
set_bit(STATUS_GEO_CONFIGURED, &priv->status);
@ -5049,18 +5060,18 @@ static int iwl4965_verify_inst_full(struct iwl_priv *priv, __le32 *image,
IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
rc = iwl4965_grab_nic_access(priv);
rc = iwl_grab_nic_access(priv);
if (rc)
return rc;
iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
errcnt = 0;
for (; len > 0; len -= sizeof(u32), image++) {
/* read data comes through single port, auto-incr addr */
/* NOTE: Use the debugless read so we don't flood kernel log
* if IWL_DL_IO is set */
val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
if (val != le32_to_cpu(*image)) {
IWL_ERROR("uCode INST section is invalid at "
"offset 0x%x, is 0x%x, s/b 0x%x\n",
@ -5072,7 +5083,7 @@ static int iwl4965_verify_inst_full(struct iwl_priv *priv, __le32 *image,
}
}
iwl4965_release_nic_access(priv);
iwl_release_nic_access(priv);
if (!errcnt)
IWL_DEBUG_INFO
@ -5096,7 +5107,7 @@ static int iwl4965_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32
IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
rc = iwl4965_grab_nic_access(priv);
rc = iwl_grab_nic_access(priv);
if (rc)
return rc;
@ -5104,9 +5115,9 @@ static int iwl4965_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32
/* read data comes through single port, auto-incr addr */
/* NOTE: Use the debugless read so we don't flood kernel log
* if IWL_DL_IO is set */
iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR,
iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
i + RTC_INST_LOWER_BOUND);
val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
if (val != le32_to_cpu(*image)) {
#if 0 /* Enable this if you want to see details */
IWL_ERROR("uCode INST section is invalid at "
@ -5120,7 +5131,7 @@ static int iwl4965_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32
}
}
iwl4965_release_nic_access(priv);
iwl_release_nic_access(priv);
return rc;
}
@ -5187,11 +5198,11 @@ static int iwl4965_verify_bsm(struct iwl_priv *priv)
IWL_DEBUG_INFO("Begin verify bsm\n");
/* verify BSM SRAM contents */
val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG);
val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
for (reg = BSM_SRAM_LOWER_BOUND;
reg < BSM_SRAM_LOWER_BOUND + len;
reg += sizeof(u32), image ++) {
val = iwl4965_read_prph(priv, reg);
val = iwl_read_prph(priv, reg);
if (val != le32_to_cpu(*image)) {
IWL_ERROR("BSM uCode verification failed at "
"addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
@ -5268,42 +5279,42 @@ static int iwl4965_load_bsm(struct iwl_priv *priv)
inst_len = priv->ucode_init.len;
data_len = priv->ucode_init_data.len;
rc = iwl4965_grab_nic_access(priv);
rc = iwl_grab_nic_access(priv);
if (rc)
return rc;
iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
/* Fill BSM memory with bootstrap instructions */
for (reg_offset = BSM_SRAM_LOWER_BOUND;
reg_offset < BSM_SRAM_LOWER_BOUND + len;
reg_offset += sizeof(u32), image++)
_iwl4965_write_prph(priv, reg_offset,
_iwl_write_prph(priv, reg_offset,
le32_to_cpu(*image));
rc = iwl4965_verify_bsm(priv);
if (rc) {
iwl4965_release_nic_access(priv);
iwl_release_nic_access(priv);
return rc;
}
/* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG,
iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
iwl_write_prph(priv, BSM_WR_MEM_DST_REG,
RTC_INST_LOWER_BOUND);
iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
/* Load bootstrap code into instruction SRAM now,
* to prepare to load "initialize" uCode */
iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
iwl_write_prph(priv, BSM_WR_CTRL_REG,
BSM_WR_CTRL_REG_BIT_START);
/* Wait for load of bootstrap uCode to finish */
for (i = 0; i < 100; i++) {
done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG);
done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
if (!(done & BSM_WR_CTRL_REG_BIT_START))
break;
udelay(10);
@ -5317,10 +5328,10 @@ static int iwl4965_load_bsm(struct iwl_priv *priv)
/* Enable future boot loads whenever power management unit triggers it
* (e.g. when powering back up after power-save shutdown) */
iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
iwl_write_prph(priv, BSM_WR_CTRL_REG,
BSM_WR_CTRL_REG_BIT_START_EN);
iwl4965_release_nic_access(priv);
iwl_release_nic_access(priv);
return 0;
}
@ -5328,7 +5339,7 @@ static int iwl4965_load_bsm(struct iwl_priv *priv)
static void iwl4965_nic_start(struct iwl_priv *priv)
{
/* Remove all resets to allow NIC to operate */
iwl4965_write32(priv, CSR_RESET, 0);
iwl_write32(priv, CSR_RESET, 0);
}
@ -5550,24 +5561,24 @@ static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
pdata = priv->ucode_data_backup.p_addr >> 4;
spin_lock_irqsave(&priv->lock, flags);
rc = iwl4965_grab_nic_access(priv);
rc = iwl_grab_nic_access(priv);
if (rc) {
spin_unlock_irqrestore(&priv->lock, flags);
return rc;
}
/* Tell bootstrap uCode where to find image to load */
iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
priv->ucode_data.len);
/* Inst bytecount must be last to set up, bit 31 signals uCode
* that all new ptr/size info is in place */
iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
priv->ucode_code.len | BSM_DRAM_INST_LOAD);
iwl4965_release_nic_access(priv);
iwl_release_nic_access(priv);
spin_unlock_irqrestore(&priv->lock, flags);
@ -5708,6 +5719,8 @@ static void iwl4965_alive_start(struct iwl_priv *priv)
IWL_DEBUG_INFO("ALIVE processing complete.\n");
wake_up_interruptible(&priv->wait_command_queue);
iwl_leds_register(priv);
if (priv->error_recovering)
iwl4965_error_recovery(priv);
@ -5732,6 +5745,8 @@ static void __iwl4965_down(struct iwl_priv *priv)
if (!exit_pending)
set_bit(STATUS_EXIT_PENDING, &priv->status);
iwl_leds_unregister(priv);
iwlcore_clear_stations_table(priv);
/* Unblock any waiting calls */
@ -5743,7 +5758,7 @@ static void __iwl4965_down(struct iwl_priv *priv)
clear_bit(STATUS_EXIT_PENDING, &priv->status);
/* stop and reset the on-board processor */
iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
/* tell the device to stop sending interrupts */
iwl4965_disable_interrupts(priv);
@ -5779,7 +5794,7 @@ static void __iwl4965_down(struct iwl_priv *priv)
STATUS_FW_ERROR;
spin_lock_irqsave(&priv->lock, flags);
iwl4965_clear_bit(priv, CSR_GP_CNTRL,
iwl_clear_bit(priv, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
spin_unlock_irqrestore(&priv->lock, flags);
@ -5787,17 +5802,17 @@ static void __iwl4965_down(struct iwl_priv *priv)
iwl4965_hw_rxq_stop(priv);
spin_lock_irqsave(&priv->lock, flags);
if (!iwl4965_grab_nic_access(priv)) {
iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
if (!iwl_grab_nic_access(priv)) {
iwl_write_prph(priv, APMG_CLK_DIS_REG,
APMG_CLK_VAL_DMA_CLK_RQT);
iwl4965_release_nic_access(priv);
iwl_release_nic_access(priv);
}
spin_unlock_irqrestore(&priv->lock, flags);
udelay(5);
iwl4965_hw_nic_stop_master(priv);
iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
iwl4965_hw_nic_reset(priv);
exit:
@ -5843,7 +5858,7 @@ static int __iwl4965_up(struct iwl_priv *priv)
}
/* If platform's RF_KILL switch is NOT set to KILL */
if (iwl4965_read32(priv, CSR_GP_CNTRL) &
if (iwl_read32(priv, CSR_GP_CNTRL) &
CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
clear_bit(STATUS_RF_KILL_HW, &priv->status);
else {
@ -5854,7 +5869,7 @@ static int __iwl4965_up(struct iwl_priv *priv)
}
}
iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
rc = iwl4965_hw_nic_init(priv);
if (rc) {
@ -5863,17 +5878,17 @@ static int __iwl4965_up(struct iwl_priv *priv)
}
/* make sure rfkill handshake bits are cleared */
iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
/* clear (again), then enable host interrupts */
iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
iwl4965_enable_interrupts(priv);
/* really make sure rfkill handshake bits are cleared */
iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
/* Copy original ucode data image from disk into backup cache.
* This will be used to initialize the on-board processor's
@ -8073,11 +8088,11 @@ static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e
* 4. Read EEPROM
*****************/
/* nic init */
iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
err = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
err = iwl_poll_bit(priv, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
if (err < 0) {

View File

@ -1186,8 +1186,8 @@ static void lbs_submit_command(struct lbs_private *priv,
command == CMD_802_11_AUTHENTICATE)
timeo = 10 * HZ;
lbs_deb_cmd("DNLD_CMD: command 0x%04x, seq %d, size %d, jiffies %lu\n",
command, le16_to_cpu(cmd->seqnum), cmdsize, jiffies);
lbs_deb_cmd("DNLD_CMD: command 0x%04x, seq %d, size %d\n",
command, le16_to_cpu(cmd->seqnum), cmdsize);
lbs_deb_hex(LBS_DEB_CMD, "DNLD_CMD", (void *) cmdnode->cmdbuf, cmdsize);
ret = priv->hw_host_to_card(priv, MVMS_CMD, (u8 *) cmd, cmdsize);
@ -1496,16 +1496,6 @@ int lbs_prepare_and_send_command(struct lbs_private *priv,
break;
}
case CMD_802_11_PWR_CFG:
cmdptr->command = cpu_to_le16(CMD_802_11_PWR_CFG);
cmdptr->size =
cpu_to_le16(sizeof(struct cmd_ds_802_11_pwr_cfg) +
S_DS_GEN);
memmove(&cmdptr->params.pwrcfg, pdata_buf,
sizeof(struct cmd_ds_802_11_pwr_cfg));
ret = 0;
break;
case CMD_BT_ACCESS:
ret = lbs_cmd_bt_access(cmdptr, cmd_action, pdata_buf);
break;

View File

@ -397,14 +397,6 @@ static inline int handle_cmd_response(struct lbs_private *priv,
spin_unlock_irqrestore(&priv->driver_lock, flags);
break;
case CMD_RET(CMD_802_11_PWR_CFG):
spin_lock_irqsave(&priv->driver_lock, flags);
memmove((void *)priv->cur_cmd->callback_arg, &resp->params.pwrcfg,
sizeof(struct cmd_ds_802_11_pwr_cfg));
spin_unlock_irqrestore(&priv->driver_lock, flags);
break;
case CMD_RET(CMD_GET_TSF):
spin_lock_irqsave(&priv->driver_lock, flags);
memcpy((void *)priv->cur_cmd->callback_arg,
@ -463,8 +455,8 @@ int lbs_process_rx_command(struct lbs_private *priv)
respcmd = le16_to_cpu(resp->command);
result = le16_to_cpu(resp->result);
lbs_deb_cmd("CMD_RESP: response 0x%04x, seq %d, size %d, jiffies %lu\n",
respcmd, le16_to_cpu(resp->seqnum), priv->upld_len, jiffies);
lbs_deb_cmd("CMD_RESP: response 0x%04x, seq %d, size %d\n",
respcmd, le16_to_cpu(resp->seqnum), priv->upld_len);
lbs_deb_hex(LBS_DEB_CMD, "CMD_RESP", (void *) resp, priv->upld_len);
if (resp->seqnum != priv->cur_cmd->cmdbuf->seqnum) {

View File

@ -53,14 +53,14 @@ do { if ((lbs_debug & (grp)) == (grp)) \
#endif
#define lbs_deb_enter(grp) \
LBS_DEB_LL(grp | LBS_DEB_ENTER, " enter", "%s():%d\n", __FUNCTION__, __LINE__);
LBS_DEB_LL(grp | LBS_DEB_ENTER, " enter", "%s()\n", __func__);
#define lbs_deb_enter_args(grp, fmt, args...) \
LBS_DEB_LL(grp | LBS_DEB_ENTER, " enter", "%s(" fmt "):%d\n", __FUNCTION__, ## args, __LINE__);
LBS_DEB_LL(grp | LBS_DEB_ENTER, " enter", "%s(" fmt ")\n", __func__, ## args);
#define lbs_deb_leave(grp) \
LBS_DEB_LL(grp | LBS_DEB_LEAVE, " leave", "%s():%d\n", __FUNCTION__, __LINE__);
LBS_DEB_LL(grp | LBS_DEB_LEAVE, " leave", "%s()\n", __func__);
#define lbs_deb_leave_args(grp, fmt, args...) \
LBS_DEB_LL(grp | LBS_DEB_LEAVE, " leave", "%s():%d, " fmt "\n", \
__FUNCTION__, __LINE__, ##args);
LBS_DEB_LL(grp | LBS_DEB_LEAVE, " leave", "%s(), " fmt "\n", \
__func__, ##args);
#define lbs_deb_main(fmt, args...) LBS_DEB_LL(LBS_DEB_MAIN, " main", fmt, ##args)
#define lbs_deb_net(fmt, args...) LBS_DEB_LL(LBS_DEB_NET, " net", fmt, ##args)
#define lbs_deb_mesh(fmt, args...) LBS_DEB_LL(LBS_DEB_MESH, " mesh", fmt, ##args)

View File

@ -84,7 +84,6 @@
#define CMD_802_11_INACTIVITY_TIMEOUT 0x0067
#define CMD_802_11_SLEEP_PERIOD 0x0068
#define CMD_802_11_TPC_CFG 0x0072
#define CMD_802_11_PWR_CFG 0x0073
#define CMD_802_11_FW_WAKE_METHOD 0x0074
#define CMD_802_11_SUBSCRIBE_EVENT 0x0075
#define CMD_802_11_RATE_ADAPT_RATESET 0x0076

View File

@ -609,14 +609,6 @@ struct cmd_ds_802_11_led_ctrl {
u8 data[256];
} __attribute__ ((packed));
struct cmd_ds_802_11_pwr_cfg {
__le16 action;
u8 enable;
s8 PA_P0;
s8 PA_P1;
s8 PA_P2;
} __attribute__ ((packed));
struct cmd_ds_802_11_afc {
__le16 afc_auto;
union {
@ -726,7 +718,6 @@ struct cmd_ds_command {
struct cmd_ds_802_11d_domain_info domaininforesp;
struct cmd_ds_802_11_tpc_cfg tpccfg;
struct cmd_ds_802_11_pwr_cfg pwrcfg;
struct cmd_ds_802_11_afc afc;
struct cmd_ds_802_11_led_ctrl ledgpio;

View File

@ -277,10 +277,10 @@ static ssize_t lbs_rtap_set(struct device *dev,
struct lbs_private *priv = to_net_dev(dev)->priv;
sscanf(buf, "%x", &monitor_mode);
if (monitor_mode != LBS_MONITOR_OFF) {
if(priv->monitormode == monitor_mode)
if (monitor_mode) {
if (priv->monitormode == monitor_mode)
return strlen(buf);
if (priv->monitormode == LBS_MONITOR_OFF) {
if (!priv->monitormode) {
if (priv->infra_open || priv->mesh_open)
return -EBUSY;
if (priv->mode == IW_MODE_INFRA)
@ -293,9 +293,9 @@ static ssize_t lbs_rtap_set(struct device *dev,
}
else {
if (priv->monitormode == LBS_MONITOR_OFF)
if (!priv->monitormode)
return strlen(buf);
priv->monitormode = LBS_MONITOR_OFF;
priv->monitormode = 0;
lbs_remove_rtap(priv);
if (priv->currenttxskb) {
@ -392,7 +392,7 @@ static int lbs_dev_open(struct net_device *dev)
spin_lock_irq(&priv->driver_lock);
if (priv->monitormode != LBS_MONITOR_OFF) {
if (priv->monitormode) {
ret = -EBUSY;
goto out;
}

View File

@ -155,7 +155,7 @@ int lbs_process_rxed_packet(struct lbs_private *priv, struct sk_buff *skb)
skb->ip_summed = CHECKSUM_NONE;
if (priv->monitormode != LBS_MONITOR_OFF)
if (priv->monitormode)
return process_rxed_802_11_packet(priv, skb);
p_rx_pkt = (struct rxpackethdr *) skb->data;

View File

@ -151,7 +151,7 @@ int lbs_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
dev->trans_start = jiffies;
if (priv->monitormode != LBS_MONITOR_OFF) {
if (priv->monitormode) {
/* Keep the skb to echo it back once Tx feedback is
received from FW */
skb_orphan(skb);
@ -186,8 +186,7 @@ void lbs_send_tx_feedback(struct lbs_private *priv)
int txfail;
int try_count;
if (priv->monitormode == LBS_MONITOR_OFF ||
priv->currenttxskb == NULL)
if (!priv->monitormode || priv->currenttxskb == NULL)
return;
radiotap_hdr = (struct tx_radiotap_hdr *)priv->currenttxskb->data;

View File

@ -15,8 +15,6 @@ struct lbs_ioctl_regrdwr {
u32 value;
};
#define LBS_MONITOR_OFF 0
extern struct iw_handler_def lbs_handler_def;
extern struct iw_handler_def mesh_handler_def;

View File

@ -218,7 +218,7 @@ prism54_get_wireless_stats(struct net_device *ndev)
islpci_private *priv = netdev_priv(ndev);
/* If the stats are being updated return old data */
if (mutex_trylock(&priv->stats_lock) == 0) {
if (mutex_trylock(&priv->stats_lock)) {
memcpy(&priv->iwstatistics, &priv->local_iwstatistics,
sizeof (struct iw_statistics));
/* They won't be marked updated for the next time */

View File

@ -304,10 +304,22 @@ extern int ieee80211_channel_to_frequency(int chan);
*/
extern int ieee80211_frequency_to_channel(int freq);
/*
* Name indirection necessary because the ieee80211 code also has
* a function named "ieee80211_get_channel", so if you include
* cfg80211's header file you get cfg80211's version, if you try
* to include both header files you'll (rightfully!) get a symbol
* clash.
*/
extern struct ieee80211_channel *__ieee80211_get_channel(struct wiphy *wiphy,
int freq);
/**
* ieee80211_get_channel - get channel struct from wiphy for specified frequency
*/
extern struct ieee80211_channel *ieee80211_get_channel(struct wiphy *wiphy,
int freq);
static inline struct ieee80211_channel *
ieee80211_get_channel(struct wiphy *wiphy, int freq)
{
return __ieee80211_get_channel(wiphy, freq);
}
#endif /* __NET_WIRELESS_H */

View File

@ -169,27 +169,30 @@ static ssize_t sta_agg_status_read(struct file *file, char __user *userbuf,
p += scnprintf(p, sizeof(buf)+buf-p, "\n RX :");
for (i = 0; i < STA_TID_NUM; i++)
p += scnprintf(p, sizeof(buf)+buf-p, "%5d",
sta->ampdu_mlme.tid_rx[i].state);
sta->ampdu_mlme.tid_state_rx[i]);
p += scnprintf(p, sizeof(buf)+buf-p, "\n DTKN:");
for (i = 0; i < STA_TID_NUM; i++)
p += scnprintf(p, sizeof(buf)+buf-p, "%5d",
sta->ampdu_mlme.tid_rx[i].dialog_token);
sta->ampdu_mlme.tid_state_rx[i]?
sta->ampdu_mlme.tid_rx[i]->dialog_token : 0);
p += scnprintf(p, sizeof(buf)+buf-p, "\n TX :");
for (i = 0; i < STA_TID_NUM; i++)
p += scnprintf(p, sizeof(buf)+buf-p, "%5d",
sta->ampdu_mlme.tid_tx[i].state);
sta->ampdu_mlme.tid_state_tx[i]);
p += scnprintf(p, sizeof(buf)+buf-p, "\n DTKN:");
for (i = 0; i < STA_TID_NUM; i++)
p += scnprintf(p, sizeof(buf)+buf-p, "%5d",
sta->ampdu_mlme.tid_tx[i].dialog_token);
sta->ampdu_mlme.tid_state_tx[i]?
sta->ampdu_mlme.tid_tx[i]->dialog_token : 0);
p += scnprintf(p, sizeof(buf)+buf-p, "\n SSN :");
for (i = 0; i < STA_TID_NUM; i++)
p += scnprintf(p, sizeof(buf)+buf-p, "%5d",
sta->ampdu_mlme.tid_tx[i].ssn);
sta->ampdu_mlme.tid_state_tx[i]?
sta->ampdu_mlme.tid_tx[i]->ssn : 0);
p += scnprintf(p, sizeof(buf)+buf-p, "\n");
@ -230,11 +233,13 @@ static ssize_t sta_agg_status_write(struct file *file,
strcpy(state, "off ");
ieee80211_sta_stop_rx_ba_session(dev, da, tid_num, 0,
WLAN_REASON_QSTA_REQUIRE_SETUP);
sta->ampdu_mlme.tid_rx[tid_num].buf_size = 0xFF;
sta->ampdu_mlme.tid_state_rx[tid_num] |=
HT_AGG_STATE_DEBUGFS_CTL;
tid_static_rx[tid_num] = 0;
} else {
strcpy(state, "on ");
sta->ampdu_mlme.tid_rx[tid_num].buf_size = 0x00;
sta->ampdu_mlme.tid_state_rx[tid_num] &=
~HT_AGG_STATE_DEBUGFS_CTL;
tid_static_rx[tid_num] = 1;
}
printk(KERN_DEBUG "debugfs - try switching tid %u %s\n",

View File

@ -569,12 +569,12 @@ int ieee80211_start_tx_ba_session(struct ieee80211_hw *hw, u8 *ra, u16 tid)
spin_lock_bh(&sta->ampdu_mlme.ampdu_tx);
/* we have tried too many times, receiver does not want A-MPDU */
if (sta->ampdu_mlme.tid_tx[tid].addba_req_num > HT_AGG_MAX_RETRIES) {
if (sta->ampdu_mlme.addba_req_num[tid] > HT_AGG_MAX_RETRIES) {
ret = -EBUSY;
goto start_ba_exit;
}
state = &sta->ampdu_mlme.tid_tx[tid].state;
state = &sta->ampdu_mlme.tid_state_tx[tid];
/* check if the TID is not in aggregation flow already */
if (*state != HT_AGG_STATE_IDLE) {
#ifdef CONFIG_MAC80211_HT_DEBUG
@ -585,6 +585,23 @@ int ieee80211_start_tx_ba_session(struct ieee80211_hw *hw, u8 *ra, u16 tid)
goto start_ba_exit;
}
/* prepare A-MPDU MLME for Tx aggregation */
sta->ampdu_mlme.tid_tx[tid] =
kmalloc(sizeof(struct tid_ampdu_tx), GFP_ATOMIC);
if (!sta->ampdu_mlme.tid_tx[tid]) {
if (net_ratelimit())
printk(KERN_ERR "allocate tx mlme to tid %d failed\n",
tid);
ret = -ENOMEM;
goto start_ba_exit;
}
/* Tx timer */
sta->ampdu_mlme.tid_tx[tid]->addba_resp_timer.function =
sta_addba_resp_timer_expired;
sta->ampdu_mlme.tid_tx[tid]->addba_resp_timer.data =
(unsigned long)&sta->timer_to_tid[tid];
init_timer(&sta->ampdu_mlme.tid_tx[tid]->addba_resp_timer);
/* ensure that TX flow won't interrupt us
* until the end of the call to requeue function */
spin_lock_bh(&local->mdev->queue_lock);
@ -596,11 +613,10 @@ int ieee80211_start_tx_ba_session(struct ieee80211_hw *hw, u8 *ra, u16 tid)
* don't switch to aggregation */
if (ret) {
#ifdef CONFIG_MAC80211_HT_DEBUG
printk(KERN_DEBUG "BA request denied - no queue available for"
printk(KERN_DEBUG "BA request denied - queue unavailable for"
" tid %d\n", tid);
#endif /* CONFIG_MAC80211_HT_DEBUG */
spin_unlock_bh(&local->mdev->queue_lock);
goto start_ba_exit;
goto start_ba_err;
}
sdata = sta->sdata;
@ -618,38 +634,40 @@ int ieee80211_start_tx_ba_session(struct ieee80211_hw *hw, u8 *ra, u16 tid)
* allocated queue */
ieee80211_ht_agg_queue_remove(local, sta, tid, 0);
#ifdef CONFIG_MAC80211_HT_DEBUG
printk(KERN_DEBUG "BA request denied - HW or queue unavailable"
" for tid %d\n", tid);
printk(KERN_DEBUG "BA request denied - HW unavailable for"
" tid %d\n", tid);
#endif /* CONFIG_MAC80211_HT_DEBUG */
spin_unlock_bh(&local->mdev->queue_lock);
*state = HT_AGG_STATE_IDLE;
goto start_ba_exit;
goto start_ba_err;
}
/* Will put all the packets in the new SW queue */
ieee80211_requeue(local, ieee802_1d_to_ac[tid]);
spin_unlock_bh(&local->mdev->queue_lock);
/* We have most probably almost emptied the legacy queue */
/* ieee80211_wake_queue(local_to_hw(local), ieee802_1d_to_ac[tid]); */
/* send an addBA request */
sta->ampdu_mlme.dialog_token_allocator++;
sta->ampdu_mlme.tid_tx[tid].dialog_token =
sta->ampdu_mlme.tid_tx[tid]->dialog_token =
sta->ampdu_mlme.dialog_token_allocator;
sta->ampdu_mlme.tid_tx[tid].ssn = start_seq_num;
sta->ampdu_mlme.tid_tx[tid]->ssn = start_seq_num;
ieee80211_send_addba_request(sta->sdata->dev, ra, tid,
sta->ampdu_mlme.tid_tx[tid].dialog_token,
sta->ampdu_mlme.tid_tx[tid].ssn,
sta->ampdu_mlme.tid_tx[tid]->dialog_token,
sta->ampdu_mlme.tid_tx[tid]->ssn,
0x40, 5000);
/* activate the timer for the recipient's addBA response */
sta->ampdu_mlme.tid_tx[tid].addba_resp_timer.expires =
sta->ampdu_mlme.tid_tx[tid]->addba_resp_timer.expires =
jiffies + ADDBA_RESP_INTERVAL;
add_timer(&sta->ampdu_mlme.tid_tx[tid].addba_resp_timer);
add_timer(&sta->ampdu_mlme.tid_tx[tid]->addba_resp_timer);
printk(KERN_DEBUG "activated addBA response timer on tid %d\n", tid);
goto start_ba_exit;
start_ba_err:
kfree(sta->ampdu_mlme.tid_tx[tid]);
sta->ampdu_mlme.tid_tx[tid] = NULL;
spin_unlock_bh(&local->mdev->queue_lock);
ret = -EBUSY;
start_ba_exit:
spin_unlock_bh(&sta->ampdu_mlme.ampdu_tx);
rcu_read_unlock();
@ -683,7 +701,7 @@ int ieee80211_stop_tx_ba_session(struct ieee80211_hw *hw,
}
/* check if the TID is in aggregation */
state = &sta->ampdu_mlme.tid_tx[tid].state;
state = &sta->ampdu_mlme.tid_state_tx[tid];
spin_lock_bh(&sta->ampdu_mlme.ampdu_tx);
if (*state != HT_AGG_STATE_OPERATIONAL) {
@ -741,7 +759,7 @@ void ieee80211_start_tx_ba_cb(struct ieee80211_hw *hw, u8 *ra, u16 tid)
return;
}
state = &sta->ampdu_mlme.tid_tx[tid].state;
state = &sta->ampdu_mlme.tid_state_tx[tid];
spin_lock_bh(&sta->ampdu_mlme.ampdu_tx);
if (!(*state & HT_ADDBA_REQUESTED_MSK)) {
@ -790,7 +808,7 @@ void ieee80211_stop_tx_ba_cb(struct ieee80211_hw *hw, u8 *ra, u8 tid)
rcu_read_unlock();
return;
}
state = &sta->ampdu_mlme.tid_tx[tid].state;
state = &sta->ampdu_mlme.tid_state_tx[tid];
spin_lock_bh(&sta->ampdu_mlme.ampdu_tx);
if ((*state & HT_AGG_STATE_REQ_STOP_BA_MSK) == 0) {
@ -819,7 +837,9 @@ void ieee80211_stop_tx_ba_cb(struct ieee80211_hw *hw, u8 *ra, u8 tid)
* necessarily stopped */
netif_schedule(local->mdev);
*state = HT_AGG_STATE_IDLE;
sta->ampdu_mlme.tid_tx[tid].addba_req_num = 0;
sta->ampdu_mlme.addba_req_num[tid] = 0;
kfree(sta->ampdu_mlme.tid_tx[tid]);
sta->ampdu_mlme.tid_tx[tid] = NULL;
spin_unlock_bh(&sta->ampdu_mlme.ampdu_tx);
rcu_read_unlock();

View File

@ -73,11 +73,12 @@ struct ieee80211_fragment_entry {
struct ieee80211_sta_bss {
struct list_head list;
struct ieee80211_sta_bss *hnext;
size_t ssid_len;
atomic_t users;
u8 bssid[ETH_ALEN];
u8 ssid[IEEE80211_MAX_SSID_LEN];
size_t ssid_len;
u16 capability; /* host byte order */
enum ieee80211_band band;
int freq;
@ -98,8 +99,8 @@ struct ieee80211_sta_bss {
#define IEEE80211_MAX_SUPP_RATES 32
u8 supp_rates[IEEE80211_MAX_SUPP_RATES];
size_t supp_rates_len;
int beacon_int;
u64 timestamp;
int beacon_int;
int probe_resp;
unsigned long last_update;
@ -154,9 +155,7 @@ struct ieee80211_tx_data {
struct ieee80211_local *local;
struct ieee80211_sub_if_data *sdata;
struct sta_info *sta;
u16 fc, ethertype;
struct ieee80211_key *key;
unsigned int flags;
struct ieee80211_tx_control *control;
struct ieee80211_channel *channel;
@ -168,8 +167,11 @@ struct ieee80211_tx_data {
/* Extra fragments (in addition to the first fragment
* in skb) */
int num_extra_frag;
struct sk_buff **extra_frag;
int num_extra_frag;
u16 fc, ethertype;
unsigned int flags;
};
@ -192,12 +194,12 @@ struct ieee80211_rx_data {
struct ieee80211_local *local;
struct ieee80211_sub_if_data *sdata;
struct sta_info *sta;
u16 fc, ethertype;
struct ieee80211_key *key;
unsigned int flags;
struct ieee80211_rx_status *status;
struct ieee80211_rate *rate;
u16 fc, ethertype;
unsigned int flags;
int sent_ps_buffered;
int queue;
int load;
@ -222,9 +224,9 @@ struct ieee80211_tx_packet_data {
struct ieee80211_tx_stored_packet {
struct ieee80211_tx_control control;
struct sk_buff *skb;
int num_extra_frag;
struct sk_buff **extra_frag;
struct ieee80211_rate *last_frag_rate;
int num_extra_frag;
unsigned int last_frag_rate_ctrl_probe;
};
@ -246,8 +248,8 @@ struct ieee80211_if_ap {
* bitmap_empty :)
* NB: don't touch this bitmap, use sta_info_{set,clear}_tim_bit */
u8 tim[sizeof(unsigned long) * BITS_TO_LONGS(IEEE80211_MAX_AID + 1)];
atomic_t num_sta_ps; /* number of stations in PS mode */
struct sk_buff_head ps_bc_buf;
atomic_t num_sta_ps; /* number of stations in PS mode */
int dtim_count;
int force_unicast_rateidx; /* forced TX rateidx for unicast frames */
int max_ratectrl_rateidx; /* max TX rateidx for rate control */
@ -255,8 +257,8 @@ struct ieee80211_if_ap {
};
struct ieee80211_if_wds {
u8 remote_addr[ETH_ALEN];
struct sta_info *sta;
u8 remote_addr[ETH_ALEN];
};
struct ieee80211_if_vlan {
@ -290,12 +292,12 @@ struct mesh_config {
u8 dot11MeshTTL;
bool auto_open_plinks;
/* HWMP parameters */
u32 dot11MeshHWMPactivePathTimeout;
u16 dot11MeshHWMPpreqMinInterval;
u16 dot11MeshHWMPnetDiameterTraversalTime;
u8 dot11MeshHWMPmaxPREQretries;
u32 path_refresh_time;
u16 min_discovery_timeout;
u32 dot11MeshHWMPactivePathTimeout;
u16 dot11MeshHWMPpreqMinInterval;
u16 dot11MeshHWMPnetDiameterTraversalTime;
};
@ -314,23 +316,22 @@ struct mesh_config {
#define IEEE80211_STA_AUTO_CHANNEL_SEL BIT(12)
#define IEEE80211_STA_PRIVACY_INVOKED BIT(13)
struct ieee80211_if_sta {
struct timer_list timer;
struct work_struct work;
u8 bssid[ETH_ALEN], prev_bssid[ETH_ALEN];
u8 ssid[IEEE80211_MAX_SSID_LEN];
enum {
IEEE80211_DISABLED, IEEE80211_AUTHENTICATE,
IEEE80211_ASSOCIATE, IEEE80211_ASSOCIATED,
IEEE80211_IBSS_SEARCH, IEEE80211_IBSS_JOINED,
IEEE80211_MESH_UP
} state;
struct timer_list timer;
struct work_struct work;
u8 bssid[ETH_ALEN], prev_bssid[ETH_ALEN];
u8 ssid[IEEE80211_MAX_SSID_LEN];
size_t ssid_len;
u8 scan_ssid[IEEE80211_MAX_SSID_LEN];
size_t scan_ssid_len;
#ifdef CONFIG_MAC80211_MESH
struct timer_list mesh_path_timer;
u8 mesh_id[IEEE80211_MAX_MESH_ID_LEN];
bool accepting_plinks;
size_t mesh_id_len;
/* Active Path Selection Protocol Identifier */
u8 mesh_pp_id[4];
@ -354,6 +355,7 @@ struct ieee80211_if_sta {
struct mesh_stats mshstats;
struct mesh_config mshcfg;
u8 mesh_seqnum[3];
bool accepting_plinks;
#endif
u16 aid;
u16 ap_capab, capab;
@ -364,16 +366,18 @@ struct ieee80211_if_sta {
u8 *assocreq_ies, *assocresp_ies;
size_t assocreq_ies_len, assocresp_ies_len;
struct sk_buff_head skb_queue;
int auth_tries, assoc_tries;
unsigned long request;
unsigned long last_probe;
unsigned int flags;
#define IEEE80211_STA_REQ_SCAN 0
#define IEEE80211_STA_REQ_AUTH 1
#define IEEE80211_STA_REQ_RUN 2
unsigned long request;
struct sk_buff_head skb_queue;
unsigned long last_probe;
#define IEEE80211_AUTH_ALG_OPEN BIT(0)
#define IEEE80211_AUTH_ALG_SHARED_KEY BIT(1)

View File

@ -55,9 +55,6 @@ static int ieee80211_set_encryption(struct net_device *dev, u8 *sta_addr,
key = sta->key;
}
if (!key)
return -ENOENT;
ieee80211_key_free(key);
return 0;
} else {

View File

@ -1216,12 +1216,11 @@ static void ieee80211_sta_process_addba_request(struct net_device *dev,
buf_size = buf_size << sband->ht_info.ampdu_factor;
}
tid_agg_rx = &sta->ampdu_mlme.tid_rx[tid];
/* examine state machine */
spin_lock_bh(&sta->ampdu_mlme.ampdu_rx);
if (tid_agg_rx->state != HT_AGG_STATE_IDLE) {
if (sta->ampdu_mlme.tid_state_rx[tid] != HT_AGG_STATE_IDLE) {
#ifdef CONFIG_MAC80211_HT_DEBUG
if (net_ratelimit())
printk(KERN_DEBUG "unexpected AddBA Req from "
@ -1231,6 +1230,24 @@ static void ieee80211_sta_process_addba_request(struct net_device *dev,
goto end;
}
/* prepare A-MPDU MLME for Rx aggregation */
sta->ampdu_mlme.tid_rx[tid] =
kmalloc(sizeof(struct tid_ampdu_rx), GFP_ATOMIC);
if (!sta->ampdu_mlme.tid_rx[tid]) {
if (net_ratelimit())
printk(KERN_ERR "allocate rx mlme to tid %d failed\n",
tid);
goto end;
}
/* rx timer */
sta->ampdu_mlme.tid_rx[tid]->session_timer.function =
sta_rx_agg_session_timer_expired;
sta->ampdu_mlme.tid_rx[tid]->session_timer.data =
(unsigned long)&sta->timer_to_tid[tid];
init_timer(&sta->ampdu_mlme.tid_rx[tid]->session_timer);
tid_agg_rx = sta->ampdu_mlme.tid_rx[tid];
/* prepare reordering buffer */
tid_agg_rx->reorder_buf =
kmalloc(buf_size * sizeof(struct sk_buf *), GFP_ATOMIC);
@ -1238,6 +1255,7 @@ static void ieee80211_sta_process_addba_request(struct net_device *dev,
if (net_ratelimit())
printk(KERN_ERR "can not allocate reordering buffer "
"to tid %d\n", tid);
kfree(sta->ampdu_mlme.tid_rx[tid]);
goto end;
}
memset(tid_agg_rx->reorder_buf, 0,
@ -1252,11 +1270,13 @@ static void ieee80211_sta_process_addba_request(struct net_device *dev,
if (ret) {
kfree(tid_agg_rx->reorder_buf);
kfree(tid_agg_rx);
sta->ampdu_mlme.tid_rx[tid] = NULL;
goto end;
}
/* change state and send addba resp */
tid_agg_rx->state = HT_AGG_STATE_OPERATIONAL;
sta->ampdu_mlme.tid_state_rx[tid] = HT_AGG_STATE_OPERATIONAL;
tid_agg_rx->dialog_token = dialog_token;
tid_agg_rx->ssn = start_seq_num;
tid_agg_rx->head_seq_num = start_seq_num;
@ -1295,39 +1315,37 @@ static void ieee80211_sta_process_addba_resp(struct net_device *dev,
capab = le16_to_cpu(mgmt->u.action.u.addba_resp.capab);
tid = (capab & IEEE80211_ADDBA_PARAM_TID_MASK) >> 2;
state = &sta->ampdu_mlme.tid_tx[tid].state;
state = &sta->ampdu_mlme.tid_state_tx[tid];
spin_lock_bh(&sta->ampdu_mlme.ampdu_tx);
if (!(*state & HT_ADDBA_REQUESTED_MSK)) {
spin_unlock_bh(&sta->ampdu_mlme.ampdu_tx);
printk(KERN_DEBUG "state not HT_ADDBA_REQUESTED_MSK:"
"%d\n", *state);
goto addba_resp_exit;
}
if (mgmt->u.action.u.addba_resp.dialog_token !=
sta->ampdu_mlme.tid_tx[tid].dialog_token) {
sta->ampdu_mlme.tid_tx[tid]->dialog_token) {
spin_unlock_bh(&sta->ampdu_mlme.ampdu_tx);
#ifdef CONFIG_MAC80211_HT_DEBUG
printk(KERN_DEBUG "wrong addBA response token, tid %d\n", tid);
#endif /* CONFIG_MAC80211_HT_DEBUG */
rcu_read_unlock();
return;
goto addba_resp_exit;
}
del_timer_sync(&sta->ampdu_mlme.tid_tx[tid].addba_resp_timer);
del_timer_sync(&sta->ampdu_mlme.tid_tx[tid]->addba_resp_timer);
#ifdef CONFIG_MAC80211_HT_DEBUG
printk(KERN_DEBUG "switched off addBA timer for tid %d \n", tid);
#endif /* CONFIG_MAC80211_HT_DEBUG */
if (le16_to_cpu(mgmt->u.action.u.addba_resp.status)
== WLAN_STATUS_SUCCESS) {
if (!(*state & HT_ADDBA_REQUESTED_MSK)) {
spin_unlock_bh(&sta->ampdu_mlme.ampdu_tx);
printk(KERN_DEBUG "state not HT_ADDBA_REQUESTED_MSK:"
"%d\n", *state);
rcu_read_unlock();
return;
}
if (*state & HT_ADDBA_RECEIVED_MSK)
printk(KERN_DEBUG "double addBA response\n");
*state |= HT_ADDBA_RECEIVED_MSK;
sta->ampdu_mlme.tid_tx[tid].addba_req_num = 0;
sta->ampdu_mlme.addba_req_num[tid] = 0;
if (*state == HT_AGG_STATE_OPERATIONAL) {
printk(KERN_DEBUG "Aggregation on for tid %d \n", tid);
@ -1339,13 +1357,15 @@ static void ieee80211_sta_process_addba_resp(struct net_device *dev,
} else {
printk(KERN_DEBUG "recipient rejected agg: tid %d \n", tid);
sta->ampdu_mlme.tid_tx[tid].addba_req_num++;
sta->ampdu_mlme.addba_req_num[tid]++;
/* this will allow the state check in stop_BA_session */
*state = HT_AGG_STATE_OPERATIONAL;
spin_unlock_bh(&sta->ampdu_mlme.ampdu_tx);
ieee80211_stop_tx_ba_session(hw, sta->addr, tid,
WLAN_BACK_INITIATOR);
}
addba_resp_exit:
rcu_read_unlock();
}
@ -1411,13 +1431,13 @@ void ieee80211_sta_stop_rx_ba_session(struct net_device *dev, u8 *ra, u16 tid,
/* check if TID is in operational state */
spin_lock_bh(&sta->ampdu_mlme.ampdu_rx);
if (sta->ampdu_mlme.tid_rx[tid].state
if (sta->ampdu_mlme.tid_state_rx[tid]
!= HT_AGG_STATE_OPERATIONAL) {
spin_unlock_bh(&sta->ampdu_mlme.ampdu_rx);
rcu_read_unlock();
return;
}
sta->ampdu_mlme.tid_rx[tid].state =
sta->ampdu_mlme.tid_state_rx[tid] =
HT_AGG_STATE_REQ_STOP_BA_MSK |
(initiator << HT_AGG_STATE_INITIATOR_SHIFT);
spin_unlock_bh(&sta->ampdu_mlme.ampdu_rx);
@ -1434,25 +1454,27 @@ void ieee80211_sta_stop_rx_ba_session(struct net_device *dev, u8 *ra, u16 tid,
/* shutdown timer has not expired */
if (initiator != WLAN_BACK_TIMER)
del_timer_sync(&sta->ampdu_mlme.tid_rx[tid].
session_timer);
del_timer_sync(&sta->ampdu_mlme.tid_rx[tid]->session_timer);
/* check if this is a self generated aggregation halt */
if (initiator == WLAN_BACK_RECIPIENT || initiator == WLAN_BACK_TIMER)
ieee80211_send_delba(dev, ra, tid, 0, reason);
/* free the reordering buffer */
for (i = 0; i < sta->ampdu_mlme.tid_rx[tid].buf_size; i++) {
if (sta->ampdu_mlme.tid_rx[tid].reorder_buf[i]) {
for (i = 0; i < sta->ampdu_mlme.tid_rx[tid]->buf_size; i++) {
if (sta->ampdu_mlme.tid_rx[tid]->reorder_buf[i]) {
/* release the reordered frames */
dev_kfree_skb(sta->ampdu_mlme.tid_rx[tid].reorder_buf[i]);
sta->ampdu_mlme.tid_rx[tid].stored_mpdu_num--;
sta->ampdu_mlme.tid_rx[tid].reorder_buf[i] = NULL;
dev_kfree_skb(sta->ampdu_mlme.tid_rx[tid]->reorder_buf[i]);
sta->ampdu_mlme.tid_rx[tid]->stored_mpdu_num--;
sta->ampdu_mlme.tid_rx[tid]->reorder_buf[i] = NULL;
}
}
kfree(sta->ampdu_mlme.tid_rx[tid].reorder_buf);
/* free resources */
kfree(sta->ampdu_mlme.tid_rx[tid]->reorder_buf);
kfree(sta->ampdu_mlme.tid_rx[tid]);
sta->ampdu_mlme.tid_rx[tid] = NULL;
sta->ampdu_mlme.tid_state_rx[tid] = HT_AGG_STATE_IDLE;
sta->ampdu_mlme.tid_rx[tid].state = HT_AGG_STATE_IDLE;
rcu_read_unlock();
}
@ -1491,7 +1513,7 @@ static void ieee80211_sta_process_delba(struct net_device *dev,
WLAN_BACK_INITIATOR, 0);
else { /* WLAN_BACK_RECIPIENT */
spin_lock_bh(&sta->ampdu_mlme.ampdu_tx);
sta->ampdu_mlme.tid_tx[tid].state =
sta->ampdu_mlme.tid_state_tx[tid] =
HT_AGG_STATE_OPERATIONAL;
spin_unlock_bh(&sta->ampdu_mlme.ampdu_tx);
ieee80211_stop_tx_ba_session(&local->hw, sta->addr, tid,
@ -1528,7 +1550,7 @@ void sta_addba_resp_timer_expired(unsigned long data)
return;
}
state = &sta->ampdu_mlme.tid_tx[tid].state;
state = &sta->ampdu_mlme.tid_state_tx[tid];
/* check if the TID waits for addBA response */
spin_lock_bh(&sta->ampdu_mlme.ampdu_tx);
if (!(*state & HT_ADDBA_REQUESTED_MSK)) {

View File

@ -1514,9 +1514,10 @@ ieee80211_rx_h_ctrl(struct ieee80211_rx_data *rx)
if (!rx->sta)
return RX_CONTINUE;
tid = le16_to_cpu(bar->control) >> 12;
tid_agg_rx = &(rx->sta->ampdu_mlme.tid_rx[tid]);
if (tid_agg_rx->state != HT_AGG_STATE_OPERATIONAL)
if (rx->sta->ampdu_mlme.tid_state_rx[tid]
!= HT_AGG_STATE_OPERATIONAL)
return RX_CONTINUE;
tid_agg_rx = rx->sta->ampdu_mlme.tid_rx[tid];
start_seq_num = le16_to_cpu(bar->start_seq_num) >> 4;
@ -2123,11 +2124,12 @@ static u8 ieee80211_rx_reorder_ampdu(struct ieee80211_local *local,
qc = skb->data + ieee80211_get_hdrlen(fc) - QOS_CONTROL_LEN;
tid = qc[0] & QOS_CONTROL_TID_MASK;
tid_agg_rx = &(sta->ampdu_mlme.tid_rx[tid]);
if (tid_agg_rx->state != HT_AGG_STATE_OPERATIONAL)
if (sta->ampdu_mlme.tid_state_rx[tid] != HT_AGG_STATE_OPERATIONAL)
goto end_reorder;
tid_agg_rx = sta->ampdu_mlme.tid_rx[tid];
/* null data frames are excluded */
if (unlikely(fc & IEEE80211_STYPE_NULLFUNC))
goto end_reorder;

View File

@ -170,9 +170,16 @@ void sta_info_destroy(struct sta_info *sta)
dev_kfree_skb_any(skb);
for (i = 0; i < STA_TID_NUM; i++) {
del_timer_sync(&sta->ampdu_mlme.tid_rx[i].session_timer);
del_timer_sync(&sta->ampdu_mlme.tid_tx[i].addba_resp_timer);
spin_lock_bh(&sta->ampdu_mlme.ampdu_rx);
if (sta->ampdu_mlme.tid_rx[i])
del_timer_sync(&sta->ampdu_mlme.tid_rx[i]->session_timer);
spin_unlock_bh(&sta->ampdu_mlme.ampdu_rx);
spin_lock_bh(&sta->ampdu_mlme.ampdu_tx);
if (sta->ampdu_mlme.tid_tx[i])
del_timer_sync(&sta->ampdu_mlme.tid_tx[i]->addba_resp_timer);
spin_unlock_bh(&sta->ampdu_mlme.ampdu_tx);
}
rate_control_free_sta(sta->rate_ctrl, sta->rate_ctrl_priv);
rate_control_put(sta->rate_ctrl);
@ -227,18 +234,13 @@ struct sta_info *sta_info_alloc(struct ieee80211_sub_if_data *sdata,
sta->timer_to_tid[i] = i;
/* tid to tx queue: initialize according to HW (0 is valid) */
sta->tid_to_tx_q[i] = local->hw.queues;
/* rx timers */
sta->ampdu_mlme.tid_rx[i].session_timer.function =
sta_rx_agg_session_timer_expired;
sta->ampdu_mlme.tid_rx[i].session_timer.data =
(unsigned long)&sta->timer_to_tid[i];
init_timer(&sta->ampdu_mlme.tid_rx[i].session_timer);
/* tx timers */
sta->ampdu_mlme.tid_tx[i].addba_resp_timer.function =
sta_addba_resp_timer_expired;
sta->ampdu_mlme.tid_tx[i].addba_resp_timer.data =
(unsigned long)&sta->timer_to_tid[i];
init_timer(&sta->ampdu_mlme.tid_tx[i].addba_resp_timer);
/* rx */
sta->ampdu_mlme.tid_state_rx[i] = HT_AGG_STATE_IDLE;
sta->ampdu_mlme.tid_rx[i] = NULL;
/* tx */
sta->ampdu_mlme.tid_state_tx[i] = HT_AGG_STATE_IDLE;
sta->ampdu_mlme.tid_tx[i] = NULL;
sta->ampdu_mlme.addba_req_num[i] = 0;
}
skb_queue_head_init(&sta->ps_tx_buf);
skb_queue_head_init(&sta->tx_filtered);

View File

@ -63,47 +63,42 @@ enum ieee80211_sta_info_flags {
#define HT_AGG_STATE_OPERATIONAL (HT_ADDBA_REQUESTED_MSK | \
HT_ADDBA_DRV_READY_MSK | \
HT_ADDBA_RECEIVED_MSK)
#define HT_AGG_STATE_DEBUGFS_CTL BIT(7)
/**
* struct tid_ampdu_tx - TID aggregation information (Tx).
*
* @state: TID's state in session state machine.
* @dialog_token: dialog token for aggregation session
* @ssn: Starting Sequence Number expected to be aggregated.
* @addba_resp_timer: timer for peer's response to addba request
* @addba_req_num: number of times addBA request has been sent.
* @ssn: Starting Sequence Number expected to be aggregated.
* @dialog_token: dialog token for aggregation session
*/
struct tid_ampdu_tx {
u8 state;
u8 dialog_token;
u16 ssn;
struct timer_list addba_resp_timer;
u8 addba_req_num;
u16 ssn;
u8 dialog_token;
};
/**
* struct tid_ampdu_rx - TID aggregation information (Rx).
*
* @state: TID's state in session state machine.
* @dialog_token: dialog token for aggregation session
* @reorder_buf: buffer to reorder incoming aggregated MPDUs
* @session_timer: check if peer keeps Tx-ing on the TID (by timeout value)
* @head_seq_num: head sequence number in reordering buffer.
* @stored_mpdu_num: number of MPDUs in reordering buffer
* @ssn: Starting Sequence Number expected to be aggregated.
* @buf_size: buffer size for incoming A-MPDUs
* @timeout: reset timer value.
* @head_seq_num: head sequence number in reordering buffer.
* @stored_mpdu_num: number of MPDUs in reordering buffer
* @reorder_buf: buffer to reorder incoming aggregated MPDUs
* @session_timer: check if peer keeps Tx-ing on the TID (by timeout value)
* @dialog_token: dialog token for aggregation session
*/
struct tid_ampdu_rx {
u8 state;
u8 dialog_token;
struct sk_buff **reorder_buf;
struct timer_list session_timer;
u16 head_seq_num;
u16 stored_mpdu_num;
u16 ssn;
u16 buf_size;
u16 timeout;
u16 head_seq_num;
u16 stored_mpdu_num;
struct sk_buff **reorder_buf;
struct timer_list session_timer;
u8 dialog_token;
};
/**
@ -132,16 +127,24 @@ enum plink_state {
/**
* struct sta_ampdu_mlme - STA aggregation information.
*
* @tid_state_rx: TID's state in Rx session state machine.
* @tid_rx: aggregation info for Rx per TID
* @tid_tx: aggregation info for Tx per TID
* @ampdu_rx: for locking sections in aggregation Rx flow
* @tid_state_tx: TID's state in Tx session state machine.
* @tid_tx: aggregation info for Tx per TID
* @addba_req_num: number of times addBA request has been sent.
* @ampdu_tx: for locking sectionsi in aggregation Tx flow
* @dialog_token_allocator: dialog token enumerator for each new session;
*/
struct sta_ampdu_mlme {
struct tid_ampdu_rx tid_rx[STA_TID_NUM];
struct tid_ampdu_tx tid_tx[STA_TID_NUM];
/* rx */
u8 tid_state_rx[STA_TID_NUM];
struct tid_ampdu_rx *tid_rx[STA_TID_NUM];
spinlock_t ampdu_rx;
/* tx */
u8 tid_state_tx[STA_TID_NUM];
struct tid_ampdu_tx *tid_tx[STA_TID_NUM];
u8 addba_req_num[STA_TID_NUM];
spinlock_t ampdu_tx;
u8 dialog_token_allocator;
};

View File

@ -33,8 +33,8 @@ int ieee80211_frequency_to_channel(int freq)
}
EXPORT_SYMBOL(ieee80211_frequency_to_channel);
struct ieee80211_channel *ieee80211_get_channel(struct wiphy *wiphy,
int freq)
struct ieee80211_channel *__ieee80211_get_channel(struct wiphy *wiphy,
int freq)
{
enum ieee80211_band band;
struct ieee80211_supported_band *sband;
@ -54,7 +54,7 @@ struct ieee80211_channel *ieee80211_get_channel(struct wiphy *wiphy,
return NULL;
}
EXPORT_SYMBOL(ieee80211_get_channel);
EXPORT_SYMBOL(__ieee80211_get_channel);
static void set_mandatory_flags_band(struct ieee80211_supported_band *sband,
enum ieee80211_band band)