From 1601ce07a0c37e08319d002893a9d54d122cd0f6 Mon Sep 17 00:00:00 2001 From: Soren Brinkmann Date: Fri, 9 Jan 2015 07:43:49 -0800 Subject: [PATCH 1/4] ARM: zynq: Enable pinctrl MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Select pinctrl and the Zynq pinctrl driver. Signed-off-by: Soren Brinkmann Tested-by: Andreas Färber Acked-by: Linus Walleij Signed-off-by: Michal Simek --- arch/arm/mach-zynq/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig index aaa5162c1509..78e5e007f52d 100644 --- a/arch/arm/mach-zynq/Kconfig +++ b/arch/arm/mach-zynq/Kconfig @@ -9,6 +9,8 @@ config ARCH_ZYNQ select HAVE_ARM_TWD if SMP select ICST select MFD_SYSCON + select PINCTRL + select PINCTRL_ZYNQ select SOC_BUS help Support for Xilinx Zynq ARM Cortex A9 Platform From 6a4d8f36dd5182ff0ad946d4a885d6ab54c7a055 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 15 Jan 2015 08:42:42 +0100 Subject: [PATCH 2/4] ARM: zynq: Setup default gpio number for Xilinx Zynq Signed-off-by: Michal Simek --- arch/arm/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 97d07ed60a0b..da77f786f99f 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1488,7 +1488,7 @@ config ARM_PSCI # selected platforms. config ARCH_NR_GPIO int - default 1024 if ARCH_SHMOBILE || ARCH_TEGRA + default 1024 if ARCH_SHMOBILE || ARCH_TEGRA || ARCH_ZYNQ default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5 || \ SOC_DRA7XX || ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210 default 416 if ARCH_SUNXI From bb9cac24d7c0face942dd4661c1eb6fe2df6b90f Mon Sep 17 00:00:00 2001 From: Moritz Fischer Date: Fri, 9 Jan 2015 16:44:00 +0100 Subject: [PATCH 3/4] ARM: zynq: PM: Fixed simple typo. Signed-off-by: Moritz Fischer Signed-off-by: Michal Simek --- arch/arm/mach-zynq/pm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-zynq/pm.c b/arch/arm/mach-zynq/pm.c index 911fcf865be8..fa44fc1b6dd5 100644 --- a/arch/arm/mach-zynq/pm.c +++ b/arch/arm/mach-zynq/pm.c @@ -61,7 +61,7 @@ static void __iomem *zynq_pm_ioremap(const char *comp) /** * zynq_pm_late_init() - Power management init * - * Initialization of power management related featurs and infrastructure. + * Initialization of power management related features and infrastructure. */ void __init zynq_pm_late_init(void) { From 3329659df0300d1d0aa22f5e7063f83a88ef92aa Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 11 Dec 2014 11:31:30 +0100 Subject: [PATCH 4/4] ARM: zynq: Simplify SLCR initialization Based on "mfd: syscon: Decouple syscon interface from platform devices" (sha1: bdb0066df96e74a4002125467ebe459feff1ebef) SLCR driver can use syscon/regmap drivers directly. Signed-off-by: Michal Simek --- arch/arm/mach-zynq/common.c | 2 -- arch/arm/mach-zynq/slcr.c | 35 +++++++---------------------------- 2 files changed, 7 insertions(+), 30 deletions(-) diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c index 26f92c28d22b..c887196cfdbe 100644 --- a/arch/arm/mach-zynq/common.c +++ b/arch/arm/mach-zynq/common.c @@ -146,8 +146,6 @@ out: platform_device_register(&zynq_cpuidle_device); platform_device_register_full(&devinfo); - - zynq_slcr_init(); } static void __init zynq_timer_init(void) diff --git a/arch/arm/mach-zynq/slcr.c b/arch/arm/mach-zynq/slcr.c index d4cb50cf97c0..c3c24fd8b306 100644 --- a/arch/arm/mach-zynq/slcr.c +++ b/arch/arm/mach-zynq/slcr.c @@ -47,11 +47,6 @@ static struct regmap *zynq_slcr_regmap; */ static int zynq_slcr_write(u32 val, u32 offset) { - if (!zynq_slcr_regmap) { - writel(val, zynq_slcr_base + offset); - return 0; - } - return regmap_write(zynq_slcr_regmap, offset, val); } @@ -65,12 +60,7 @@ static int zynq_slcr_write(u32 val, u32 offset) */ static int zynq_slcr_read(u32 *val, u32 offset) { - if (zynq_slcr_regmap) - return regmap_read(zynq_slcr_regmap, offset, val); - - *val = readl(zynq_slcr_base + offset); - - return 0; + return regmap_read(zynq_slcr_regmap, offset, val); } /** @@ -195,23 +185,6 @@ void zynq_slcr_cpu_state_write(int cpu, bool die) writel(state, zynq_slcr_base + SLCR_REBOOT_STATUS_OFFSET); } -/** - * zynq_slcr_init - Regular slcr driver init - * Return: 0 on success, negative errno otherwise. - * - * Called early during boot from platform code to remap SLCR area. - */ -int __init zynq_slcr_init(void) -{ - zynq_slcr_regmap = syscon_regmap_lookup_by_compatible("xlnx,zynq-slcr"); - if (IS_ERR(zynq_slcr_regmap)) { - pr_err("%s: failed to find zynq-slcr\n", __func__); - return -ENODEV; - } - - return 0; -} - /** * zynq_early_slcr_init - Early slcr init function * @@ -237,6 +210,12 @@ int __init zynq_early_slcr_init(void) np->data = (__force void *)zynq_slcr_base; + zynq_slcr_regmap = syscon_regmap_lookup_by_compatible("xlnx,zynq-slcr"); + if (IS_ERR(zynq_slcr_regmap)) { + pr_err("%s: failed to find zynq-slcr\n", __func__); + return -ENODEV; + } + /* unlock the SLCR so that registers can be changed */ zynq_slcr_unlock();