drm/amdgpu: fix power distribution issue for Polaris10 XT
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -156,3 +156,18 @@ u32 amdgpu_atombios_i2c_func(struct i2c_adapter *adap)
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return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
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}
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void amdgpu_atombios_i2c_channel_trans(struct amdgpu_device* adev, u8 slave_addr, u8 line_number, u8 offset, u8 data)
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{
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PROCESS_I2C_CHANNEL_TRANSACTION_PS_ALLOCATION args;
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int index = GetIndexIntoMasterTable(COMMAND, ProcessI2cChannelTransaction);
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args.ucRegIndex = offset;
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args.lpI2CDataOut = data;
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args.ucFlag = 1;
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args.ucI2CSpeed = TARGET_HW_I2C_CLOCK;
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args.ucTransBytes = 1;
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args.ucSlaveAddr = slave_addr;
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args.ucLineNumber = line_number;
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amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args);
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}
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@ -27,5 +27,7 @@
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int amdgpu_atombios_i2c_xfer(struct i2c_adapter *i2c_adap,
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struct i2c_msg *msgs, int num);
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u32 amdgpu_atombios_i2c_func(struct i2c_adapter *adap);
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void amdgpu_atombios_i2c_channel_trans(struct amdgpu_device* adev,
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u8 slave_addr, u8 line_number, u8 offset, u8 data);
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#endif
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@ -28,6 +28,7 @@
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#include "vid.h"
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#include "amdgpu_ucode.h"
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#include "amdgpu_atombios.h"
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#include "atombios_i2c.h"
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#include "clearstate_vi.h"
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#include "gmc/gmc_8_2_d.h"
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@ -698,6 +699,10 @@ static void gfx_v8_0_init_golden_registers(struct amdgpu_device *adev)
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polaris10_golden_common_all,
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(const u32)ARRAY_SIZE(polaris10_golden_common_all));
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WREG32_SMC(ixCG_ACLK_CNTL, 0x0000001C);
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if (adev->pdev->revision == 0xc7) {
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amdgpu_atombios_i2c_channel_trans(adev, 0x10, 0x96, 0x1E, 0xDD);
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amdgpu_atombios_i2c_channel_trans(adev, 0x10, 0x96, 0x1F, 0xD0);
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}
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break;
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case CHIP_CARRIZO:
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amdgpu_program_register_sequence(adev,
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