KVM: PPC: Book3S HV: Don't set DABR on POWER8

POWER8 doesn't have the DABR and DABRX registers; instead it has
new DAWR/DAWRX registers, which will be handled in a later patch.

Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
Michael Neuling 2014-01-08 21:25:19 +11:00 committed by Alexander Graf
parent 6c85f52b10
commit eee7ff9d2c
2 changed files with 12 additions and 3 deletions

View File

@ -57,9 +57,11 @@ BEGIN_FTR_SECTION
std r3, HSTATE_DSCR(r13)
END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
BEGIN_FTR_SECTION
/* Save host DABR */
mfspr r3, SPRN_DABR
std r3, HSTATE_DABR(r13)
END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
/* Hard-disable interrupts */
mfmsr r10

View File

@ -61,11 +61,13 @@ kvmppc_call_hv_entry:
/* Back from guest - restore host state and return to caller */
BEGIN_FTR_SECTION
/* Restore host DABR and DABRX */
ld r5,HSTATE_DABR(r13)
li r6,7
mtspr SPRN_DABR,r5
mtspr SPRN_DABRX,r6
END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
/* Restore SPRG3 */
ld r3,PACA_SPRG3(r13)
@ -284,15 +286,17 @@ kvmppc_hv_entry:
std r0, PPC_LR_STKOFF(r1)
stdu r1, -112(r1)
BEGIN_FTR_SECTION
/* Set partition DABR */
/* Do this before re-enabling PMU to avoid P7 DABR corruption bug */
li r5,3
ld r6,VCPU_DABR(r4)
mtspr SPRN_DABRX,r5
mtspr SPRN_DABR,r6
BEGIN_FTR_SECTION
BEGIN_FTR_SECTION_NESTED(89)
isync
END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
END_FTR_SECTION_NESTED(CPU_FTR_ARCH_206, CPU_FTR_ARCH_206, 89)
END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
/* Load guest PMU registers */
/* R4 is live here (vcpu pointer) */
@ -1609,6 +1613,9 @@ ignore_hdec:
b fast_guest_return
_GLOBAL(kvmppc_h_set_dabr)
BEGIN_FTR_SECTION
b 2f
END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
std r4,VCPU_DABR(r3)
/* Work around P7 bug where DABR can get corrupted on mtspr */
1: mtspr SPRN_DABR,r4
@ -1616,7 +1623,7 @@ _GLOBAL(kvmppc_h_set_dabr)
cmpd r4, r5
bne 1b
isync
li r3,0
2: li r3,0
blr
_GLOBAL(kvmppc_h_cede)