cxgb4: add data structures to support vxlan
Add data structures and macros to be used in vxlan offload. Original work by: Santosh Rastapur <santosh@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Ganesh Goudar
David S. Miller
parent
c5e62a2427
commit
ef0fd85aed
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@ -107,6 +107,7 @@ enum {
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CPL_FW6_MSG = 0xE0,
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CPL_FW6_PLD = 0xE1,
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CPL_TX_TNL_LSO = 0xEC,
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CPL_TX_PKT_LSO = 0xED,
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CPL_TX_PKT_XT = 0xEE,
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@ -1479,6 +1480,169 @@ struct ulp_txpkt {
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#define ULP_TXPKT_RO_V(x) ((x) << ULP_TXPKT_RO_S)
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#define ULP_TXPKT_RO_F ULP_TXPKT_RO_V(1U)
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enum cpl_tx_tnl_lso_type {
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TX_TNL_TYPE_OPAQUE,
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TX_TNL_TYPE_NVGRE,
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TX_TNL_TYPE_VXLAN,
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TX_TNL_TYPE_GENEVE,
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};
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struct cpl_tx_tnl_lso {
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__be32 op_to_IpIdSplitOut;
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__be16 IpIdOffsetOut;
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__be16 UdpLenSetOut_to_TnlHdrLen;
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__be64 r1;
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__be32 Flow_to_TcpHdrLen;
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__be16 IpIdOffset;
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__be16 IpIdSplit_to_Mss;
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__be32 TCPSeqOffset;
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__be32 EthLenOffset_Size;
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/* encapsulated CPL (TX_PKT_XT) follows here */
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};
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#define CPL_TX_TNL_LSO_OPCODE_S 24
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#define CPL_TX_TNL_LSO_OPCODE_M 0xff
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#define CPL_TX_TNL_LSO_OPCODE_V(x) ((x) << CPL_TX_TNL_LSO_OPCODE_S)
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#define CPL_TX_TNL_LSO_OPCODE_G(x) \
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(((x) >> CPL_TX_TNL_LSO_OPCODE_S) & CPL_TX_TNL_LSO_OPCODE_M)
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#define CPL_TX_TNL_LSO_FIRST_S 23
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#define CPL_TX_TNL_LSO_FIRST_M 0x1
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#define CPL_TX_TNL_LSO_FIRST_V(x) ((x) << CPL_TX_TNL_LSO_FIRST_S)
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#define CPL_TX_TNL_LSO_FIRST_G(x) \
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(((x) >> CPL_TX_TNL_LSO_FIRST_S) & CPL_TX_TNL_LSO_FIRST_M)
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#define CPL_TX_TNL_LSO_FIRST_F CPL_TX_TNL_LSO_FIRST_V(1U)
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#define CPL_TX_TNL_LSO_LAST_S 22
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#define CPL_TX_TNL_LSO_LAST_M 0x1
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#define CPL_TX_TNL_LSO_LAST_V(x) ((x) << CPL_TX_TNL_LSO_LAST_S)
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#define CPL_TX_TNL_LSO_LAST_G(x) \
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(((x) >> CPL_TX_TNL_LSO_LAST_S) & CPL_TX_TNL_LSO_LAST_M)
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#define CPL_TX_TNL_LSO_LAST_F CPL_TX_TNL_LSO_LAST_V(1U)
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#define CPL_TX_TNL_LSO_ETHHDRLENXOUT_S 21
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#define CPL_TX_TNL_LSO_ETHHDRLENXOUT_M 0x1
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#define CPL_TX_TNL_LSO_ETHHDRLENXOUT_V(x) \
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((x) << CPL_TX_TNL_LSO_ETHHDRLENXOUT_S)
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#define CPL_TX_TNL_LSO_ETHHDRLENXOUT_G(x) \
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(((x) >> CPL_TX_TNL_LSO_ETHHDRLENXOUT_S) & \
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CPL_TX_TNL_LSO_ETHHDRLENXOUT_M)
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#define CPL_TX_TNL_LSO_ETHHDRLENXOUT_F CPL_TX_TNL_LSO_ETHHDRLENXOUT_V(1U)
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#define CPL_TX_TNL_LSO_IPV6OUT_S 20
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#define CPL_TX_TNL_LSO_IPV6OUT_M 0x1
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#define CPL_TX_TNL_LSO_IPV6OUT_V(x) ((x) << CPL_TX_TNL_LSO_IPV6OUT_S)
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#define CPL_TX_TNL_LSO_IPV6OUT_G(x) \
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(((x) >> CPL_TX_TNL_LSO_IPV6OUT_S) & CPL_TX_TNL_LSO_IPV6OUT_M)
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#define CPL_TX_TNL_LSO_IPV6OUT_F CPL_TX_TNL_LSO_IPV6OUT_V(1U)
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#define CPL_TX_TNL_LSO_ETHHDRLEN_S 16
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#define CPL_TX_TNL_LSO_ETHHDRLEN_M 0xf
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#define CPL_TX_TNL_LSO_ETHHDRLEN_V(x) ((x) << CPL_TX_TNL_LSO_ETHHDRLEN_S)
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#define CPL_TX_TNL_LSO_ETHHDRLEN_G(x) \
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(((x) >> CPL_TX_TNL_LSO_ETHHDRLEN_S) & CPL_TX_TNL_LSO_ETHHDRLEN_M)
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#define CPL_TX_TNL_LSO_IPHDRLEN_S 4
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#define CPL_TX_TNL_LSO_IPHDRLEN_M 0xfff
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#define CPL_TX_TNL_LSO_IPHDRLEN_V(x) ((x) << CPL_TX_TNL_LSO_IPHDRLEN_S)
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#define CPL_TX_TNL_LSO_IPHDRLEN_G(x) \
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(((x) >> CPL_TX_TNL_LSO_IPHDRLEN_S) & CPL_TX_TNL_LSO_IPHDRLEN_M)
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#define CPL_TX_TNL_LSO_TCPHDRLEN_S 0
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#define CPL_TX_TNL_LSO_TCPHDRLEN_M 0xf
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#define CPL_TX_TNL_LSO_TCPHDRLEN_V(x) ((x) << CPL_TX_TNL_LSO_TCPHDRLEN_S)
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#define CPL_TX_TNL_LSO_TCPHDRLEN_G(x) \
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(((x) >> CPL_TX_TNL_LSO_TCPHDRLEN_S) & CPL_TX_TNL_LSO_TCPHDRLEN_M)
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#define CPL_TX_TNL_LSO_MSS_S 0
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#define CPL_TX_TNL_LSO_MSS_M 0x3fff
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#define CPL_TX_TNL_LSO_MSS_V(x) ((x) << CPL_TX_TNL_LSO_MSS_S)
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#define CPL_TX_TNL_LSO_MSS_G(x) \
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(((x) >> CPL_TX_TNL_LSO_MSS_S) & CPL_TX_TNL_LSO_MSS_M)
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#define CPL_TX_TNL_LSO_SIZE_S 0
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#define CPL_TX_TNL_LSO_SIZE_M 0xfffffff
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#define CPL_TX_TNL_LSO_SIZE_V(x) ((x) << CPL_TX_TNL_LSO_SIZE_S)
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#define CPL_TX_TNL_LSO_SIZE_G(x) \
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(((x) >> CPL_TX_TNL_LSO_SIZE_S) & CPL_TX_TNL_LSO_SIZE_M)
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#define CPL_TX_TNL_LSO_ETHHDRLENOUT_S 16
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#define CPL_TX_TNL_LSO_ETHHDRLENOUT_M 0xf
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#define CPL_TX_TNL_LSO_ETHHDRLENOUT_V(x) \
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((x) << CPL_TX_TNL_LSO_ETHHDRLENOUT_S)
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#define CPL_TX_TNL_LSO_ETHHDRLENOUT_G(x) \
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(((x) >> CPL_TX_TNL_LSO_ETHHDRLENOUT_S) & CPL_TX_TNL_LSO_ETHHDRLENOUT_M)
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#define CPL_TX_TNL_LSO_IPHDRLENOUT_S 4
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#define CPL_TX_TNL_LSO_IPHDRLENOUT_M 0xfff
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#define CPL_TX_TNL_LSO_IPHDRLENOUT_V(x) ((x) << CPL_TX_TNL_LSO_IPHDRLENOUT_S)
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#define CPL_TX_TNL_LSO_IPHDRLENOUT_G(x) \
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(((x) >> CPL_TX_TNL_LSO_IPHDRLENOUT_S) & CPL_TX_TNL_LSO_IPHDRLENOUT_M)
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#define CPL_TX_TNL_LSO_IPHDRCHKOUT_S 3
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#define CPL_TX_TNL_LSO_IPHDRCHKOUT_M 0x1
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#define CPL_TX_TNL_LSO_IPHDRCHKOUT_V(x) ((x) << CPL_TX_TNL_LSO_IPHDRCHKOUT_S)
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#define CPL_TX_TNL_LSO_IPHDRCHKOUT_G(x) \
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(((x) >> CPL_TX_TNL_LSO_IPHDRCHKOUT_S) & CPL_TX_TNL_LSO_IPHDRCHKOUT_M)
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#define CPL_TX_TNL_LSO_IPHDRCHKOUT_F CPL_TX_TNL_LSO_IPHDRCHKOUT_V(1U)
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#define CPL_TX_TNL_LSO_IPLENSETOUT_S 2
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#define CPL_TX_TNL_LSO_IPLENSETOUT_M 0x1
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#define CPL_TX_TNL_LSO_IPLENSETOUT_V(x) ((x) << CPL_TX_TNL_LSO_IPLENSETOUT_S)
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#define CPL_TX_TNL_LSO_IPLENSETOUT_G(x) \
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(((x) >> CPL_TX_TNL_LSO_IPLENSETOUT_S) & CPL_TX_TNL_LSO_IPLENSETOUT_M)
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#define CPL_TX_TNL_LSO_IPLENSETOUT_F CPL_TX_TNL_LSO_IPLENSETOUT_V(1U)
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#define CPL_TX_TNL_LSO_IPIDINCOUT_S 1
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#define CPL_TX_TNL_LSO_IPIDINCOUT_M 0x1
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#define CPL_TX_TNL_LSO_IPIDINCOUT_V(x) ((x) << CPL_TX_TNL_LSO_IPIDINCOUT_S)
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#define CPL_TX_TNL_LSO_IPIDINCOUT_G(x) \
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(((x) >> CPL_TX_TNL_LSO_IPIDINCOUT_S) & CPL_TX_TNL_LSO_IPIDINCOUT_M)
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#define CPL_TX_TNL_LSO_IPIDINCOUT_F CPL_TX_TNL_LSO_IPIDINCOUT_V(1U)
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#define CPL_TX_TNL_LSO_UDPCHKCLROUT_S 14
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#define CPL_TX_TNL_LSO_UDPCHKCLROUT_M 0x1
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#define CPL_TX_TNL_LSO_UDPCHKCLROUT_V(x) \
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((x) << CPL_TX_TNL_LSO_UDPCHKCLROUT_S)
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#define CPL_TX_TNL_LSO_UDPCHKCLROUT_G(x) \
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(((x) >> CPL_TX_TNL_LSO_UDPCHKCLROUT_S) & \
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CPL_TX_TNL_LSO_UDPCHKCLROUT_M)
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#define CPL_TX_TNL_LSO_UDPCHKCLROUT_F CPL_TX_TNL_LSO_UDPCHKCLROUT_V(1U)
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#define CPL_TX_TNL_LSO_UDPLENSETOUT_S 15
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#define CPL_TX_TNL_LSO_UDPLENSETOUT_M 0x1
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#define CPL_TX_TNL_LSO_UDPLENSETOUT_V(x) \
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((x) << CPL_TX_TNL_LSO_UDPLENSETOUT_S)
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#define CPL_TX_TNL_LSO_UDPLENSETOUT_G(x) \
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(((x) >> CPL_TX_TNL_LSO_UDPLENSETOUT_S) & \
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CPL_TX_TNL_LSO_UDPLENSETOUT_M)
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#define CPL_TX_TNL_LSO_UDPLENSETOUT_F CPL_TX_TNL_LSO_UDPLENSETOUT_V(1U)
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#define CPL_TX_TNL_LSO_TNLTYPE_S 12
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#define CPL_TX_TNL_LSO_TNLTYPE_M 0x3
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#define CPL_TX_TNL_LSO_TNLTYPE_V(x) ((x) << CPL_TX_TNL_LSO_TNLTYPE_S)
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#define CPL_TX_TNL_LSO_TNLTYPE_G(x) \
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(((x) >> CPL_TX_TNL_LSO_TNLTYPE_S) & CPL_TX_TNL_LSO_TNLTYPE_M)
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#define S_CPL_TX_TNL_LSO_ETHHDRLEN 16
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#define M_CPL_TX_TNL_LSO_ETHHDRLEN 0xf
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#define V_CPL_TX_TNL_LSO_ETHHDRLEN(x) ((x) << S_CPL_TX_TNL_LSO_ETHHDRLEN)
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#define G_CPL_TX_TNL_LSO_ETHHDRLEN(x) \
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(((x) >> S_CPL_TX_TNL_LSO_ETHHDRLEN) & M_CPL_TX_TNL_LSO_ETHHDRLEN)
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#define CPL_TX_TNL_LSO_TNLHDRLEN_S 0
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#define CPL_TX_TNL_LSO_TNLHDRLEN_M 0xfff
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#define CPL_TX_TNL_LSO_TNLHDRLEN_V(x) ((x) << CPL_TX_TNL_LSO_TNLHDRLEN_S)
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#define CPL_TX_TNL_LSO_TNLHDRLEN_G(x) \
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(((x) >> CPL_TX_TNL_LSO_TNLHDRLEN_S) & CPL_TX_TNL_LSO_TNLHDRLEN_M)
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#define CPL_TX_TNL_LSO_IPV6_S 20
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#define CPL_TX_TNL_LSO_IPV6_M 0x1
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#define CPL_TX_TNL_LSO_IPV6_V(x) ((x) << CPL_TX_TNL_LSO_IPV6_S)
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#define CPL_TX_TNL_LSO_IPV6_G(x) \
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(((x) >> CPL_TX_TNL_LSO_IPV6_S) & CPL_TX_TNL_LSO_IPV6_M)
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#define CPL_TX_TNL_LSO_IPV6_F CPL_TX_TNL_LSO_IPV6_V(1U)
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#define ULP_TX_SC_MORE_S 23
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#define ULP_TX_SC_MORE_V(x) ((x) << ULP_TX_SC_MORE_S)
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#define ULP_TX_SC_MORE_F ULP_TX_SC_MORE_V(1U)
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@ -2511,6 +2511,17 @@
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#define MPS_RX_MAC_BG_PG_CNT0_A 0x11208
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#define MPS_RX_LPBK_BG_PG_CNT0_A 0x11218
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#define MPS_RX_VXLAN_TYPE_A 0x11234
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#define VXLAN_EN_S 16
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#define VXLAN_EN_V(x) ((x) << VXLAN_EN_S)
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#define VXLAN_EN_F VXLAN_EN_V(1U)
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#define VXLAN_S 0
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#define VXLAN_M 0xffffU
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#define VXLAN_V(x) ((x) << VXLAN_S)
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#define VXLAN_G(x) (((x) >> VXLAN_S) & VXLAN_M)
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#define MPS_CLS_TCAM_Y_L_A 0xf000
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#define MPS_CLS_TCAM_DATA0_A 0xf000
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#define MPS_CLS_TCAM_DATA1_A 0xf004
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@ -2537,8 +2548,14 @@
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#define DATAPORTNUM_S 12
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#define DATAPORTNUM_M 0xfU
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#define DATAPORTNUM_V(x) ((x) << DATAPORTNUM_S)
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#define DATAPORTNUM_G(x) (((x) >> DATAPORTNUM_S) & DATAPORTNUM_M)
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#define DATALKPTYPE_S 10
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#define DATALKPTYPE_M 0x3U
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#define DATALKPTYPE_V(x) ((x) << DATALKPTYPE_S)
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#define DATALKPTYPE_G(x) (((x) >> DATALKPTYPE_S) & DATALKPTYPE_M)
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#define DATADIPHIT_S 8
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#define DATADIPHIT_V(x) ((x) << DATADIPHIT_S)
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#define DATADIPHIT_F DATADIPHIT_V(1U)
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@ -2060,6 +2060,7 @@ struct fw_vi_cmd {
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#define FW_VI_MAC_ADD_MAC 0x3FF
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#define FW_VI_MAC_ADD_PERSIST_MAC 0x3FE
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#define FW_VI_MAC_MAC_BASED_FREE 0x3FD
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#define FW_VI_MAC_ID_BASED_FREE 0x3FC
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#define FW_CLS_TCAM_NUM_ENTRIES 336
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enum fw_vi_mac_smac {
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@ -2076,6 +2077,13 @@ enum fw_vi_mac_result {
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FW_VI_MAC_R_F_ACL_CHECK
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};
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enum fw_vi_mac_entry_types {
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FW_VI_MAC_TYPE_EXACTMAC,
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FW_VI_MAC_TYPE_HASHVEC,
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FW_VI_MAC_TYPE_RAW,
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FW_VI_MAC_TYPE_EXACTMAC_VNI,
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};
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struct fw_vi_mac_cmd {
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__be32 op_to_viid;
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__be32 freemacs_to_len16;
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@ -2087,6 +2095,13 @@ struct fw_vi_mac_cmd {
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struct fw_vi_mac_hash {
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__be64 hashvec;
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} hash;
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struct fw_vi_mac_raw {
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__be32 raw_idx_pkd;
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__be32 data0_pkd;
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__be32 data1[2];
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__be64 data0m_pkd;
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__be32 data1m[2];
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} raw;
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} u;
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};
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@ -2096,6 +2111,12 @@ struct fw_vi_mac_cmd {
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#define FW_VI_MAC_CMD_FREEMACS_S 31
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#define FW_VI_MAC_CMD_FREEMACS_V(x) ((x) << FW_VI_MAC_CMD_FREEMACS_S)
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#define FW_VI_MAC_CMD_ENTRY_TYPE_S 23
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#define FW_VI_MAC_CMD_ENTRY_TYPE_M 0x7
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#define FW_VI_MAC_CMD_ENTRY_TYPE_V(x) ((x) << FW_VI_MAC_CMD_ENTRY_TYPE_S)
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#define FW_VI_MAC_CMD_ENTRY_TYPE_G(x) \
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(((x) >> FW_VI_MAC_CMD_ENTRY_TYPE_S) & FW_VI_MAC_CMD_ENTRY_TYPE_M)
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#define FW_VI_MAC_CMD_HASHVECEN_S 23
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#define FW_VI_MAC_CMD_HASHVECEN_V(x) ((x) << FW_VI_MAC_CMD_HASHVECEN_S)
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#define FW_VI_MAC_CMD_HASHVECEN_F FW_VI_MAC_CMD_HASHVECEN_V(1U)
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@ -2122,6 +2143,12 @@ struct fw_vi_mac_cmd {
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#define FW_VI_MAC_CMD_IDX_G(x) \
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(((x) >> FW_VI_MAC_CMD_IDX_S) & FW_VI_MAC_CMD_IDX_M)
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#define FW_VI_MAC_CMD_RAW_IDX_S 16
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#define FW_VI_MAC_CMD_RAW_IDX_M 0xffff
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#define FW_VI_MAC_CMD_RAW_IDX_V(x) ((x) << FW_VI_MAC_CMD_RAW_IDX_S)
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#define FW_VI_MAC_CMD_RAW_IDX_G(x) \
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(((x) >> FW_VI_MAC_CMD_RAW_IDX_S) & FW_VI_MAC_CMD_RAW_IDX_M)
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#define FW_RXMODE_MTU_NO_CHG 65535
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struct fw_vi_rxmode_cmd {
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