From 35aca36450e6c3fb3b3fe9ea60a7c4689a219a87 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Tue, 21 May 2013 01:06:04 +0900 Subject: [PATCH 01/41] ARM: dts: add devicetree support for s3c2416-smdk2416 Definitions in s3c24xx.dtsi are usable for all s3c24xx SoCs, but some need to be extended with proper compatible properties, as can be seen in s3c2416.dtsi. Signed-off-by: Heiko Stuebner Reviewed-by: Sylwester Nawrocki Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/s3c2416-pinctrl.dtsi | 173 ++++++++++++++++++++++++ arch/arm/boot/dts/s3c2416-smdk2416.dts | 72 ++++++++++ arch/arm/boot/dts/s3c2416.dtsi | 79 +++++++++++ arch/arm/boot/dts/s3c24xx.dtsi | 92 +++++++++++++ arch/arm/mach-s3c24xx/Kconfig | 12 ++ arch/arm/mach-s3c24xx/Makefile | 1 + arch/arm/mach-s3c24xx/mach-s3c2416-dt.c | 91 +++++++++++++ 8 files changed, 521 insertions(+) create mode 100644 arch/arm/boot/dts/s3c2416-pinctrl.dtsi create mode 100644 arch/arm/boot/dts/s3c2416-smdk2416.dts create mode 100644 arch/arm/boot/dts/s3c2416.dtsi create mode 100644 arch/arm/boot/dts/s3c24xx.dtsi create mode 100644 arch/arm/mach-s3c24xx/mach-s3c2416-dt.c diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index b9f7121e6ecf..d5df15dc7009 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -159,6 +159,7 @@ dtb-$(CONFIG_ARCH_U8500) += snowball.dtb \ hrefprev60.dtb \ hrefv60plus.dtb \ ccu9540.dtb +dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \ r8a7740-armadillo800eva.dtb \ r8a7778-bockw.dtb \ diff --git a/arch/arm/boot/dts/s3c2416-pinctrl.dtsi b/arch/arm/boot/dts/s3c2416-pinctrl.dtsi new file mode 100644 index 000000000000..527e3193817f --- /dev/null +++ b/arch/arm/boot/dts/s3c2416-pinctrl.dtsi @@ -0,0 +1,173 @@ +/* + * Samsung S3C2416 pinctrl settings + * + * Copyright (c) 2013 Heiko Stuebner + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +&pinctrl_0 { + /* + * Pin banks + */ + + gpa: gpa { + gpio-controller; + #gpio-cells = <2>; + }; + + gpb: gpb { + gpio-controller; + #gpio-cells = <2>; + }; + + gpc: gpc { + gpio-controller; + #gpio-cells = <2>; + }; + + gpd: gpd { + gpio-controller; + #gpio-cells = <2>; + }; + + gpe: gpe { + gpio-controller; + #gpio-cells = <2>; + }; + + gpf: gpf { + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg: gpg { + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gph: gph { + gpio-controller; + #gpio-cells = <2>; + }; + + gpj: gpj { + gpio-controller; + #gpio-cells = <2>; + }; + + gpk: gpk { + gpio-controller; + #gpio-cells = <2>; + }; + + gpl: gpl { + gpio-controller; + #gpio-cells = <2>; + }; + + gpm: gpm { + gpio-controller; + #gpio-cells = <2>; + }; + + /* + * Pin groups + */ + + uart0_data: uart0-data { + samsung,pins = "gph-0", "gph-1"; + samsung,pin-function = <2>; + }; + + uart0_fctl: uart0-fctl { + samsung,pins = "gph-8", "gph-9"; + samsung,pin-function = <2>; + }; + + uart1_data: uart1-data { + samsung,pins = "gph-2", "gph-3"; + samsung,pin-function = <2>; + }; + + uart1_fctl: uart1-fctl { + samsung,pins = "gph-10", "gph-11"; + samsung,pin-function = <2>; + }; + + uart2_data: uart2-data { + samsung,pins = "gph-4", "gph-5"; + samsung,pin-function = <2>; + }; + + uart2_fctl: uart2-fctl { + samsung,pins = "gph-6", "gph-7"; + samsung,pin-function = <2>; + }; + + uart3_data: uart3-data { + samsung,pins = "gph-6", "gph-7"; + samsung,pin-function = <2>; + }; + + extuart_clk: extuart-clk { + samsung,pins = "gph-12"; + samsung,pin-function = <2>; + }; + + i2c0_bus: i2c0-bus { + samsung,pins = "gpe-14", "gpe-15"; + samsung,pin-function = <2>; + }; + + spi0_bus: spi0-bus { + samsung,pins = "gpe-11", "gpe-12", "gpe-13"; + samsung,pin-function = <2>; + }; + + sd0_clk: sd0-clk { + samsung,pins = "gpe-5"; + samsung,pin-function = <2>; + }; + + sd0_cmd: sd0-cmd { + samsung,pins = "gpe-6"; + samsung,pin-function = <2>; + }; + + sd0_bus1: sd0-bus1 { + samsung,pins = "gpe-7"; + samsung,pin-function = <2>; + }; + + sd0_bus4: sd0-bus4 { + samsung,pins = "gpe-8", "gpe-9", "gpe-10"; + samsung,pin-function = <2>; + }; + + sd1_cmd: sd1-cmd { + samsung,pins = "gpl-8"; + samsung,pin-function = <2>; + }; + + sd1_clk: sd1-clk { + samsung,pins = "gpl-9"; + samsung,pin-function = <2>; + }; + + sd1_bus1: sd1-bus1 { + samsung,pins = "gpl-0"; + samsung,pin-function = <2>; + }; + + sd1_bus4: sd1-bus4 { + samsung,pins = "gpl-1", "gpl-2", "gpl-3"; + samsung,pin-function = <2>; + }; +}; diff --git a/arch/arm/boot/dts/s3c2416-smdk2416.dts b/arch/arm/boot/dts/s3c2416-smdk2416.dts new file mode 100644 index 000000000000..ad1dd09c10eb --- /dev/null +++ b/arch/arm/boot/dts/s3c2416-smdk2416.dts @@ -0,0 +1,72 @@ +/* + * SAMSUNG SMDK2416 board device tree source + * + * Copyright (c) 2013 Heiko Stuebner + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/dts-v1/; +/include/ "s3c2416.dtsi" + +/ { + model = "SMDK2416"; + compatible = "samsung,s3c2416"; + + memory { + reg = <0x30000000 0x4000000>; + }; + + serial@50000000 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart0_data>, <&uart0_fctl>; + }; + + serial@50004000 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart1_data>, <&uart1_fctl>; + }; + + serial@50008000 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart2_data>; + }; + + serial@5000C000 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart3_data>; + }; + + watchdog@53000000 { + status = "okay"; + }; + + rtc@57000000 { + status = "okay"; + }; + + sdhci@4AC00000 { + pinctrl-names = "default"; + pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, + <&sd0_bus1>, <&sd0_bus4>; + bus-width = <4>; + cd-gpios = <&gpf 1 0>; + cd-inverted; + status = "okay"; + }; + + sdhci@4A800000 { + pinctrl-names = "default"; + pinctrl-0 = <&sd1_clk>, <&sd1_cmd>, + <&sd1_bus1>, <&sd1_bus4>; + bus-width = <4>; + broken-cd; + status = "okay"; + }; +}; diff --git a/arch/arm/boot/dts/s3c2416.dtsi b/arch/arm/boot/dts/s3c2416.dtsi new file mode 100644 index 000000000000..6809324934a3 --- /dev/null +++ b/arch/arm/boot/dts/s3c2416.dtsi @@ -0,0 +1,79 @@ +/* + * Samsung's S3C2416 SoC device tree source + * + * Copyright (c) 2013 Heiko Stuebner + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/include/ "s3c24xx.dtsi" +/include/ "s3c2416-pinctrl.dtsi" + +/ { + model = "Samsung S3C2416 SoC"; + compatible = "samsung,s3c2416"; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu { + compatible = "arm,arm926ejs"; + }; + }; + + interrupt-controller@4a000000 { + compatible = "samsung,s3c2416-irq"; + }; + + pinctrl@56000000 { + compatible = "samsung,s3c2416-pinctrl"; + }; + + serial@50000000 { + compatible = "samsung,s3c2440-uart"; + }; + + serial@50004000 { + compatible = "samsung,s3c2440-uart"; + }; + + serial@50008000 { + compatible = "samsung,s3c2440-uart"; + }; + + serial@5000C000 { + compatible = "samsung,s3c2440-uart"; + reg = <0x5000C000 0x4000>; + interrupts = <1 18 24 4>, <1 18 25 4>; + status = "disabled"; + }; + + sdhci@4AC00000 { + compatible = "samsung,s3c6410-sdhci"; + reg = <0x4AC00000 0x100>; + interrupts = <0 0 21 3>; + status = "disabled"; + }; + + sdhci@4A800000 { + compatible = "samsung,s3c6410-sdhci"; + reg = <0x4A800000 0x100>; + interrupts = <0 0 20 3>; + status = "disabled"; + }; + + watchdog@53000000 { + interrupts = <1 9 27 3>; + }; + + rtc@57000000 { + compatible = "samsung,s3c2416-rtc"; + }; + + i2c@54000000 { + compatible = "samsung,s3c2440-i2c"; + }; +}; diff --git a/arch/arm/boot/dts/s3c24xx.dtsi b/arch/arm/boot/dts/s3c24xx.dtsi new file mode 100644 index 000000000000..cab46ff5fb4d --- /dev/null +++ b/arch/arm/boot/dts/s3c24xx.dtsi @@ -0,0 +1,92 @@ +/* + * Samsung's S3C24XX family device tree source + * + * Copyright (c) 2013 Heiko Stuebner + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/include/ "skeleton.dtsi" + +/ { + compatible = "samsung,s3c24xx"; + interrupt-parent = <&intc>; + + aliases { + pinctrl0 = &pinctrl_0; + }; + + intc:interrupt-controller@4a000000 { + compatible = "samsung,s3c2410-irq"; + reg = <0x4a000000 0x100>; + interrupt-controller; + #interrupt-cells = <4>; + }; + + pinctrl_0: pinctrl@56000000 { + reg = <0x56000000 0x1000>; + + wakeup-interrupt-controller { + compatible = "samsung,s3c2410-wakeup-eint"; + interrupts = <0 0 0 3>, + <0 0 1 3>, + <0 0 2 3>, + <0 0 3 3>, + <0 0 4 4>, + <0 0 5 4>; + }; + }; + + timer@51000000 { + compatible = "samsung,s3c2410-pwm"; + reg = <0x51000000 0x1000>; + interrupts = <0 0 10 3>, <0 0 11 3>, <0 0 12 3>, <0 0 13 3>, <0 0 14 3>; + #pwm-cells = <4>; + }; + + serial@50000000 { + compatible = "samsung,s3c2410-uart"; + reg = <0x50000000 0x4000>; + interrupts = <1 28 0 4>, <1 28 1 4>; + status = "disabled"; + }; + + serial@50004000 { + compatible = "samsung,s3c2410-uart"; + reg = <0x50004000 0x4000>; + interrupts = <1 23 3 4>, <1 23 4 4>; + status = "disabled"; + }; + + serial@50008000 { + compatible = "samsung,s3c2410-uart"; + reg = <0x50008000 0x4000>; + interrupts = <1 15 6 4>, <1 15 7 4>; + status = "disabled"; + }; + + watchdog@53000000 { + compatible = "samsung,s3c2410-wdt"; + reg = <0x53000000 0x100>; + interrupts = <0 0 9 3>; + status = "disabled"; + }; + + rtc@57000000 { + compatible = "samsung,s3c2410-rtc"; + reg = <0x57000000 0x100>; + interrupts = <0 0 30 3>, <0 0 8 3>; + status = "disabled"; + }; + + i2c@54000000 { + compatible = "samsung,s3c2410-i2c"; + reg = <0x54000000 0x100>; + interrupts = <0 0 27 3>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; +}; diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig index f2f7088bfd22..e52d5e42af4e 100644 --- a/arch/arm/mach-s3c24xx/Kconfig +++ b/arch/arm/mach-s3c24xx/Kconfig @@ -490,6 +490,18 @@ config MACH_SMDK2416 help Say Y here if you are using an SMDK2416 +config MACH_S3C2416_DT + bool "Samsung S3C2416 machine using devicetree" + select CLKSRC_OF + select USE_OF + select PINCTRL + select PINCTRL_S3C24XX + help + Machine support for Samsung S3C2416 machines with device tree enabled. + Select this if a fdt blob is available for the S3C2416 SoC based board. + Note: This is under development and not all peripherals can be supported + with this machine file. + endif # CPU_S3C2416 if CPU_S3C2440 diff --git a/arch/arm/mach-s3c24xx/Makefile b/arch/arm/mach-s3c24xx/Makefile index 6f46ecfc8396..6de730bada4d 100644 --- a/arch/arm/mach-s3c24xx/Makefile +++ b/arch/arm/mach-s3c24xx/Makefile @@ -85,6 +85,7 @@ obj-$(CONFIG_MACH_SMDK2413) += mach-smdk2413.o obj-$(CONFIG_MACH_VSTMS) += mach-vstms.o obj-$(CONFIG_MACH_SMDK2416) += mach-smdk2416.o +obj-$(CONFIG_MACH_S3C2416_DT) += mach-s3c2416-dt.o obj-$(CONFIG_MACH_ANUBIS) += mach-anubis.o obj-$(CONFIG_MACH_AT2440EVB) += mach-at2440evb.o diff --git a/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c b/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c new file mode 100644 index 000000000000..f5c9072e1e35 --- /dev/null +++ b/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c @@ -0,0 +1,91 @@ +/* + * Samsung's S3C2416 flattened device tree enabled machine + * + * Copyright (c) 2012 Heiko Stuebner + * + * based on mach-exynos/mach-exynos4-dt.c + * + * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * Copyright (c) 2010-2011 Linaro Ltd. + * www.linaro.org + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include +#include +#include +#include + +#include +#include + +#include +#include +#include + +#include "common.h" + +/* + * The following lookup table is used to override device names when devices + * are registered from device tree. This is temporarily added to enable + * device tree support addition for the S3C2416 architecture. + * + * For drivers that require platform data to be provided from the machine + * file, a platform data pointer can also be supplied along with the + * devices names. Usually, the platform data elements that cannot be parsed + * from the device tree by the drivers (example: function pointers) are + * supplied. But it should be noted that this is a temporary mechanism and + * at some point, the drivers should be capable of parsing all the platform + * data from the device tree. + */ +static const struct of_dev_auxdata s3c2416_auxdata_lookup[] __initconst = { + OF_DEV_AUXDATA("samsung,s3c2440-uart", S3C2410_PA_UART0, + "s3c2440-uart.0", NULL), + OF_DEV_AUXDATA("samsung,s3c2440-uart", S3C2410_PA_UART1, + "s3c2440-uart.1", NULL), + OF_DEV_AUXDATA("samsung,s3c2440-uart", S3C2410_PA_UART2, + "s3c2440-uart.2", NULL), + OF_DEV_AUXDATA("samsung,s3c2440-uart", S3C2443_PA_UART3, + "s3c2440-uart.3", NULL), + OF_DEV_AUXDATA("samsung,s3c6410-sdhci", S3C_PA_HSMMC0, + "s3c-sdhci.0", NULL), + OF_DEV_AUXDATA("samsung,s3c6410-sdhci", S3C_PA_HSMMC1, + "s3c-sdhci.1", NULL), + OF_DEV_AUXDATA("samsung,s3c2440-i2c", S3C_PA_IIC, + "s3c2440-i2c.0", NULL), + {}, +}; + +static void __init s3c2416_dt_map_io(void) +{ + s3c24xx_init_io(NULL, 0); + s3c24xx_init_clocks(12000000); +} + +static void __init s3c2416_dt_machine_init(void) +{ + of_platform_populate(NULL, of_default_bus_match_table, + s3c2416_auxdata_lookup, NULL); + + s3c_pm_init(); +} + +static char const *s3c2416_dt_compat[] __initdata = { + "samsung,s3c2416", + "samsung,s3c2450", + NULL +}; + +DT_MACHINE_START(S3C2416_DT, "Samsung S3C2416 (Flattened Device Tree)") + /* Maintainer: Heiko Stuebner */ + .dt_compat = s3c2416_dt_compat, + .map_io = s3c2416_dt_map_io, + .init_irq = irqchip_init, + .init_machine = s3c2416_dt_machine_init, + .init_time = clocksource_of_init, + .restart = s3c2416_restart, +MACHINE_END From 896db3b326faf1a88ef028bd70ac1a33db2477c4 Mon Sep 17 00:00:00 2001 From: Vivek Gautam Date: Wed, 10 Apr 2013 19:31:34 +0900 Subject: [PATCH 02/41] ARM: dts: Enabling samsung-usb3phy driver for exynos5250 Adding usb3.0 phy node for Exynos5250 along with the necessary device data to be parsed. Signed-off-by: Vivek Gautam Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5250.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 0673524238a6..79edd7f26f57 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -479,6 +479,20 @@ pinctrl-0 = <&i2s2_bus>; }; + usbphy@12100000 { + compatible = "samsung,exynos5250-usb3phy"; + reg = <0x12100000 0x100>; + clocks = <&clock 1>, <&clock 286>; + clock-names = "ext_xtal", "usbdrd30"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + usbphy-sys { + reg = <0x10040704 0x8>; + }; + }; + usb@12110000 { compatible = "samsung,exynos4210-ehci"; reg = <0x12110000 0x100>; From 0629f1558a043fdc79b937d31bbbc10ca1c1237b Mon Sep 17 00:00:00 2001 From: Vivek Gautam Date: Wed, 10 Apr 2013 19:37:52 +0900 Subject: [PATCH 03/41] ARM: dts: Add device tree bindings for dwc3-exynos Document device tree binding information as required by the Samsung' USB 3.0 controller. Signed-off-by: Vivek Gautam Signed-off-by: Kukjin Kim --- .../devicetree/bindings/usb/exynos-usb.txt | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/exynos-usb.txt b/Documentation/devicetree/bindings/usb/exynos-usb.txt index b3abde736017..d967ba16de60 100644 --- a/Documentation/devicetree/bindings/usb/exynos-usb.txt +++ b/Documentation/devicetree/bindings/usb/exynos-usb.txt @@ -48,3 +48,37 @@ Example: clocks = <&clock 285>; clock-names = "usbhost"; }; + +DWC3 +Required properties: + - compatible: should be "samsung,exynos5250-dwusb3" for USB 3.0 DWC3 + controller. + - #address-cells, #size-cells : should be '1' if the device has sub-nodes + with 'reg' property. + - ranges: allows valid 1:1 translation between child's address space and + parent's address space + - clocks: Clock IDs array as required by the controller. + - clock-names: names of clocks correseponding to IDs in the clock property + +Sub-nodes: +The dwc3 core should be added as subnode to Exynos dwc3 glue. +- dwc3 : + The binding details of dwc3 can be found in: + Documentation/devicetree/bindings/usb/dwc3.txt + +Example: + usb@12000000 { + compatible = "samsung,exynos5250-dwusb3"; + clocks = <&clock 286>; + clock-names = "usbdrd30"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + dwc3 { + compatible = "synopsys,dwc3"; + reg = <0x12000000 0x10000>; + interrupts = <0 72 0>; + usb-phy = <&usb2_phy &usb3_phy>; + }; + }; From 0b3dc97e4f22f55334064aa403c83f8fdaade642 Mon Sep 17 00:00:00 2001 From: Vivek Gautam Date: Wed, 10 Apr 2013 19:38:36 +0900 Subject: [PATCH 04/41] ARM: dts: Enabling dwc3-exynos driver for exynos5250 Adding DWC3 device tree node for Exynos5250 needed to parse device tree data. Signed-off-by: Vivek Gautam Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5250.dtsi | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 79edd7f26f57..9dfc6de97f34 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -479,7 +479,23 @@ pinctrl-0 = <&i2s2_bus>; }; - usbphy@12100000 { + usb@12000000 { + compatible = "samsung,exynos5250-dwusb3"; + clocks = <&clock 286>; + clock-names = "usbdrd30"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + dwc3 { + compatible = "synopsys,dwc3"; + reg = <0x12000000 0x10000>; + interrupts = <0 72 0>; + usb-phy = <&usb2_phy &usb3_phy>; + }; + }; + + usb3_phy: usbphy@12100000 { compatible = "samsung,exynos5250-usb3phy"; reg = <0x12100000 0x100>; clocks = <&clock 1>, <&clock 286>; @@ -511,7 +527,7 @@ clock-names = "usbhost"; }; - usbphy@12130000 { + usb2_phy: usbphy@12130000 { compatible = "samsung,exynos5250-usb2phy"; reg = <0x12130000 0x100>; clocks = <&clock 1>, <&clock 285>; From e4c2ec6ae7fbd49f000c2d3ece658f29a4dddb7c Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Wed, 10 Apr 2013 18:56:50 +0900 Subject: [PATCH 05/41] ARM: dts: Remove keypad entries from exynos4x12-pinctrl.dtsi Keypad pins/lines are board specific and should be added to respective board dts files. Signed-off-by: Sachin Kamat Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4x12-pinctrl.dtsi | 56 ----------------------- 1 file changed, 56 deletions(-) diff --git a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi index 099cec79e2ae..704290f7c5c0 100644 --- a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi @@ -778,62 +778,6 @@ samsung,pin-drv = <3>; }; - keypad_col0: keypad-col0 { - samsung,pins = "gpl2-0"; - samsung,pin-function = <3>; - samsung,pin-pud = <0>; - samsung,pin-drv = <0>; - }; - - keypad_col1: keypad-col1 { - samsung,pins = "gpl2-1"; - samsung,pin-function = <3>; - samsung,pin-pud = <0>; - samsung,pin-drv = <0>; - }; - - keypad_col2: keypad-col2 { - samsung,pins = "gpl2-2"; - samsung,pin-function = <3>; - samsung,pin-pud = <0>; - samsung,pin-drv = <0>; - }; - - keypad_col3: keypad-col3 { - samsung,pins = "gpl2-3"; - samsung,pin-function = <3>; - samsung,pin-pud = <0>; - samsung,pin-drv = <0>; - }; - - keypad_col4: keypad-col4 { - samsung,pins = "gpl2-4"; - samsung,pin-function = <3>; - samsung,pin-pud = <0>; - samsung,pin-drv = <0>; - }; - - keypad_col5: keypad-col5 { - samsung,pins = "gpl2-5"; - samsung,pin-function = <3>; - samsung,pin-pud = <0>; - samsung,pin-drv = <0>; - }; - - keypad_col6: keypad-col6 { - samsung,pins = "gpl2-6"; - samsung,pin-function = <3>; - samsung,pin-pud = <0>; - samsung,pin-drv = <0>; - }; - - keypad_col7: keypad-col7 { - samsung,pins = "gpl2-7"; - samsung,pin-function = <3>; - samsung,pin-pud = <0>; - samsung,pin-drv = <0>; - }; - cam_port_b: cam-port-b { samsung,pins = "gpm0-0", "gpm0-1", "gpm0-2", "gpm0-3", "gpm0-4", "gpm0-5", "gpm0-6", "gpm0-7", From bd08f6277e443ca006df4281febe358d7d2aa804 Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Wed, 10 Apr 2013 18:56:53 +0900 Subject: [PATCH 06/41] ARM: dts: Add keypad entries to Exynos4412 based Origen Added keypad node entries to Exynos4412 based Origen board DT file. Signed-off-by: Sachin Kamat Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4412-origen.dts | 62 +++++++++++++++++++++++++ 1 file changed, 62 insertions(+) diff --git a/arch/arm/boot/dts/exynos4412-origen.dts b/arch/arm/boot/dts/exynos4412-origen.dts index 1c21bad32ca9..790a999f01ac 100644 --- a/arch/arm/boot/dts/exynos4412-origen.dts +++ b/arch/arm/boot/dts/exynos4412-origen.dts @@ -36,6 +36,68 @@ enable-active-high; }; + pinctrl@11000000 { + keypad_rows: keypad-rows { + samsung,pins = "gpx2-0", "gpx2-1", "gpx2-2"; + samsung,pin-function = <3>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + keypad_cols: keypad-cols { + samsung,pins = "gpx1-0", "gpx1-1"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + }; + + keypad@100A0000 { + samsung,keypad-num-rows = <3>; + samsung,keypad-num-columns = <2>; + linux,keypad-no-autorepeat; + linux,keypad-wakeup; + pinctrl-0 = <&keypad_rows &keypad_cols>; + pinctrl-names = "default"; + status = "okay"; + + key_home { + keypad,row = <0>; + keypad,column = <0>; + linux,code = <102>; + }; + + key_down { + keypad,row = <0>; + keypad,column = <1>; + linux,code = <108>; + }; + + key_up { + keypad,row = <1>; + keypad,column = <0>; + linux,code = <103>; + }; + + key_menu { + keypad,row = <1>; + keypad,column = <1>; + linux,code = <139>; + }; + + key_back { + keypad,row = <2>; + keypad,column = <0>; + linux,code = <158>; + }; + + key_enter { + keypad,row = <2>; + keypad,column = <1>; + linux,code = <28>; + }; + }; + sdhci@12530000 { bus-width = <4>; pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &sd2_cd>; From c9b92dd701079de1bf3f01a82a20ff334e13e279 Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Wed, 10 Apr 2013 18:56:56 +0900 Subject: [PATCH 07/41] ARM: dts: Add keypad entries to SMDK4412 Added keypad node entries to SMDK4412 board DT file. Signed-off-by: Sachin Kamat Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4412-smdk4412.dts | 87 +++++++++++++++++++++++ 1 file changed, 87 insertions(+) diff --git a/arch/arm/boot/dts/exynos4412-smdk4412.dts b/arch/arm/boot/dts/exynos4412-smdk4412.dts index dd564310d4a5..c52b01fa8260 100644 --- a/arch/arm/boot/dts/exynos4412-smdk4412.dts +++ b/arch/arm/boot/dts/exynos4412-smdk4412.dts @@ -35,6 +35,93 @@ status = "okay"; }; + pinctrl@11000000 { + keypad_rows: keypad-rows { + samsung,pins = "gpx2-0", "gpx2-1", "gpx2-2"; + samsung,pin-function = <3>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + keypad_cols: keypad-cols { + samsung,pins = "gpx1-0", "gpx1-1", "gpx1-2", "gpx1-3", + "gpx1-4", "gpx1-5", "gpx1-6", "gpx1-7"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + }; + + keypad@100A0000 { + samsung,keypad-num-rows = <3>; + samsung,keypad-num-columns = <8>; + linux,keypad-no-autorepeat; + linux,keypad-wakeup; + pinctrl-0 = <&keypad_rows &keypad_cols>; + pinctrl-names = "default"; + status = "okay"; + + key_1 { + keypad,row = <1>; + keypad,column = <3>; + linux,code = <2>; + }; + + key_2 { + keypad,row = <1>; + keypad,column = <4>; + linux,code = <3>; + }; + + key_3 { + keypad,row = <1>; + keypad,column = <5>; + linux,code = <4>; + }; + + key_4 { + keypad,row = <1>; + keypad,column = <6>; + linux,code = <5>; + }; + + key_5 { + keypad,row = <1>; + keypad,column = <7>; + linux,code = <6>; + }; + + key_A { + keypad,row = <2>; + keypad,column = <6>; + linux,code = <30>; + }; + + key_B { + keypad,row = <2>; + keypad,column = <7>; + linux,code = <48>; + }; + + key_C { + keypad,row = <0>; + keypad,column = <5>; + linux,code = <46>; + }; + + key_D { + keypad,row = <2>; + keypad,column = <5>; + linux,code = <32>; + }; + + key_E { + keypad,row = <0>; + keypad,column = <7>; + linux,code = <18>; + }; + }; + sdhci@12530000 { bus-width = <4>; pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &sd2_cd>; From e636f0a7fc43e847f840366b15c73caf12538a94 Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Wed, 10 Apr 2013 19:01:51 +0900 Subject: [PATCH 08/41] ARM: dts: Add MFC clock entries for exynos4 Added MFC related clock entries in exynos4.dtsi file. Signed-off-by: Sachin Kamat Reviewed-by: Sylwester Nawrocki Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index 359694c78918..bed40ee2e4f6 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -160,6 +160,8 @@ reg = <0x13400000 0x10000>; interrupts = <0 94 0>; samsung,power-domain = <&pd_mfc>; + clocks = <&clock 170>, <&clock 273>; + clock-names = "sclk_mfc", "mfc"; status = "disabled"; }; From dc3c83581c915903a2cd9ef1a9d32014e6849a9f Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Wed, 10 Apr 2013 19:01:51 +0900 Subject: [PATCH 09/41] ARM: dts: Update MFC documentation for clock entries Added clock entry definitions to MFC bindings document. Signed-off-by: Sachin Kamat Reviewed-by: Sylwester Nawrocki Signed-off-by: Kukjin Kim --- Documentation/devicetree/bindings/media/s5p-mfc.txt | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/media/s5p-mfc.txt b/Documentation/devicetree/bindings/media/s5p-mfc.txt index bf0182d8da25..df37b0230c75 100644 --- a/Documentation/devicetree/bindings/media/s5p-mfc.txt +++ b/Documentation/devicetree/bindings/media/s5p-mfc.txt @@ -15,6 +15,9 @@ Required properties: mapped region. - interrupts : MFC interrupt number to the CPU. + - clocks : from common clock binding: handle to mfc clocks. + - clock-names : from common clock binding: must contain "sclk_mfc" and "mfc", + corresponding to entries in the clocks property. - samsung,mfc-r : Base address of the first memory bank used by MFC for DMA contiguous memory allocation and its size. @@ -34,6 +37,8 @@ mfc: codec@13400000 { reg = <0x13400000 0x10000>; interrupts = <0 94 0>; samsung,power-domain = <&pd_mfc>; + clocks = <&clock 170>, <&clock 273>; + clock-names = "sclk_mfc", "mfc"; }; Board specific DT entry: From e6199af616d6e1041ff4f31ac765c5063dceda3f Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Tue, 23 Apr 2013 23:20:19 +0900 Subject: [PATCH 10/41] ARM: dts: Add TMU clock entries to exynos4210.dtsi Adds TMU clock entries to exynos4210.dtsi file. Signed-off-by: Sachin Kamat Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4210.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index 54710de82908..366795ad814a 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -112,6 +112,9 @@ interrupt-parent = <&combiner>; reg = <0x100C0000 0x100>; interrupts = <2 4>; + clocks = <&clock 383>; + clock-names = "tmu_apbif"; + status = "disabled"; }; g2d@12800000 { From 092c343d43fcb8e2222e6effb9d3598421c9fd2a Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Tue, 23 Apr 2013 23:20:24 +0900 Subject: [PATCH 11/41] ARM: dts: Enable TMU on Origen4210 board Enables TMU on Origen4210 board. Signed-off-by: Sachin Kamat Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4210-origen.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts index 524b90846df5..8b0a781d4233 100644 --- a/arch/arm/boot/dts/exynos4210-origen.dts +++ b/arch/arm/boot/dts/exynos4210-origen.dts @@ -41,6 +41,10 @@ enable-active-high; }; + tmu@100C0000 { + status = "okay"; + }; + sdhci@12530000 { bus-width = <4>; pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &sd2_cd>; From 17419726aaa17e052b4078c6a76998ceb998be7a Mon Sep 17 00:00:00 2001 From: Thomas Abraham Date: Tue, 21 May 2013 01:18:45 +0900 Subject: [PATCH 12/41] ARM: dts: add max8997 device node for exynos4210-origen board Add max8997 regulator device node for exynos4210-origen board and list all the supported regulators. Signed-off-by: Thomas Abraham Tested-by: Tushar Behera Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4210-origen.dts | 143 ++++++++++++++++++++++++ 1 file changed, 143 insertions(+) diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts index 8b0a781d4233..bcf80794caab 100644 --- a/arch/arm/boot/dts/exynos4210-origen.dts +++ b/arch/arm/boot/dts/exynos4210-origen.dts @@ -87,6 +87,149 @@ status = "okay"; }; + i2c@13860000 { + status = "okay"; + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <20000>; + pinctrl-0 = <&i2c0_bus>; + pinctrl-names = "default"; + + max8997_pmic@66 { + compatible = "maxim,max8997-pmic"; + reg = <0x66>; + interrupt-parent = <&gpx0>; + interrupts = <4 0>, <3 0>; + + max8997,pmic-buck1-dvs-voltage = <1350000>; + max8997,pmic-buck2-dvs-voltage = <1100000>; + max8997,pmic-buck5-dvs-voltage = <1200000>; + + regulators { + ldo1_reg: LDO1 { + regulator-name = "VDD_ABB_3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + ldo2_reg: LDO2 { + regulator-name = "VDD_ALIVE_1.1V"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + }; + + ldo3_reg: LDO3 { + regulator-name = "VMIPI_1.1V"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + }; + + ldo4_reg: LDO4 { + regulator-name = "VDD_RTC_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo6_reg: LDO6 { + regulator-name = "VMIPI_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo7_reg: LDO7 { + regulator-name = "VDD_AUD_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo8_reg: LDO8 { + regulator-name = "VADC_3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + ldo9_reg: LDO9 { + regulator-name = "DVDD_SWB_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + + ldo10_reg: LDO10 { + regulator-name = "VDD_PLL_1.1V"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + }; + + ldo11_reg: LDO11 { + regulator-name = "VDD_AUD_3V"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + }; + + ldo14_reg: LDO14 { + regulator-name = "AVDD18_SWB_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo17_reg: LDO17 { + regulator-name = "VDD_SWB_3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + ldo21_reg: LDO21 { + regulator-name = "VDD_MIF_1.2V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + buck1_reg: BUCK1 { + regulator-name = "VDD_ARM_1.2V"; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-boot-on; + }; + + buck2_reg: BUCK2 { + regulator-name = "VDD_INT_1.1V"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + regulator-boot-on; + }; + + buck3_reg: BUCK3 { + regulator-name = "VDD_G3D_1.1V"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1100000>; + }; + + buck5_reg: BUCK5 { + regulator-name = "VDDQ_M1M2_1.2V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + buck7_reg: BUCK7 { + regulator-name = "VDD_LCD_3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + }; + }; + }; + }; + gpio_keys { compatible = "gpio-keys"; #address-cells = <1>; From 43c171bb6fcd779f8c5622819b75f10f959aff09 Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Mon, 10 Jun 2013 16:58:59 +0900 Subject: [PATCH 13/41] ARM: dts: Remove combiner IRQ node from exynos4x12.dtsi These nodes have separately been added to 4212 and 4412 dtsi files by commit 30269ddff1 ("ARM: exynos: add missing properties for combiner IRQs"). The existing node also contained a few incorrect entries. Signed-off-by: Sachin Kamat Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4x12.dtsi | 8 -------- 1 file changed, 8 deletions(-) diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index e3380a7a285c..64c2d3f68744 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -28,14 +28,6 @@ pinctrl3 = &pinctrl_3; }; - combiner:interrupt-controller@10440000 { - interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, - <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, - <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, - <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>, - <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>; - }; - clock: clock-controller@0x10030000 { compatible = "samsung,exynos4412-clock"; reg = <0x10030000 0x20000>; From a3093e6f8483d6ac8af427436f4e7dd6f8ee0df7 Mon Sep 17 00:00:00 2001 From: Vikas Sajjan Date: Mon, 10 Jun 2013 17:04:36 +0900 Subject: [PATCH 14/41] ARM: dts: Add DT node for DP controller for Arndale Board Add DT node for DP controller to exynos5250 based Arndale Board Signed-off-by: Vikas Sajjan Reviewed-by: Jingoo Han Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5250-arndale.dts | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index 02cfc76d002f..f68b82095b80 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -449,4 +449,14 @@ clock-frequency = <24000000>; }; }; + + dp-controller { + samsung,color-space = <0>; + samsung,dynamic-range = <0>; + samsung,ycbcr-coeff = <0>; + samsung,color-depth = <1>; + samsung,link-rate = <0x0a>; + samsung,lane-count = <4>; + }; + }; From 0f72a9ec19913d51b2f7d39b913b7d26ffef48da Mon Sep 17 00:00:00 2001 From: Vikas Sajjan Date: Mon, 10 Jun 2013 17:04:40 +0900 Subject: [PATCH 15/41] ARM: dts: Add clock provider information for DP controller in Exynos5250 SoC Adds clock provider information for DP controller required by CCF. Signed-off-by: Vikas Sajjan Signed-off-by: Arun Kumar K Acked-by: Jingoo Han Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5250.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 9dfc6de97f34..8b1f9b63f9f7 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -651,6 +651,8 @@ reg = <0x145b0000 0x1000>; interrupts = <10 3>; interrupt-parent = <&combiner>; + clocks = <&clock 342>; + clock-names = "dp"; #address-cells = <1>; #size-cells = <0>; From 54db6030c9ca8cde74ce2744abaeb483c35c3f96 Mon Sep 17 00:00:00 2001 From: Vikas Sajjan Date: Mon, 10 Jun 2013 17:04:44 +0900 Subject: [PATCH 16/41] ARM: dts: Add display timing node to exynos5250-arndale.dts Adds display timing node for a DP panel to Arndale Board DTS file Signed-off-by: Vikas Sajjan Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5250-arndale.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index f68b82095b80..c371f7c1e912 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -459,4 +459,22 @@ samsung,lane-count = <4>; }; + fimd: fimd@14400000 { + display-timings { + native-mode = <&timing0>; + timing0: timing@0 { + /* 2560x1600 DP panel */ + clock-frequency = <50000>; + hactive = <2560>; + vactive = <1600>; + hfront-porch = <48>; + hback-porch = <80>; + hsync-len = <32>; + vback-porch = <16>; + vfront-porch = <8>; + vsync-len = <6>; + }; + }; + }; + }; From f2ee3952f34317db307c27fd6c5275617166ecc2 Mon Sep 17 00:00:00 2001 From: Youngmin Nam Date: Mon, 10 Jun 2013 17:06:59 +0900 Subject: [PATCH 17/41] ARM: dts: Enable RTC by default on EXYNOS5440 RTC is a basic feature of EXYNOS5440. But it was disabled by issue that comes from EXYNOS5250. (commit id: 522ccdb6) That issue only applies to EXYNOS5250 not EXYNOS5440. So, there is no issue with enabled RTC on EXYNOS5440. This change was tested on EXYNOS5440. Signed-off-by: Youngmin Nam Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5440.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi index f6b1c8973845..93e9028edaaf 100644 --- a/arch/arm/boot/dts/exynos5440.dtsi +++ b/arch/arm/boot/dts/exynos5440.dtsi @@ -214,6 +214,5 @@ interrupts = <0 17 0>, <0 16 0>; clocks = <&clock 21>; clock-names = "rtc"; - status = "disabled"; }; }; From d62347a2bb8b13bdcad868a93fee18919d8a9c4d Mon Sep 17 00:00:00 2001 From: Dongjin Kim Date: Mon, 10 Jun 2013 17:26:27 +0900 Subject: [PATCH 18/41] ARM: dts: add max77686 node entry for ODROID-X ODROID-X board have a max77686 PMIC on i2c channel 0. The properties of used LDO and BUCK are defined according the schematic. Signed-off-by: Dongjin Kim Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4412-odroidx.dts | 195 +++++++++++++++++++++++ 1 file changed, 195 insertions(+) diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts b/arch/arm/boot/dts/exynos4412-odroidx.dts index 53bc8bf77984..178622520770 100644 --- a/arch/arm/boot/dts/exynos4412-odroidx.dts +++ b/arch/arm/boot/dts/exynos4412-odroidx.dts @@ -108,4 +108,199 @@ clock-frequency = <24000000>; }; }; + + i2c@13860000 { + pinctrl-0 = <&i2c0_bus>; + pinctrl-names = "default"; + status = "okay"; + + max77686: pmic@09 { + compatible = "maxim,max77686"; + reg = <0x09>; + + voltage-regulators { + ldo1_reg: LDO1 { + regulator-name = "VDD_ALIVE_1.0V"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + ldo2_reg: LDO2 { + regulator-name = "VDDQ_M1_2_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo3_reg: LDO3 { + regulator-name = "VDDQ_EXT_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo4_reg: LDO4 { + regulator-name = "VDDQ_MMC2_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo5_reg: LDO5 { + regulator-name = "VDDQ_MMC1_3_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo6_reg: LDO6 { + regulator-name = "VDD10_MPLL_1.0V"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + ldo7_reg: LDO7 { + regulator-name = "VDD10_XPLL_1.0V"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + ldo11_reg: LDO11 { + regulator-name = "VDD18_ABB1_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo12_reg: LDO12 { + regulator-name = "VDD33_USB_3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo13_reg: LDO13 { + regulator-name = "VDDQ_C2C_W_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo14_reg: LDO14 { + regulator-name = "VDD18_ABB0_2_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo15_reg: LDO15 { + regulator-name = "VDD10_HSIC_1.0V"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo16_reg: LDO16 { + regulator-name = "VDD18_HSIC_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo20_reg: LDO20 { + regulator-name = "LDO20_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + }; + + ldo21_reg: LDO21 { + regulator-name = "LDO21_3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo25_reg: LDO25 { + regulator-name = "VDDQ_LCD_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + buck1_reg: BUCK1 { + regulator-name = "vdd_mif"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-boot-on; + }; + + buck2_reg: BUCK2 { + regulator-name = "vdd_arm"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1300000>; + regulator-always-on; + regulator-boot-on; + }; + + buck3_reg: BUCK3 { + regulator-name = "vdd_int"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-boot-on; + }; + + buck4_reg: BUCK4 { + regulator-name = "vdd_g3d"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1100000>; + regulator-microvolt-offset = <50000>; + }; + + buck5_reg: BUCK5 { + regulator-name = "VDDQ_CKEM1_2_1.2V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + regulator-boot-on; + }; + + buck6_reg: BUCK6 { + regulator-name = "BUCK6_1.35V"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-boot-on; + }; + + buck7_reg: BUCK7 { + regulator-name = "BUCK7_2.0V"; + regulator-min-microvolt = <2000000>; + regulator-max-microvolt = <2000000>; + regulator-always-on; + }; + + buck8_reg: BUCK8 { + regulator-name = "BUCK8_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + }; + }; + }; }; From 52e870efc159ca033ebe549ea705338499b8ef0d Mon Sep 17 00:00:00 2001 From: Dongjin Kim Date: Mon, 10 Jun 2013 17:27:21 +0900 Subject: [PATCH 19/41] ARM: dts: add vmmc regulator support for ODROID-X This patch is to add vmmc regulator node at MSHC and SDHCI for ODROID-X board file. Signed-off-by: Dongjin Kim Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4412-odroidx.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts b/arch/arm/boot/dts/exynos4412-odroidx.dts index 178622520770..867d9452619b 100644 --- a/arch/arm/boot/dts/exynos4412-odroidx.dts +++ b/arch/arm/boot/dts/exynos4412-odroidx.dts @@ -43,6 +43,7 @@ #size-cells = <0>; pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>; pinctrl-names = "default"; + vmmc-supply = <&ldo20_reg &buck8_reg>; status = "okay"; num-slots = <1>; @@ -78,6 +79,7 @@ bus-width = <4>; pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; pinctrl-names = "default"; + vmmc-supply = <&ldo4_reg &ldo21_reg>; status = "okay"; }; From 1a12f52e3d751043a88d4bf365822a0e0788f1b0 Mon Sep 17 00:00:00 2001 From: Girish K S Date: Mon, 10 Jun 2013 17:29:34 +0900 Subject: [PATCH 20/41] ARM: dts: add dts node for the ahci sata exynos5440 This patch adds dts support for the sata controller Signed-off-by: Girish K S Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5440.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi index 93e9028edaaf..871ebad7bcbd 100644 --- a/arch/arm/boot/dts/exynos5440.dtsi +++ b/arch/arm/boot/dts/exynos5440.dtsi @@ -215,4 +215,13 @@ clocks = <&clock 21>; clock-names = "rtc"; }; + + sata@210000 { + compatible = "snps,exynos5440-ahci"; + reg = <0x210000 0x10000>; + interrupts = <0 30 0>; + clocks = <&clock 23>; + clock-names = "sata"; + }; + }; From 74478338e4757e3a8ebbf65b7df014f9e2a9d1c7 Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Mon, 10 Jun 2013 17:36:39 +0900 Subject: [PATCH 21/41] ARM: dts: add pin state information for DP HPD support to Exynos5250 Add pin state information for DP HPD support that requires pin configuration support using pinctrl interface. Signed-off-by: Jingoo Han Reviewed-by: Doug Anderson Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5250-pinctrl.dtsi | 7 +++++++ arch/arm/boot/dts/exynos5250-smdk5250.dts | 3 +++ 2 files changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/exynos5250-pinctrl.dtsi b/arch/arm/boot/dts/exynos5250-pinctrl.dtsi index d1650fb34c0a..e9cdee385092 100644 --- a/arch/arm/boot/dts/exynos5250-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos5250-pinctrl.dtsi @@ -553,6 +553,13 @@ samsung,pin-pud = <0>; samaung,pin-drv = <0>; }; + + dp_hpd: dp_hpd { + samsung,pins = "gpx0-7"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samaung,pin-drv = <0>; + }; }; pinctrl@13400000 { diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts index 3e0c792e2767..d53ea34c4fa1 100644 --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts @@ -224,6 +224,9 @@ samsung,color-depth = <1>; samsung,link-rate = <0x0a>; samsung,lane-count = <4>; + + pinctrl-names = "default"; + pinctrl-0 = <&dp_hpd>; }; display-timings { From 60e69858a377637bda4cd67981f2d865106983e6 Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Mon, 10 Jun 2013 17:38:32 +0900 Subject: [PATCH 22/41] ARM: dts: Document DP clock in samsung,exynos5-dp binding The exynos5-dp node needs a clock specified using the common clock framework. Signed-off-by: Jingoo Han Reviewed-by: Doug Anderson Signed-off-by: Kukjin Kim --- Documentation/devicetree/bindings/video/exynos_dp.txt | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/video/exynos_dp.txt b/Documentation/devicetree/bindings/video/exynos_dp.txt index c60da67a5d76..84f10c16cb38 100644 --- a/Documentation/devicetree/bindings/video/exynos_dp.txt +++ b/Documentation/devicetree/bindings/video/exynos_dp.txt @@ -21,6 +21,10 @@ Required properties for dp-controller: of memory mapped region. -interrupts: interrupt combiner values. + -clocks: + from common clock binding: handle to dp clock. + -clock-names: + from common clock binding: Shall be "dp". -interrupt-parent: phandle to Interrupt combiner node. -samsung,color-space: @@ -61,6 +65,8 @@ SOC specific portion: reg = <0x145b0000 0x10000>; interrupts = <10 3>; interrupt-parent = <&combiner>; + clocks = <&clock 342>; + clock-names = "dp"; dptx-phy { reg = <0x10040720>; From 5cd644d837ae8c825066c225480647eb691e027d Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Mon, 10 Jun 2013 17:49:41 +0900 Subject: [PATCH 23/41] clk: exynos4: Add additional G2D clocks Add G2D clocks for Exynos4x12 SoC and sclk_fimg2d required by G2D IP. Signed-off-by: Sachin Kamat Cc: Thomas Abraham Acked-by: Mike Turquette Signed-off-by: Kukjin Kim --- .../devicetree/bindings/clock/exynos4-clock.txt | 3 ++- drivers/clk/samsung/clk-exynos4.c | 9 +++++++-- 2 files changed, 9 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/exynos4-clock.txt b/Documentation/devicetree/bindings/clock/exynos4-clock.txt index ea5e26f16aec..14d5c2af26f4 100644 --- a/Documentation/devicetree/bindings/clock/exynos4-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos4-clock.txt @@ -102,6 +102,7 @@ Exynos4 SoC and this is specified where applicable. sclk_spi0_isp 174 Exynos4x12 sclk_spi1_isp 175 Exynos4x12 sclk_uart_isp 176 Exynos4x12 + sclk_fimg2d 177 [Peripheral Clock Gates] @@ -129,7 +130,7 @@ Exynos4 SoC and this is specified where applicable. smmu_mfcl 274 smmu_mfcr 275 g3d 276 - g2d 277 Exynos4210 + g2d 277 rotator 278 Exynos4210 mdma 279 Exynos4210 smmu_g2d 280 Exynos4210 diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index 3c1f88868f29..addc738a06fb 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c @@ -151,7 +151,7 @@ enum exynos4_clks { sclk_audio1, sclk_audio2, sclk_spdif, sclk_spi0, sclk_spi1, sclk_spi2, sclk_slimbus, sclk_fimd1, sclk_mipi1, sclk_pcm1, sclk_pcm2, sclk_i2s1, sclk_i2s2, sclk_mipihsi, sclk_mfc, sclk_pcm0, sclk_g3d, sclk_pwm_isp, - sclk_spi0_isp, sclk_spi1_isp, sclk_uart_isp, + sclk_spi0_isp, sclk_spi1_isp, sclk_uart_isp, sclk_fimg2d, /* gate clocks */ fimc0 = 256, fimc1, fimc2, fimc3, csis0, csis1, jpeg, smmu_fimc0, @@ -484,6 +484,9 @@ struct samsung_mux_clock exynos4x12_mux_clks[] __initdata = { MUX(none, "mout_spi0_isp", group1_p4x12, E4X12_SRC_ISP, 4, 4), MUX(none, "mout_spi1_isp", group1_p4x12, E4X12_SRC_ISP, 8, 4), MUX(none, "mout_uart_isp", group1_p4x12, E4X12_SRC_ISP, 12, 4), + MUX(none, "mout_g2d0", sclk_ampll_p4210, SRC_DMC, 20, 1), + MUX(none, "mout_g2d1", sclk_evpll_p, SRC_DMC, 24, 1), + MUX(none, "mout_g2d", mout_g2d_p, SRC_DMC, 28, 1), }; /* list of divider clocks supported in all exynos4 soc's */ @@ -552,7 +555,7 @@ struct samsung_div_clock exynos4_div_clks[] __initdata = { /* list of divider clocks supported in exynos4210 soc */ struct samsung_div_clock exynos4210_div_clks[] __initdata = { DIV(aclk200, "aclk200", "mout_aclk200", DIV_TOP, 0, 3), - DIV(none, "div_g2d", "mout_g2d", DIV_IMAGE, 0, 4), + DIV(sclk_fimg2d, "sclk_fimg2d", "mout_g2d", DIV_IMAGE, 0, 4), DIV(none, "div_fimd1", "mout_fimd1", E4210_DIV_LCD1, 0, 4), DIV(none, "div_mipi1", "mout_mipi1", E4210_DIV_LCD1, 16, 4), DIV(none, "div_sata", "mout_sata", DIV_FSYS0, 20, 4), @@ -582,6 +585,7 @@ struct samsung_div_clock exynos4x12_div_clks[] __initdata = { DIV(none, "div_mpwm", "div_isp1", E4X12_DIV_ISP1, 0, 3), DIV(div_mcuisp0, "div_mcuisp0", "aclk400_mcuisp", E4X12_DIV_ISP1, 4, 3), DIV(div_mcuisp1, "div_mcuisp1", "div_mcuisp0", E4X12_DIV_ISP1, 8, 3), + DIV(sclk_fimg2d, "sclk_fimg2d", "mout_g2d", DIV_DMC1, 0, 4), }; /* list of gate clocks supported in all exynos4 soc's */ @@ -909,6 +913,7 @@ struct samsung_gate_clock exynos4x12_gate_clks[] __initdata = { CLK_IGNORE_UNUSED, 0), GATE(spi1_isp, "spi1_isp", "aclk200", E4X12_GATE_ISP1, 13, CLK_IGNORE_UNUSED, 0), + GATE(g2d, "g2d", "aclk200", GATE_IP_DMC, 23, 0, 0), }; /* From a8e0553d4e5533495d0a2214a3ce7ccbf570f16c Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Mon, 10 Jun 2013 17:52:20 +0900 Subject: [PATCH 24/41] ARM: dts: Remove duplicate and add missing G2D nodes G2D node got added twice in exynos4412-smdk4412.dts instead of getting added to exynos4412-origen.dts. Remove the duplicate entry and add it to exynos4412-origen.dts. Signed-off-by: Sachin Kamat Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4412-origen.dts | 4 ++++ arch/arm/boot/dts/exynos4412-smdk4412.dts | 4 ---- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/exynos4412-origen.dts b/arch/arm/boot/dts/exynos4412-origen.dts index 790a999f01ac..ca73c42f77e1 100644 --- a/arch/arm/boot/dts/exynos4412-origen.dts +++ b/arch/arm/boot/dts/exynos4412-origen.dts @@ -98,6 +98,10 @@ }; }; + g2d@10800000 { + status = "okay"; + }; + sdhci@12530000 { bus-width = <4>; pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &sd2_cd>; diff --git a/arch/arm/boot/dts/exynos4412-smdk4412.dts b/arch/arm/boot/dts/exynos4412-smdk4412.dts index c52b01fa8260..a8ba195c41ac 100644 --- a/arch/arm/boot/dts/exynos4412-smdk4412.dts +++ b/arch/arm/boot/dts/exynos4412-smdk4412.dts @@ -31,10 +31,6 @@ status = "okay"; }; - g2d@10800000 { - status = "okay"; - }; - pinctrl@11000000 { keypad_rows: keypad-rows { samsung,pins = "gpx2-0", "gpx2-1", "gpx2-2"; From 37bf57969fbe7c348518829218c23353d7f1bc57 Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Mon, 10 Jun 2013 17:52:24 +0900 Subject: [PATCH 25/41] ARM: dts: Add clock entries to G2D node for exynos4210 Added clock entries to G2D node. Signed-off-by: Sachin Kamat Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4210.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index 366795ad814a..d4f8067e89ba 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -121,6 +121,8 @@ compatible = "samsung,s5pv210-g2d"; reg = <0x12800000 0x1000>; interrupts = <0 89 0>; + clocks = <&clock 177>, <&clock 277>; + clock-names = "sclk_fimg2d", "fimg2d"; status = "disabled"; }; }; From cfc5652d75275c1ef4e672c9e6d4545bb98267af Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Mon, 10 Jun 2013 17:52:27 +0900 Subject: [PATCH 26/41] ARM: dts: Add clock entries to G2D node for exynos4x12 Added clock entries to G2D node for exynos4x12 DT file. Signed-off-by: Sachin Kamat Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4x12.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index 64c2d3f68744..35cb2099d55e 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -69,6 +69,8 @@ compatible = "samsung,exynos4212-g2d"; reg = <0x10800000 0x1000>; interrupts = <0 89 0>; + clocks = <&clock 177>, <&clock 277>; + clock-names = "sclk_fimg2d", "fimg2d"; status = "disabled"; }; }; From 82f73176fd8511b5c45493416b8f76ca0d102f5f Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Mon, 10 Jun 2013 17:52:30 +0900 Subject: [PATCH 27/41] ARM: dts: Update G2D documentation for clock entries Added clock entry definitions to G2D bindings document. Signed-off-by: Sachin Kamat Cc: devicetree-discuss@lists.ozlabs.org Signed-off-by: Kukjin Kim --- Documentation/devicetree/bindings/gpu/samsung-g2d.txt | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/gpu/samsung-g2d.txt b/Documentation/devicetree/bindings/gpu/samsung-g2d.txt index 2b14a940eb75..3f454ffc654a 100644 --- a/Documentation/devicetree/bindings/gpu/samsung-g2d.txt +++ b/Documentation/devicetree/bindings/gpu/samsung-g2d.txt @@ -10,11 +10,16 @@ Required properties: mapped region. - interrupts : G2D interrupt number to the CPU. + - clocks : from common clock binding: handle to G2D clocks. + - clock-names : from common clock binding: must contain "sclk_fimg2d" and + "fimg2d", corresponding to entries in the clocks property. Example: g2d@12800000 { compatible = "samsung,s5pv210-g2d"; reg = <0x12800000 0x1000>; interrupts = <0 89 0>; + clocks = <&clock 177>, <&clock 277>; + clock-names = "sclk_fimg2d", "fimg2d"; status = "disabled"; }; From a38089057fa450944f2e2d07885d76fd727c8d16 Mon Sep 17 00:00:00 2001 From: Thomas Abraham Date: Wed, 12 Jun 2013 04:58:34 +0900 Subject: [PATCH 28/41] ARM: dts: add ohci and ehci controller nodes for EXYNOS5440 EXYNOS5440 includes both OHCI and EHCI usb host controllers. This patch adds device tree nodes for both of them. And the EHCI and OHCI controllers on exynos5440 do not need any explicit phy configuration. So need to assign a different compatible value for these controllers. Signed-off-by: Thomas Abraham Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5440.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi index 871ebad7bcbd..9fd78842e0e0 100644 --- a/arch/arm/boot/dts/exynos5440.dtsi +++ b/arch/arm/boot/dts/exynos5440.dtsi @@ -224,4 +224,19 @@ clock-names = "sata"; }; + ohci@220000 { + compatible = "samsung,exynos5440-ohci"; + reg = <0x220000 0x1000>; + interrupts = <0 29 0>; + clocks = <&clock 24>; + clock-names = "usbhost"; + }; + + ehci@221000 { + compatible = "samsung,exynos5440-ehci"; + reg = <0x221000 0x1000>; + interrupts = <0 29 0>; + clocks = <&clock 24>; + clock-names = "usbhost"; + }; }; From dabd3f9d0033e1d4dd3674f5942523d5b254fa28 Mon Sep 17 00:00:00 2001 From: Girish K S Date: Tue, 18 Jun 2013 06:35:14 +0900 Subject: [PATCH 29/41] ARM: dts: enable spi for EXYNOS5440 SOC This patch enables the SPI in EXYNOS5440 SoC. The NOR Flash can be accessed by enabling the spi interface Signed-off-by: Girish K S Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5440-ssdk5440.dts | 39 +++++++++++++++++++++-- arch/arm/boot/dts/exynos5440.dtsi | 14 +++++--- 2 files changed, 46 insertions(+), 7 deletions(-) diff --git a/arch/arm/boot/dts/exynos5440-ssdk5440.dts b/arch/arm/boot/dts/exynos5440-ssdk5440.dts index d55042beb5c5..a85ac0e27c3e 100644 --- a/arch/arm/boot/dts/exynos5440-ssdk5440.dts +++ b/arch/arm/boot/dts/exynos5440-ssdk5440.dts @@ -20,8 +20,43 @@ bootargs = "root=/dev/sda2 rw rootwait ignore_loglevel early_printk no_console_suspend mem=2048M@0x80000000 console=ttySAC0,115200"; }; - spi { - status = "disabled"; + spi_0: spi@D0000 { + + flash: w25q128@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "winbond,w25q128"; + spi-max-frequency = <15625000>; + reg = <0>; + controller-data { + samsung,spi-feedback-delay = <0>; + }; + + partition@00000 { + label = "BootLoader"; + reg = <0x60000 0x80000>; + read-only; + }; + + partition@e0000 { + label = "Recovery-Kernel"; + reg = <0xe0000 0x300000>; + read-only; + }; + + partition@3e0000 { + label = "CRAM-FS"; + reg = <0x3e0000 0x700000>; + read-only; + }; + + partition@ae0000 { + label = "User-Data"; + reg = <0xae0000 0x520000>; + }; + + }; + }; fixed-rate-clocks { diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi index 9fd78842e0e0..d2a48be7c0f3 100644 --- a/arch/arm/boot/dts/exynos5440.dtsi +++ b/arch/arm/boot/dts/exynos5440.dtsi @@ -16,6 +16,10 @@ interrupt-parent = <&gic>; + aliases { + spi0 = &spi_0; + }; + clock: clock-controller@0x160000 { compatible = "samsung,exynos5440-clock"; reg = <0x160000 0x1000>; @@ -101,14 +105,14 @@ clock-names = "uart", "clk_uart_baud0"; }; - spi { - compatible = "samsung,exynos4210-spi"; - reg = <0xD0000 0x1000>; + spi_0: spi@D0000 { + compatible = "samsung,exynos5440-spi"; + reg = <0xD0000 0x100>; interrupts = <0 4 0>; - tx-dma-channel = <&pdma0 5>; /* preliminary */ - rx-dma-channel = <&pdma0 4>; /* preliminary */ #address-cells = <1>; #size-cells = <0>; + samsung,spi-src-clk = <0>; + num-cs = <1>; clocks = <&clock 21>, <&clock 16>; clock-names = "spi", "spi_busclk0"; }; From 40cb43bd1991a0bb3d967cdd368683d5ba1247e0 Mon Sep 17 00:00:00 2001 From: Padmavathi Venna Date: Tue, 18 Jun 2013 06:38:13 +0900 Subject: [PATCH 30/41] ARM: dts: Add wm8994 regulator support on smdk5250 This patch adds the required regulator supplies and properties for wm8994 codec on smdk5250 board. Signed-off-by: Padmavathi Venna Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5250-smdk5250.dts | 37 +++++++++++++++++++++-- 1 file changed, 35 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts index d53ea34c4fa1..1e21200b6d85 100644 --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts @@ -37,6 +37,30 @@ }; }; + vdd:fixed-regulator@0 { + compatible = "regulator-fixed"; + regulator-name = "vdd-supply"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + dbvdd:fixed-regulator@1 { + compatible = "regulator-fixed"; + regulator-name = "dbvdd-supply"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + spkvdd:fixed-regulator@2 { + compatible = "regulator-fixed"; + regulator-name = "spkvdd-supply"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + i2c@12C70000 { samsung,i2c-sda-delay = <100>; samsung,i2c-max-bus-freq = <20000>; @@ -47,8 +71,17 @@ }; wm8994: wm8994@1a { - compatible = "wlf,wm8994"; - reg = <0x1a>; + compatible = "wlf,wm8994"; + reg = <0x1a>; + + gpio-controller; + #gpio-cells = <2>; + + AVDD2-supply = <&vdd>; + CPVDD-supply = <&vdd>; + DBVDD-supply = <&dbvdd>; + SPKVDD1-supply = <&spkvdd>; + SPKVDD2-supply = <&spkvdd>; }; }; From afbbf927103f16a6ed0a6de0b4dc7ad7102262c7 Mon Sep 17 00:00:00 2001 From: Amit Daniel Kachhap Date: Tue, 18 Jun 2013 06:39:41 +0900 Subject: [PATCH 31/41] ARM: dts: Add more opp levels in exynos5440 This patch updates cpu frequency level from 1500 to 800MHZ in steps of 100MHZ. The corresponding voltage(in uV) is also added. Signed-off-by: Amit Daniel Kachhap Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5440.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi index d2a48be7c0f3..d21045203443 100644 --- a/arch/arm/boot/dts/exynos5440.dtsi +++ b/arch/arm/boot/dts/exynos5440.dtsi @@ -83,8 +83,13 @@ interrupts = <0 57 0>; operating-points = < /* KHz uV */ + 1500000 1100000 + 1400000 1075000 + 1300000 1050000 1200000 1025000 + 1100000 1000000 1000000 975000 + 900000 950000 800000 925000 >; }; From a7dec8d3dd03f49da69b49c93fdf5fdba0e37440 Mon Sep 17 00:00:00 2001 From: Subash Patel Date: Tue, 18 Jun 2013 06:41:04 +0900 Subject: [PATCH 32/41] ARM: dts: update bootargs to support 8GiB for SSDK5440 and SD5v1 Since ssdk5440 and sd5v1 have 8GiB memory, this patch updates bootargs for them. Signed-off-by: Subash Patel Signed-off-by: Jungseok Lee Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5440-sd5v1.dts | 2 +- arch/arm/boot/dts/exynos5440-ssdk5440.dts | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/exynos5440-sd5v1.dts b/arch/arm/boot/dts/exynos5440-sd5v1.dts index ef747b52b674..f722a0263ac8 100644 --- a/arch/arm/boot/dts/exynos5440-sd5v1.dts +++ b/arch/arm/boot/dts/exynos5440-sd5v1.dts @@ -17,7 +17,7 @@ compatible = "samsung,sd5v1", "samsung,exynos5440"; chosen { - bootargs = "root=/dev/sda2 rw rootwait ignore_loglevel early_printk no_console_suspend mem=2048M@0x80000000 console=ttySAC0,115200"; + bootargs = "root=/dev/sda2 rw rootwait ignore_loglevel early_printk no_console_suspend mem=2048M@0x80000000 mem=6144M@0x100000000 console=ttySAC0,115200"; }; fixed-rate-clocks { diff --git a/arch/arm/boot/dts/exynos5440-ssdk5440.dts b/arch/arm/boot/dts/exynos5440-ssdk5440.dts index a85ac0e27c3e..3aa65bb28020 100644 --- a/arch/arm/boot/dts/exynos5440-ssdk5440.dts +++ b/arch/arm/boot/dts/exynos5440-ssdk5440.dts @@ -17,7 +17,7 @@ compatible = "samsung,ssdk5440", "samsung,exynos5440"; chosen { - bootargs = "root=/dev/sda2 rw rootwait ignore_loglevel early_printk no_console_suspend mem=2048M@0x80000000 console=ttySAC0,115200"; + bootargs = "root=/dev/sda2 rw rootwait ignore_loglevel early_printk no_console_suspend mem=2048M@0x80000000 mem=6144M@0x100000000 console=ttySAC0,115200"; }; spi_0: spi@D0000 { From 995bcbcb95896b2e3bef8f39b7d1b2bd900220b3 Mon Sep 17 00:00:00 2001 From: Giridhar Maruthy Date: Tue, 18 Jun 2013 06:42:42 +0900 Subject: [PATCH 33/41] ARM: dts: Removing pdma for exynos5440 Since the pdma works only in secure mode, accessing the same in hypervisor mode gives an abort. As we are not using pdma anywhere, removing the same. Signed-off-by: Giridhar Maruthy Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5440.dtsi | 22 ---------------------- 1 file changed, 22 deletions(-) diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi index d21045203443..72c114cfbaa0 100644 --- a/arch/arm/boot/dts/exynos5440.dtsi +++ b/arch/arm/boot/dts/exynos5440.dtsi @@ -193,28 +193,6 @@ compatible = "arm,amba-bus"; interrupt-parent = <&gic>; ranges; - - pdma0: pdma@00121000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x121000 0x1000>; - interrupts = <0 46 0>; - clocks = <&clock 8>; - clock-names = "apb_pclk"; - #dma-cells = <1>; - #dma-channels = <8>; - #dma-requests = <32>; - }; - - pdma1: pdma@00120000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x120000 0x1000>; - interrupts = <0 47 0>; - clocks = <&clock 8>; - clock-names = "apb_pclk"; - #dma-cells = <1>; - #dma-channels = <8>; - #dma-requests = <32>; - }; }; rtc { From 5776d6efb50cc4a8834e19a932945dafe5838a71 Mon Sep 17 00:00:00 2001 From: Tushar Behera Date: Tue, 18 Jun 2013 06:46:06 +0900 Subject: [PATCH 34/41] ARM: dts: Enable RTC node for Arndale The issues reported in commit 522ccdb6fd0e ("ARM: dts: Disable the RTC by default on exynos5") are no longer reproduced on EXYNOS5250 based Arndale board. Hence re-enabling RTC support for Arndale board. This is helpful for testing S2R on Arndale board. Signed-off-by: Tushar Behera Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5250-arndale.dts | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index c371f7c1e912..c6db281a3430 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -477,4 +477,7 @@ }; }; + rtc { + status = "okay"; + }; }; From de39310ddfa7f999e51961b8cf6b15332af0c525 Mon Sep 17 00:00:00 2001 From: Doug Anderson Date: Tue, 18 Jun 2013 06:46:20 +0900 Subject: [PATCH 35/41] ARM: dts: Enable RTC node for exynos5250-snow By default the exynos RTC is disabled. Enable it for snow. There's also an external RTC on the max77686 PMIC but we haven't yet enabled that. Signed-off-by: Doug Anderson Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5250-snow.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts index d449feb7e143..05244f150dd9 100644 --- a/arch/arm/boot/dts/exynos5250-snow.dts +++ b/arch/arm/boot/dts/exynos5250-snow.dts @@ -171,6 +171,10 @@ }; }; + rtc { + status = "okay"; + }; + /* * On Snow we've got SIP WiFi and so can keep drive strengths low to * reduce EMI. From c91f2a03cfc67753c8ab78f97983e947bb8f7610 Mon Sep 17 00:00:00 2001 From: Leela Krishna Amudala Date: Tue, 18 Jun 2013 06:58:48 +0900 Subject: [PATCH 36/41] Documentation: Add examples to samsung-pinctrl device tree bindings documentation This patch adds examples to samsung-pinctrl.txt documentaion file on how to make gpio binding and gpio request Signed-off-by: Leela Krishna Amudala Reviewed-by: Doug Anderson Reviewed-by: Tomasz Figa Acked-by: Linus Walleij Signed-off-by: Kukjin Kim --- .../bindings/pinctrl/samsung-pinctrl.txt | 44 ++++++++++++++++++- 1 file changed, 42 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt index c70fca146e91..e15cfc4bb39e 100644 --- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt @@ -21,8 +21,18 @@ Required Properties: - gpio-controller: identifies the node as a gpio controller and pin bank. - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO - binding is used, the amount of cells must be specified as 2. See generic - GPIO binding documentation for description of particular cells. + binding is used, the amount of cells must be specified as 2. See the below + mentioned gpio binding representation for description of particular cells. + + Eg: <&gpx2 6 0> + <[phandle of the gpio controller node] + [pin number within the gpio controller] + [flags]> + + Values for gpio specifier: + - Pin number: is a value between 0 to 7. + - Flags: 0 - Active High + 1 - Active Low - Pin mux/config groups as child nodes: The pin mux (selecting pin function mode) and pin config (pull up/down, driver strength) settings are represented @@ -266,3 +276,33 @@ Example 4: Set up the default pin state for uart controller. pinctrl = devm_pinctrl_get_select_default(&pdev->dev); } + +Example 5: A display port client node that supports 'default' pinctrl state + and gpio binding. + + display-port-controller { + /* ... */ + + samsung,hpd-gpio = <&gpx2 6 0>; + pinctrl-names = "default"; + pinctrl-0 = <&dp_hpd>; + }; + +Example 6: Request the gpio for display port controller + + static int exynos_dp_probe(struct platform_device *pdev) + { + int hpd_gpio, ret; + struct device *dev = &pdev->dev; + struct device_node *dp_node = dev->of_node; + + /* ... */ + + hpd_gpio = of_get_named_gpio(dp_node, "samsung,hpd-gpio", 0); + + /* ... */ + + ret = devm_gpio_request_one(&pdev->dev, hpd_gpio, GPIOF_IN, + "hpd_gpio"); + /* ... */ + } From 6e0778befc2ec936712a24c154c8c74951813062 Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Wed, 19 Jun 2013 00:41:41 +0900 Subject: [PATCH 37/41] ARM: dts: Add PWM related pinctrl entries for exynos4210 PWM nodes are added to EXYNOS4210 pinctrl DT file. Signed-off-by: Sachin Kamat Signed-off-by: Tushar Behera Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4210-pinctrl.dtsi | 28 +++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi index 55a2efb763d1..62d5b99ab3ce 100644 --- a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi @@ -330,6 +330,34 @@ samsung,pin-pud = <3>; samsung,pin-drv = <0>; }; + + pwm0_out: pwm0-out { + samsung,pins = "gpd0-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + pwm1_out: pwm1-out { + samsung,pins = "gpd0-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + pwm2_out: pwm2-out { + samsung,pins = "gpd0-2"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + pwm3_out: pwm3-out { + samsung,pins = "gpd0-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; }; pinctrl@11000000 { From 8e1b0ceef7523b5858023a4e666822eef499919c Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Wed, 19 Jun 2013 00:41:46 +0900 Subject: [PATCH 38/41] ARM: dts: Add LCD related pinctrl entries for exynos4210 Adds pinctrl entries required by FIMD. Signed-off-by: Sachin Kamat Signed-off-by: Tushar Behera Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4210-pinctrl.dtsi | 61 +++++++++++++++++++++++ 1 file changed, 61 insertions(+) diff --git a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi index 62d5b99ab3ce..553bceae8967 100644 --- a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi @@ -358,6 +358,67 @@ samsung,pin-pud = <0>; samsung,pin-drv = <0>; }; + + lcd_ctrl: lcd-ctrl { + samsung,pins = "gpd0-0", "gpd0-1"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + lcd_sync: lcd-sync { + samsung,pins = "gpf0-0", "gpf0-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + lcd_en: lcd-en { + samsung,pins = "gpe3-4"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + lcd_clk: lcd-clk { + samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + lcd_data16: lcd-data-width16 { + samsung,pins = "gpf0-7", "gpf1-0", "gpf1-1", "gpf1-2", + "gpf1-3", "gpf1-6", "gpf1-7", "gpf2-0", + "gpf2-1", "gpf2-2", "gpf2-3", "gpf2-7", + "gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + lcd_data18: lcd-data-width18 { + samsung,pins = "gpf0-6", "gpf0-7", "gpf1-0", "gpf1-1", + "gpf1-2", "gpf1-3", "gpf1-6", "gpf1-7", + "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3", + "gpf2-6", "gpf2-7", "gpf3-0", "gpf3-1", + "gpf3-2", "gpf3-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + lcd_data24: lcd-data-width24 { + samsung,pins = "gpf0-4", "gpf0-5", "gpf0-6", "gpf0-7", + "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3", + "gpf1-4", "gpf1-5", "gpf1-6", "gpf1-7", + "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3", + "gpf2-4", "gpf2-5", "gpf2-6", "gpf2-7", + "gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; }; pinctrl@11000000 { From 7c1a26a076a8b9d621b6d0a4418b10b15d9346ae Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Wed, 19 Jun 2013 00:41:51 +0900 Subject: [PATCH 39/41] ARM: dts: Add FIMD node to Origen4210 board Added FIMD and display timing node to Origen4210 board. Signed-off-by: Sachin Kamat Signed-off-by: Tushar Behera Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4210-origen.dts | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts index bcf80794caab..4c6c3cd0393a 100644 --- a/arch/arm/boot/dts/exynos4210-origen.dts +++ b/arch/arm/boot/dts/exynos4210-origen.dts @@ -290,4 +290,25 @@ clock-frequency = <24000000>; }; }; + + fimd@11c00000 { + pinctrl-0 = <&lcd_en &lcd_clk &lcd_data24 &pwm0_out>; + pinctrl-names = "default"; + status = "okay"; + }; + + display-timings { + native-mode = <&timing0>; + timing0: timing { + clock-frequency = <50000>; + hactive = <1024>; + vactive = <600>; + hfront-porch = <64>; + hback-porch = <16>; + hsync-len = <48>; + vback-porch = <64>; + vfront-porch = <16>; + vsync-len = <3>; + }; + }; }; From 5f13269130d6798571ffbd9d84dbef0950984c5b Mon Sep 17 00:00:00 2001 From: Tushar Behera Date: Wed, 19 Jun 2013 00:41:56 +0900 Subject: [PATCH 40/41] ARM: dts: Set BUCK7 as always on for Origen board The LDO for LCD driver is currently not handled by any of the drivers. This disables the LDO during booting time. To fix this, the LDO is forced to enabled always. Signed-off-by: Tushar Behera Signed-off-by: Sachin Kamat Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4210-origen.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts index 4c6c3cd0393a..08609b8bdaf1 100644 --- a/arch/arm/boot/dts/exynos4210-origen.dts +++ b/arch/arm/boot/dts/exynos4210-origen.dts @@ -225,6 +225,7 @@ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-boot-on; + regulator-always-on; }; }; }; From 52c76e44f1b8e63474b9ef5455f657c13e983e95 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Wed, 19 Jun 2013 02:40:18 +0900 Subject: [PATCH 41/41] ARM: S3C24XX: update uart addresses in s3c2416-dt auxdata Commit 9ee51f01eee8 (tty: serial/samsung: make register definitions global) removed the S3C2410_PA_UARTX defines that the newly merged s3c2416 dt support still expected. So update mach-s3c2416-dt.c to use the S3C24XX_PA_UART constant until we have support for the common clock framework the the s3c2416-dt. Signed-off-by: Heiko Stuebner Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c24xx/mach-s3c2416-dt.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c b/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c index f5c9072e1e35..f50454a34f72 100644 --- a/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c +++ b/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c @@ -43,13 +43,13 @@ * data from the device tree. */ static const struct of_dev_auxdata s3c2416_auxdata_lookup[] __initconst = { - OF_DEV_AUXDATA("samsung,s3c2440-uart", S3C2410_PA_UART0, + OF_DEV_AUXDATA("samsung,s3c2440-uart", S3C24XX_PA_UART, "s3c2440-uart.0", NULL), - OF_DEV_AUXDATA("samsung,s3c2440-uart", S3C2410_PA_UART1, + OF_DEV_AUXDATA("samsung,s3c2440-uart", S3C24XX_PA_UART + 0x4000, "s3c2440-uart.1", NULL), - OF_DEV_AUXDATA("samsung,s3c2440-uart", S3C2410_PA_UART2, + OF_DEV_AUXDATA("samsung,s3c2440-uart", S3C24XX_PA_UART + 0x8000, "s3c2440-uart.2", NULL), - OF_DEV_AUXDATA("samsung,s3c2440-uart", S3C2443_PA_UART3, + OF_DEV_AUXDATA("samsung,s3c2440-uart", S3C24XX_PA_UART + 0xC000, "s3c2440-uart.3", NULL), OF_DEV_AUXDATA("samsung,s3c6410-sdhci", S3C_PA_HSMMC0, "s3c-sdhci.0", NULL),