mips: sanitize __access_ok()
for one thing, the last argument is always __access_mask and had been such since 2.4.0-test3pre8; for another, it can bloody well be a static inline - -O2 or -Os, __builtin_constant_p() propagates through static inline calls. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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054838bc01
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f0a955f4ee
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@ -128,23 +128,14 @@ static inline bool eva_kernel_access(void)
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* this function, memory access functions may still return -EFAULT.
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*/
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#define __access_mask get_fs().seg
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#define __access_ok(addr, size, mask) \
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({ \
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unsigned long __addr = (unsigned long) (addr); \
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unsigned long __size = size; \
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unsigned long __mask = mask; \
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unsigned long __ok; \
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\
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__chk_user_ptr(addr); \
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__ok = (signed long)(__mask & (__addr | (__addr + __size) | \
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__ua_size(__size))); \
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__ok == 0; \
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})
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static inline int __access_ok(const void __user *p, unsigned long size)
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{
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unsigned long addr = (unsigned long)p;
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return (get_fs().seg & (addr | (addr + size) | __ua_size(size))) == 0;
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}
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#define access_ok(type, addr, size) \
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likely(__access_ok((addr), (size), __access_mask))
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likely(__access_ok((addr), (size)))
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/*
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* put_user: - Write a simple value into user space.
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@ -1200,7 +1200,7 @@ fpu_emul:
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case lwl_op:
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rt = regs->regs[MIPSInst_RT(inst)];
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vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
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if (!access_ok(VERIFY_READ, vaddr, 4)) {
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if (!access_ok(VERIFY_READ, (void __user *)vaddr, 4)) {
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current->thread.cp0_baduaddr = vaddr;
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err = SIGSEGV;
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break;
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@ -1273,7 +1273,7 @@ fpu_emul:
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case lwr_op:
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rt = regs->regs[MIPSInst_RT(inst)];
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vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
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if (!access_ok(VERIFY_READ, vaddr, 4)) {
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if (!access_ok(VERIFY_READ, (void __user *)vaddr, 4)) {
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current->thread.cp0_baduaddr = vaddr;
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err = SIGSEGV;
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break;
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@ -1347,7 +1347,7 @@ fpu_emul:
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case swl_op:
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rt = regs->regs[MIPSInst_RT(inst)];
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vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
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if (!access_ok(VERIFY_WRITE, vaddr, 4)) {
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if (!access_ok(VERIFY_WRITE, (void __user *)vaddr, 4)) {
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current->thread.cp0_baduaddr = vaddr;
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err = SIGSEGV;
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break;
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@ -1417,7 +1417,7 @@ fpu_emul:
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case swr_op:
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rt = regs->regs[MIPSInst_RT(inst)];
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vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
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if (!access_ok(VERIFY_WRITE, vaddr, 4)) {
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if (!access_ok(VERIFY_WRITE, (void __user *)vaddr, 4)) {
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current->thread.cp0_baduaddr = vaddr;
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err = SIGSEGV;
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break;
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@ -1492,7 +1492,7 @@ fpu_emul:
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rt = regs->regs[MIPSInst_RT(inst)];
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vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
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if (!access_ok(VERIFY_READ, vaddr, 8)) {
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if (!access_ok(VERIFY_READ, (void __user *)vaddr, 8)) {
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current->thread.cp0_baduaddr = vaddr;
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err = SIGSEGV;
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break;
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@ -1611,7 +1611,7 @@ fpu_emul:
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rt = regs->regs[MIPSInst_RT(inst)];
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vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
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if (!access_ok(VERIFY_READ, vaddr, 8)) {
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if (!access_ok(VERIFY_READ, (void __user *)vaddr, 8)) {
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current->thread.cp0_baduaddr = vaddr;
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err = SIGSEGV;
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break;
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@ -1730,7 +1730,7 @@ fpu_emul:
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rt = regs->regs[MIPSInst_RT(inst)];
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vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
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if (!access_ok(VERIFY_WRITE, vaddr, 8)) {
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if (!access_ok(VERIFY_WRITE, (void __user *)vaddr, 8)) {
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current->thread.cp0_baduaddr = vaddr;
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err = SIGSEGV;
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break;
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@ -1848,7 +1848,7 @@ fpu_emul:
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rt = regs->regs[MIPSInst_RT(inst)];
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vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
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if (!access_ok(VERIFY_WRITE, vaddr, 8)) {
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if (!access_ok(VERIFY_WRITE, (void __user *)vaddr, 8)) {
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current->thread.cp0_baduaddr = vaddr;
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err = SIGSEGV;
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break;
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@ -1965,7 +1965,7 @@ fpu_emul:
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err = SIGBUS;
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break;
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}
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if (!access_ok(VERIFY_READ, vaddr, 4)) {
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if (!access_ok(VERIFY_READ, (void __user *)vaddr, 4)) {
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current->thread.cp0_baduaddr = vaddr;
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err = SIGBUS;
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break;
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@ -2021,7 +2021,7 @@ fpu_emul:
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err = SIGBUS;
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break;
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}
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if (!access_ok(VERIFY_WRITE, vaddr, 4)) {
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if (!access_ok(VERIFY_WRITE, (void __user *)vaddr, 4)) {
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current->thread.cp0_baduaddr = vaddr;
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err = SIGBUS;
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break;
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@ -2084,7 +2084,7 @@ fpu_emul:
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err = SIGBUS;
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break;
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}
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if (!access_ok(VERIFY_READ, vaddr, 8)) {
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if (!access_ok(VERIFY_READ, (void __user *)vaddr, 8)) {
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current->thread.cp0_baduaddr = vaddr;
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err = SIGBUS;
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break;
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@ -2145,7 +2145,7 @@ fpu_emul:
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err = SIGBUS;
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break;
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}
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if (!access_ok(VERIFY_WRITE, vaddr, 8)) {
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if (!access_ok(VERIFY_WRITE, (void __user *)vaddr, 8)) {
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current->thread.cp0_baduaddr = vaddr;
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err = SIGBUS;
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break;
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@ -98,7 +98,7 @@ static inline int mips_atomic_set(unsigned long addr, unsigned long new)
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if (unlikely(addr & 3))
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return -EINVAL;
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if (unlikely(!access_ok(VERIFY_WRITE, addr, 4)))
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if (unlikely(!access_ok(VERIFY_WRITE, (const void __user *)addr, 4)))
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return -EINVAL;
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if (cpu_has_llsc && R10000_LLSC_WAR) {
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@ -18,7 +18,7 @@ struct stackframe {
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static inline int get_mem(unsigned long addr, unsigned long *result)
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{
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unsigned long *address = (unsigned long *) addr;
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if (!access_ok(VERIFY_READ, addr, sizeof(unsigned long)))
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if (!access_ok(VERIFY_READ, address, sizeof(unsigned long)))
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return -1;
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if (__copy_from_user_inatomic(result, address, sizeof(unsigned long)))
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return -3;
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