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[media] adv7842: obtain free-run mode from the platform_data 

The free-run mode can be board-specific.

Also updated the platform_data in ezkit to ensure that what was the old
default value is now explicitly specified, so the behavior for that board
is unchanged.

Signed-off-by: Martin Bugge <marbugge@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Cc: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
This commit is contained in:
Martin Bugge 2013-12-20 06:02:24 -03:00 committed by Mauro Carvalho Chehab
parent 1961b7203f
commit f0ec17420e
3 changed files with 22 additions and 5 deletions
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2
arch/blackfin/mach-bf609/boards/ezkit.c
View File

@ -1025,6 +1025,8 @@ static struct adv7842_platform_data adv7842_data = {
.ain_sel = ADV7842_AIN10_11_12_NC_SYNC_4_1,
.prim_mode = ADV7842_PRIM_MODE_SDP,
.vid_std_select = ADV7842_SDP_VID_STD_CVBS_SD_4x1,
.hdmi_free_run_enable = 1,
.sdp_free_run_auto = 1,
.i2c_sdp_io = 0x40,
.i2c_sdp = 0x41,
.i2c_cp = 0x42,

11
drivers/media/i2c/adv7842.c
View File

@ -1624,8 +1624,6 @@ static void select_input(struct v4l2_subdev *sd,
/* deinterlacer enabled and 3D comb */
sdp_write_and_or(sd, 0x12, 0xf6, 0x09);
sdp_write(sd, 0xdd, 0x08); /* free run auto */
break;
case ADV7842_MODE_COMP:
@ -2538,7 +2536,14 @@ static int adv7842_core_init(struct v4l2_subdev *sd)
pdata->drive_strength.sync);
/* HDMI free run */
cp_write(sd, 0xba, (pdata->hdmi_free_run_mode << 1) | 0x01);
cp_write_and_or(sd, 0xba, 0xfc, pdata->hdmi_free_run_enable |
(pdata->hdmi_free_run_mode << 1));
/* SPD free run */
sdp_write_and_or(sd, 0xdd, 0xf0, pdata->sdp_free_run_force |
(pdata->sdp_free_run_cbar_en << 1) |
(pdata->sdp_free_run_man_col_en << 2) |
(pdata->sdp_free_run_force << 3));
/* TODO from platform data */
cp_write(sd, 0x69, 0x14); /* Enable CP CSC */

14
include/media/adv7842.h
View File

@ -192,8 +192,18 @@ struct adv7842_platform_data {
unsigned sd_ram_size; /* ram size in MB */
unsigned sd_ram_ddr:1; /* ddr or sdr sdram */
/* Free run */
unsigned hdmi_free_run_mode;
/* HDMI free run, CP-reg 0xBA */
unsigned hdmi_free_run_enable:1;
/* 0 = Mode 0: run when there is no TMDS clock
1 = Mode 1: run when there is no TMDS clock or the
video resolution does not match programmed one. */
unsigned hdmi_free_run_mode:1;
/* SDP free run, CP-reg 0xDD */
unsigned sdp_free_run_auto:1;
unsigned sdp_free_run_man_col_en:1;
unsigned sdp_free_run_cbar_en:1;
unsigned sdp_free_run_force:1;
struct adv7842_sdp_csc_coeff sdp_csc_coeff;