ARM: S3C24XX: move s3c24xx_init_irq to s3c2410_init_irq
The s3c24xx_init_irq function that was the base for all irq inits is now only used to initialize the real s3c2410 irqs. Therefore rename it and also move its declaration from plat/cpu.h to common.h The eint declaration is used by the vast majority of the SoCs and gets therefore placed outside any ifdefs. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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@ -21,6 +21,7 @@ extern void s3c2410_map_io(void);
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extern void s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no);
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extern void s3c2410_init_clocks(int xtal);
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extern void s3c2410_restart(char mode, const char *cmd);
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extern void s3c2410_init_irq(void);
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#else
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#define s3c2410_init_clocks NULL
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#define s3c2410_init_uarts NULL
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@ -509,12 +509,35 @@ err:
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return ERR_PTR(ret);
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}
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/* s3c24xx_init_irq
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*
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* Initialise S3C2410 IRQ system
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*/
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static struct s3c_irq_data init_eint[32] = {
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{ .type = S3C_IRQTYPE_NONE, }, /* reserved */
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{ .type = S3C_IRQTYPE_NONE, }, /* reserved */
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{ .type = S3C_IRQTYPE_NONE, }, /* reserved */
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{ .type = S3C_IRQTYPE_NONE, }, /* reserved */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 4 }, /* EINT4 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 4 }, /* EINT5 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 4 }, /* EINT6 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 4 }, /* EINT7 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT8 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT9 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT10 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT11 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT12 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT13 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT14 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT15 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT16 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT17 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT18 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT19 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT20 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT21 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT22 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT23 */
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};
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static struct s3c_irq_data init_base[32] = {
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#ifdef CONFIG_CPU_S3C2410
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static struct s3c_irq_data init_s3c2410base[32] = {
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{ .type = S3C_IRQTYPE_EINT, }, /* EINT0 */
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{ .type = S3C_IRQTYPE_EINT, }, /* EINT1 */
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{ .type = S3C_IRQTYPE_EINT, }, /* EINT2 */
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@ -549,34 +572,7 @@ static struct s3c_irq_data init_base[32] = {
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{ .type = S3C_IRQTYPE_LEVEL, }, /* ADCPARENT */
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};
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static struct s3c_irq_data init_eint[32] = {
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{ .type = S3C_IRQTYPE_NONE, }, /* reserved */
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{ .type = S3C_IRQTYPE_NONE, }, /* reserved */
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{ .type = S3C_IRQTYPE_NONE, }, /* reserved */
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{ .type = S3C_IRQTYPE_NONE, }, /* reserved */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 4 }, /* EINT4 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 4 }, /* EINT5 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 4 }, /* EINT6 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 4 }, /* EINT7 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT8 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT9 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT10 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT11 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT12 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT13 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT14 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT15 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT16 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT17 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT18 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT19 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT20 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT21 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT22 */
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{ .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT23 */
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};
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static struct s3c_irq_data init_subint[32] = {
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static struct s3c_irq_data init_s3c2410subint[32] = {
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{ .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-RX */
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{ .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-TX */
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{ .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-ERR */
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@ -590,7 +586,7 @@ static struct s3c_irq_data init_subint[32] = {
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{ .type = S3C_IRQTYPE_EDGE, .parent_irq = 31 }, /* ADC */
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};
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void __init s3c24xx_init_irq(void)
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void __init s3c2410_init_irq(void)
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{
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struct s3c_irq_intc *main_intc;
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@ -598,15 +594,16 @@ void __init s3c24xx_init_irq(void)
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init_FIQ(FIQ_START);
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#endif
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main_intc = s3c24xx_init_intc(NULL, &init_base[0], NULL, 0x4a000000);
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main_intc = s3c24xx_init_intc(NULL, &init_s3c2410base[0], NULL, 0x4a000000);
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if (IS_ERR(main_intc)) {
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pr_err("irq: could not create main interrupt controller\n");
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return;
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}
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s3c24xx_init_intc(NULL, &init_subint[0], main_intc, 0x4a000018);
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s3c24xx_init_intc(NULL, &init_s3c2410subint[0], main_intc, 0x4a000018);
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s3c24xx_init_intc(NULL, &init_eint[0], main_intc, 0x560000a4);
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}
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#endif
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#ifdef CONFIG_CPU_S3C2412
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static struct s3c_irq_data init_s3c2412base[32] = {
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@ -238,7 +238,7 @@ static void __init amlm5900_init(void)
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MACHINE_START(AML_M5900, "AML_M5900")
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.atag_offset = 0x100,
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.map_io = amlm5900_map_io,
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.init_irq = s3c24xx_init_irq,
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.init_irq = s3c2410_init_irq,
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.init_machine = amlm5900_init,
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.init_time = samsung_timer_init,
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.restart = s3c2410_restart,
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@ -605,7 +605,7 @@ MACHINE_START(BAST, "Simtec-BAST")
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/* Maintainer: Ben Dooks <ben@simtec.co.uk> */
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.atag_offset = 0x100,
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.map_io = bast_map_io,
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.init_irq = s3c24xx_init_irq,
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.init_irq = s3c2410_init_irq,
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.init_machine = bast_init,
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.init_time = samsung_timer_init,
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.restart = s3c2410_restart,
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@ -667,11 +667,6 @@ static void __init h1940_reserve(void)
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memblock_reserve(0x30081000, 0x1000);
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}
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static void __init h1940_init_irq(void)
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{
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s3c24xx_init_irq();
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}
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static void __init h1940_init(void)
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{
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u32 tmp;
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@ -740,7 +735,7 @@ MACHINE_START(H1940, "IPAQ-H1940")
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.atag_offset = 0x100,
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.map_io = h1940_map_io,
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.reserve = h1940_reserve,
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.init_irq = h1940_init_irq,
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.init_irq = s3c2410_init_irq,
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.init_machine = h1940_init,
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.init_time = samsung_timer_init,
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.restart = s3c2410_restart,
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@ -592,7 +592,7 @@ MACHINE_START(N30, "Acer-N30")
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.atag_offset = 0x100,
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.init_time = samsung_timer_init,
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.init_machine = n30_init,
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.init_irq = s3c24xx_init_irq,
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.init_irq = s3c2410_init_irq,
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.map_io = n30_map_io,
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.restart = s3c2410_restart,
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MACHINE_END
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@ -603,7 +603,7 @@ MACHINE_START(N35, "Acer-N35")
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.atag_offset = 0x100,
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.init_time = samsung_timer_init,
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.init_machine = n30_init,
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.init_irq = s3c24xx_init_irq,
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.init_irq = s3c2410_init_irq,
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.map_io = n30_map_io,
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.restart = s3c2410_restart,
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MACHINE_END
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@ -116,7 +116,7 @@ MACHINE_START(OTOM, "Nex Vision - Otom 1.1")
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.atag_offset = 0x100,
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.map_io = otom11_map_io,
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.init_machine = otom11_init,
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.init_irq = s3c24xx_init_irq,
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.init_irq = s3c2410_init_irq,
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.init_time = samsung_timer_init,
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.restart = s3c2410_restart,
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MACHINE_END
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@ -343,7 +343,7 @@ static void __init qt2410_machine_init(void)
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MACHINE_START(QT2410, "QT2410")
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.atag_offset = 0x100,
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.map_io = qt2410_map_io,
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.init_irq = s3c24xx_init_irq,
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.init_irq = s3c2410_init_irq,
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.init_machine = qt2410_machine_init,
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.init_time = samsung_timer_init,
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.restart = s3c2410_restart,
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@ -116,7 +116,7 @@ MACHINE_START(SMDK2410, "SMDK2410") /* @TODO: request a new identifier and switc
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/* Maintainer: Jonas Dietsche */
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.atag_offset = 0x100,
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.map_io = smdk2410_map_io,
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.init_irq = s3c24xx_init_irq,
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.init_irq = s3c2410_init_irq,
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.init_machine = smdk2410_init,
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.init_time = samsung_timer_init,
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.restart = s3c2410_restart,
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@ -149,7 +149,7 @@ static void __init tct_hammer_init(void)
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MACHINE_START(TCT_HAMMER, "TCT_HAMMER")
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.atag_offset = 0x100,
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.map_io = tct_hammer_map_io,
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.init_irq = s3c24xx_init_irq,
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.init_irq = s3c2410_init_irq,
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.init_machine = tct_hammer_init,
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.init_time = samsung_timer_init,
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.restart = s3c2410_restart,
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@ -355,7 +355,7 @@ MACHINE_START(VR1000, "Thorcom-VR1000")
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.atag_offset = 0x100,
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.map_io = vr1000_map_io,
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.init_machine = vr1000_init,
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.init_irq = s3c24xx_init_irq,
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.init_irq = s3c2410_init_irq,
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.init_time = samsung_timer_init,
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.restart = s3c2410_restart,
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MACHINE_END
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@ -183,7 +183,6 @@ extern void s3c_init_cpu(unsigned long idcode,
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/* core initialisation functions */
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extern void s3c24xx_init_irq(void);
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extern void s5p_init_irq(u32 *vic, u32 num_vic);
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extern void s3c24xx_init_io(struct map_desc *mach_desc, int size);
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