Staging: rtl8187se: remove CONFIG_RTL8185B ifdefs

CONFIG_RTL8185B is defined in drivers/staging/rtl8187se/r8180_hw.h.

Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Bartlomiej Zolnierkiewicz 2009-06-28 16:19:10 +02:00 committed by Greg Kroah-Hartman
parent 5474405fd6
commit f19fd33577
9 changed files with 0 additions and 369 deletions

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@ -4,7 +4,6 @@
#EXTRA_CFLAGS += -std=gnu89 #EXTRA_CFLAGS += -std=gnu89
#EXTRA_CFLAGS += -O2 #EXTRA_CFLAGS += -O2
#CC = gcc #CC = gcc
#CFLAGS += -DCONFIG_RTL8185B
#added for EeePC testing #added for EeePC testing
EXTRA_CFLAGS += -DENABLE_IPS EXTRA_CFLAGS += -DENABLE_IPS

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@ -64,7 +64,6 @@
#define DEFAULT_RETRY_DATA 7 #define DEFAULT_RETRY_DATA 7
#define PRISM_HDR_SIZE 64 #define PRISM_HDR_SIZE 64
#ifdef CONFIG_RTL8185B
#define MGNT_QUEUE 0 #define MGNT_QUEUE 0
#define BK_QUEUE 1 #define BK_QUEUE 1
@ -199,7 +198,6 @@ typedef union _ThreeWire{
u16 longData; u16 longData;
}ThreeWireReg; }ThreeWireReg;
#endif
typedef struct buffer typedef struct buffer
{ {
@ -659,7 +657,6 @@ typedef struct r8180_priv
short ack_tx_to_ieee; short ack_tx_to_ieee;
u8 PowerProfile; u8 PowerProfile;
#ifdef CONFIG_RTL8185B
u32 CSMethod; u32 CSMethod;
u8 cck_txpwr_base; u8 cck_txpwr_base;
u8 ofdm_txpwr_base; u8 ofdm_txpwr_base;
@ -675,7 +672,6 @@ typedef struct r8180_priv
u32 IntrMask; u32 IntrMask;
struct ChnlAccessSetting ChannelAccessSetting; struct ChnlAccessSetting ChannelAccessSetting;
#endif
}r8180_priv; }r8180_priv;
#define MANAGE_PRIORITY 0 #define MANAGE_PRIORITY 0

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@ -28,11 +28,9 @@
#define RFCHIPID_MAXIM 4 #define RFCHIPID_MAXIM 4
#define RFCHIPID_GCT 5 #define RFCHIPID_GCT 5
#define RFCHIPID_RTL8225 9 #define RFCHIPID_RTL8225 9
#ifdef CONFIG_RTL8185B
#define RF_ZEBRA2 11 #define RF_ZEBRA2 11
#define EPROM_TXPW_BASE 0x05 #define EPROM_TXPW_BASE 0x05
#define RF_ZEBRA4 12 #define RF_ZEBRA4 12
#endif
#define RFCHIPID_RTL8255 0xa #define RFCHIPID_RTL8255 0xa
#define RF_PARAM 0x19 #define RF_PARAM 0x19
#define RF_PARAM_DIGPHY_SHIFT 0 #define RF_PARAM_DIGPHY_SHIFT 0

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@ -78,9 +78,7 @@ double __extendsfdf2(float a) {return a;}
#include "ieee80211/dot11d.h" #include "ieee80211/dot11d.h"
#ifdef CONFIG_RTL8185B
//#define CONFIG_RTL8180_IO_MAP //#define CONFIG_RTL8180_IO_MAP
#endif
#ifndef PCI_VENDOR_ID_BELKIN #ifndef PCI_VENDOR_ID_BELKIN
#define PCI_VENDOR_ID_BELKIN 0x1799 #define PCI_VENDOR_ID_BELKIN 0x1799
@ -343,47 +341,7 @@ static int proc_get_stats_hw(char *page, char **start,
//struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); //struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
int len = 0; int len = 0;
#ifdef CONFIG_RTL8185B
#else
len += snprintf(page + len, count - len,
"NIC int: %lu\n"
"Total int: %lu\n"
"--------------------\n"
"LP avail desc %d\n"
"NP avail desc %d\n"
"--------------------\n"
"LP phys dma addr %x\n"
"LP NIC ptr %x\n"
"LP virt 32base %x\n"
"LP virt 32tail %x\n"
"--------------------\n"
"NP phys dma addr %x\n"
"NP NIC ptr %x\n"
"NP virt 32base %x\n"
"NP virt 32tail %x\n"
"--------------------\n"
"BP phys dma addr %x\n"
"BP NIC ptr %x\n"
"BP virt 32base %x\n"
"BP virt 32tail %x\n",
priv->stats.ints,
priv->stats.shints,
get_curr_tx_free_desc(dev,LOW_PRIORITY),
get_curr_tx_free_desc(dev,NORM_PRIORITY),
(u32)priv->txvipringdma,
read_nic_dword(dev,TLPDA),
(u32)priv->txvipring,
(u32)priv->txvipringtail,
(u32)priv->txvopringdma,
read_nic_dword(dev,TNPDA),
(u32)priv->txvopring,
(u32)priv->txvopringtail,
(u32)priv->txbeaconringdma,
read_nic_dword(dev,TBDA),
(u32)priv->txbeaconring,
(u32)priv->txbeaconringtail);
#endif
*eof = 1; *eof = 1;
return len; return len;
} }
@ -956,11 +914,7 @@ void check_rxbuf(struct net_device *dev)
struct buffer *buf; struct buffer *buf;
u8 rx_desc_size; u8 rx_desc_size;
#ifdef CONFIG_RTL8185B
rx_desc_size = 8; rx_desc_size = 8;
#else
rx_desc_size = 4;
#endif
if(!priv->rxbuffer) if(!priv->rxbuffer)
DMESGE ("NIC RX ack, but RX queue corrupted!"); DMESGE ("NIC RX ack, but RX queue corrupted!");
@ -1097,11 +1051,7 @@ void fix_rx_fifo(struct net_device *dev)
struct buffer *rxbuf; struct buffer *rxbuf;
u8 rx_desc_size; u8 rx_desc_size;
#ifdef CONFIG_RTL8185B
rx_desc_size = 8; // 4*8 = 32 bytes rx_desc_size = 8; // 4*8 = 32 bytes
#else
rx_desc_size = 4;
#endif
#ifdef DEBUG_RXALLOC #ifdef DEBUG_RXALLOC
DMESG("FIXING RX FIFO"); DMESG("FIXING RX FIFO");
@ -1301,11 +1251,7 @@ void rtl8180_irq_disable(struct net_device *dev)
{ {
struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
#ifdef CONFIG_RTL8185B
write_nic_dword(dev,IMR,0); write_nic_dword(dev,IMR,0);
#else
write_nic_word(dev,INTA_MASK,0);
#endif
force_pci_posting(dev); force_pci_posting(dev);
priv->irq_enabled = 0; priv->irq_enabled = 0;
} }
@ -1597,13 +1543,8 @@ void rtl8180_beacon_tx_enable(struct net_device *dev)
struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
rtl8180_set_mode(dev,EPROM_CMD_CONFIG); rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
#ifdef CONFIG_RTL8185B
priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_BQ); priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_BQ);
write_nic_byte(dev,TPPollStop, priv->dma_poll_mask); write_nic_byte(dev,TPPollStop, priv->dma_poll_mask);
#else
priv->dma_poll_mask &=~(1<<TX_DMA_STOP_BEACON_SHIFT);
write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
#endif
rtl8180_set_mode(dev,EPROM_CMD_NORMAL); rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
} }
@ -1613,13 +1554,8 @@ void rtl8180_beacon_tx_disable(struct net_device *dev)
struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
rtl8180_set_mode(dev,EPROM_CMD_CONFIG); rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
#ifdef CONFIG_RTL8185B
priv->dma_poll_stop_mask |= TPPOLLSTOP_BQ; priv->dma_poll_stop_mask |= TPPOLLSTOP_BQ;
write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask); write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
#else
priv->dma_poll_mask |= (1<<TX_DMA_STOP_BEACON_SHIFT);
write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
#endif
rtl8180_set_mode(dev,EPROM_CMD_NORMAL); rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
} }
@ -1890,13 +1826,8 @@ void free_rx_desc_ring(struct net_device *dev)
int count = priv->rxringcount; int count = priv->rxringcount;
#ifdef CONFIG_RTL8185B
pci_free_consistent(pdev, sizeof(u32)*8*count+256, pci_free_consistent(pdev, sizeof(u32)*8*count+256,
priv->rxring, priv->rxringdma); priv->rxring, priv->rxringdma);
#else
pci_free_consistent(pdev, sizeof(u32)*4*count+256,
priv->rxring, priv->rxringdma);
#endif
buffer_free(dev,&(priv->rxbuffer),priv->rxbuffersize,0); buffer_free(dev,&(priv->rxbuffer),priv->rxbuffersize,0);
} }
@ -1913,11 +1844,7 @@ short alloc_rx_desc_ring(struct net_device *dev, u16 bufsize, int count)
void *buf; void *buf;
u8 rx_desc_size; u8 rx_desc_size;
#ifdef CONFIG_RTL8185B
rx_desc_size = 8; // 4*8 = 32 bytes rx_desc_size = 8; // 4*8 = 32 bytes
#else
rx_desc_size = 4;
#endif
if((bufsize & 0xfff) != bufsize){ if((bufsize & 0xfff) != bufsize){
DMESGE ("RX buffer allocation too large"); DMESGE ("RX buffer allocation too large");
@ -2336,14 +2263,9 @@ void rtl8180_rx(struct net_device *dev)
.freq = IEEE80211_24GHZ_BAND, .freq = IEEE80211_24GHZ_BAND,
}; };
#ifdef CONFIG_RTL8185B
stats.nic_type = NIC_8185B; stats.nic_type = NIC_8185B;
rx_desc_size = 8; rx_desc_size = 8;
#else
stats.nic_type = NIC_8185;
rx_desc_size = 4;
#endif
//printk("receive frame!%d\n",count++); //printk("receive frame!%d\n",count++);
//if (!priv->rxbuffer) DMESG ("EE: NIC RX ack, but RX queue corrupted!"); //if (!priv->rxbuffer) DMESG ("EE: NIC RX ack, but RX queue corrupted!");
//else { //else {
@ -2468,7 +2390,6 @@ void rtl8180_rx(struct net_device *dev)
len = priv->rxbuffersize; len = priv->rxbuffersize;
} }
#ifdef CONFIG_RTL8185B
if(first && last) { if(first && last) {
padding = ((*(priv->rxringtail+3))&(0x04000000))>>26; padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
}else if(first) { }else if(first) {
@ -2480,7 +2401,6 @@ void rtl8180_rx(struct net_device *dev)
padding = 0; padding = 0;
} }
padding = 0; padding = 0;
#endif
priv->rx_prevlen+=len; priv->rx_prevlen+=len;
if(priv->rx_prevlen > MAX_FRAG_THRESHOLD + 100){ if(priv->rx_prevlen > MAX_FRAG_THRESHOLD + 100){
@ -2504,7 +2424,6 @@ void rtl8180_rx(struct net_device *dev)
print_buffer( priv->rxbuffer->buf, len); print_buffer( priv->rxbuffer->buf, len);
#endif #endif
#ifdef CONFIG_RTL8185B
signal=(unsigned char)(((*(priv->rxringtail+3))& (0x00ff0000))>>16); signal=(unsigned char)(((*(priv->rxringtail+3))& (0x00ff0000))>>16);
signal=(signal&0xfe)>>1; // Modify by hikaru 6.6 signal=(signal&0xfe)>>1; // Modify by hikaru 6.6
@ -2515,15 +2434,6 @@ void rtl8180_rx(struct net_device *dev)
rxpower =((char)(((*(priv->rxringtail+4))& (0x00ff0000))>>16))/2 - 42; rxpower =((char)(((*(priv->rxringtail+4))& (0x00ff0000))>>16))/2 - 42;
RSSI = ((u8)(((*(priv->rxringtail+3)) & (0x0000ff00))>> 8)) & (0x7f); RSSI = ((u8)(((*(priv->rxringtail+3)) & (0x0000ff00))>> 8)) & (0x7f);
#else
signal=((*(priv->rxringtail+1))& (0xff0000))>>16;
signal=(signal&0xfe)>>1; // Modify by hikaru 6.6
quality=((*(priv->rxringtail+1)) & (0xff));
stats.mac_time[0] = *(priv->rxringtail+2);
stats.mac_time[1] = *(priv->rxringtail+3);
#endif
rate=((*(priv->rxringtail)) & rate=((*(priv->rxringtail)) &
((1<<23)|(1<<22)|(1<<21)|(1<<20)))>>20; ((1<<23)|(1<<22)|(1<<21)|(1<<20)))>>20;
@ -2732,17 +2642,13 @@ void rtl8180_rx(struct net_device *dev)
DMESG("going to copy current payload %x",len); DMESG("going to copy current payload %x",len);
#endif #endif
if(!priv->rx_skb_complete) { if(!priv->rx_skb_complete) {
#ifdef CONFIG_RTL8185B
if(padding) { if(padding) {
memcpy(skb_put(priv->rx_skb,len), memcpy(skb_put(priv->rx_skb,len),
(((unsigned char *)priv->rxbuffer->buf) + 2),len); (((unsigned char *)priv->rxbuffer->buf) + 2),len);
} else { } else {
#endif
memcpy(skb_put(priv->rx_skb,len), memcpy(skb_put(priv->rx_skb,len),
priv->rxbuffer->buf,len); priv->rxbuffer->buf,len);
#ifdef CONFIG_RTL8185B
} }
#endif
} }
#ifdef DEBUG_RX_SKB #ifdef DEBUG_RX_SKB
DMESG("current fragment skb copy complete"); DMESG("current fragment skb copy complete");
@ -2890,13 +2796,8 @@ void rtl8180_data_hard_stop(struct net_device *dev)
struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
rtl8180_set_mode(dev,EPROM_CMD_CONFIG); rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
#ifdef CONFIG_RTL8185B
priv->dma_poll_stop_mask |= TPPOLLSTOP_AC_VIQ; priv->dma_poll_stop_mask |= TPPOLLSTOP_AC_VIQ;
write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask); write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
#else
priv->dma_poll_mask |= (1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
#endif
rtl8180_set_mode(dev,EPROM_CMD_NORMAL); rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
} }
@ -2906,13 +2807,8 @@ void rtl8180_data_hard_resume(struct net_device *dev)
struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
rtl8180_set_mode(dev,EPROM_CMD_CONFIG); rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
#ifdef CONFIG_RTL8185B
priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_AC_VIQ); priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_AC_VIQ);
write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask); write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
#else
priv->dma_poll_mask &= ~(1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
#endif
rtl8180_set_mode(dev,EPROM_CMD_NORMAL); rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
} }
@ -2941,11 +2837,7 @@ rate)
* the ieee stack, or from the try_wake_queue (again trought * the ieee stack, or from the try_wake_queue (again trought
* the ieee stack. * the ieee stack.
*/ */
#ifdef CONFIG_RTL8185B
priority = AC2Q(skb->priority); priority = AC2Q(skb->priority);
#else
priority = LOW_PRIORITY;
#endif
spin_lock_irqsave(&priv->tx_lock,flags); spin_lock_irqsave(&priv->tx_lock,flags);
if(priv->ieee80211->bHwRadioOff) if(priv->ieee80211->bHwRadioOff)
@ -2992,11 +2884,7 @@ int rtl8180_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)
int priority; int priority;
#ifdef CONFIG_RTL8185B
priority = MANAGE_PRIORITY; priority = MANAGE_PRIORITY;
#else
priority = NORM_PRIORITY;
#endif
spin_lock_irqsave(&priv->tx_lock,flags); spin_lock_irqsave(&priv->tx_lock,flags);
@ -3145,7 +3033,6 @@ short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority,
short ext; short ext;
struct buffer* buflist; struct buffer* buflist;
//unsigned long flags; //unsigned long flags;
#ifdef CONFIG_RTL8185B
struct ieee80211_hdr_3addr *frag_hdr = (struct ieee80211_hdr_3addr *)txbuf; struct ieee80211_hdr_3addr *frag_hdr = (struct ieee80211_hdr_3addr *)txbuf;
u8 dest[ETH_ALEN]; u8 dest[ETH_ALEN];
u8 bUseShortPreamble = 0; u8 bUseShortPreamble = 0;
@ -3158,7 +3045,6 @@ short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority,
u16 ThisFrameTime = 0; u16 ThisFrameTime = 0;
u16 TxDescDuration = 0; u16 TxDescDuration = 0;
u8 ownbit_flag = false; //added by david woo for sync Tx, 2007.12.14 u8 ownbit_flag = false; //added by david woo for sync Tx, 2007.12.14
#endif
switch(priority) { switch(priority) {
case MANAGE_PRIORITY: case MANAGE_PRIORITY:
@ -3368,7 +3254,6 @@ short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority,
if (priv->plcp_preamble_mode==1 && rate!=0) // short mode now, not long! if (priv->plcp_preamble_mode==1 && rate!=0) // short mode now, not long!
// *tail |= (1<<16); // enable short preamble mode. // *tail |= (1<<16); // enable short preamble mode.
#ifdef CONFIG_RTL8185B
if(bCTSEnable) { if(bCTSEnable) {
*tail |= (1<<18); *tail |= (1<<18);
} }
@ -3382,24 +3267,6 @@ short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority,
*(tail+3) |= ((TxDescDuration&0xffff)<<16); //DURATION *(tail+3) |= ((TxDescDuration&0xffff)<<16); //DURATION
// *(tail+3) |= (0xe6<<16); // *(tail+3) |= (0xe6<<16);
*(tail+5) |= (11<<8);//(priv->retry_data<<8); //retry lim ; *(tail+5) |= (11<<8);//(priv->retry_data<<8); //retry lim ;
#else
//Use RTS or not
#ifdef CONFIG_RTL8187B
if ( (len>priv->rts) && priv->rts && priority!=MANAGE_PRIORITY){
#else
if ( (len>priv->rts) && priv->rts && priority==LOW_PRIORITY){
#endif
*tail |= (1<<23); //enalbe RTS function
*tail |= (0<<19); //use 1M bps send RTS packet
AckCtsTime = ComputeTxTime(14, 10,0, 0); // AckCTSLng = 14 use 1M bps send
FrameTime = ComputeTxTime(len + 4, rtl8180_rate2rate(rate), 0, *tail&(1<<16));
// RTS/CTS time is calculate as follow
duration = FrameTime + 3*10 + 2*AckCtsTime; //10us is the SifsTime;
*(tail+1) |= duration; //Need to edit here! ----hikaru
}else{
*(tail+1)= 0; // zeroes the second 32-bits dword of the descriptor
}
#endif
*tail = *tail | ((rate&0xf) << 24); *tail = *tail | ((rate&0xf) << 24);
//DMESG("rate %d",rate); //DMESG("rate %d",rate);
@ -3736,10 +3603,6 @@ void rtl8180_wmm_param_update(struct work_struct * work)
PAC_PARAM pAcParam; PAC_PARAM pAcParam;
u8 i; u8 i;
#ifndef CONFIG_RTL8185B
//for legacy 8185 keep the PARAM unchange.
return;
#else
if(!ieee->current_network.QoS_Enable){ if(!ieee->current_network.QoS_Enable){
//legacy ac_xx_param update //legacy ac_xx_param update
AcParam.longData = 0; AcParam.longData = 0;
@ -3827,7 +3690,6 @@ void rtl8180_wmm_param_update(struct work_struct * work)
} }
ac_param += (sizeof(AC_PARAM)); ac_param += (sizeof(AC_PARAM));
} }
#endif
} }
void rtl8180_tx_irq_wq(struct work_struct *work); void rtl8180_tx_irq_wq(struct work_struct *work);
@ -4019,9 +3881,7 @@ short rtl8180_init(struct net_device *dev)
* packet (is empty) * packet (is empty)
*/ */
#ifdef CONFIG_RTL8185B
priv->RegThreeWireMode = HW_THREE_WIRE_SI; priv->RegThreeWireMode = HW_THREE_WIRE_SI;
#endif
//Add for RF power on power off by lizhaoming 080512 //Add for RF power on power off by lizhaoming 080512
priv->RFChangeInProgress = false; priv->RFChangeInProgress = false;
@ -4244,7 +4104,6 @@ short rtl8180_init(struct net_device *dev)
priv->ieee80211->stop_send_beacons = rtl8180_beacon_tx_disable; priv->ieee80211->stop_send_beacons = rtl8180_beacon_tx_disable;
priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD; priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
#ifdef CONFIG_RTL8185B
priv->MWIEnable = 0; priv->MWIEnable = 0;
priv->ShortRetryLimit = 7; priv->ShortRetryLimit = 7;
@ -4281,18 +4140,15 @@ short rtl8180_init(struct net_device *dev)
IMR_RQoSOK; // <NOTE> ROK and RQoSOK are mutually exclusive, so, we must handle RQoSOK interrupt to receive QoS frames, 2005.12.09, by rcnjko. IMR_RQoSOK; // <NOTE> ROK and RQoSOK are mutually exclusive, so, we must handle RQoSOK interrupt to receive QoS frames, 2005.12.09, by rcnjko.
priv->InitialGain = 6; priv->InitialGain = 6;
#endif
hw_version =( read_nic_dword(dev, TCR) & TCR_HWVERID_MASK)>>TCR_HWVERID_SHIFT; hw_version =( read_nic_dword(dev, TCR) & TCR_HWVERID_MASK)>>TCR_HWVERID_SHIFT;
switch (hw_version){ switch (hw_version){
#ifdef CONFIG_RTL8185B
case HW_VERID_R8185B_B: case HW_VERID_R8185B_B:
priv->card_8185 = VERSION_8187S_C; priv->card_8185 = VERSION_8187S_C;
DMESG("MAC controller is a RTL8187SE b/g"); DMESG("MAC controller is a RTL8187SE b/g");
priv->phy_ver = 2; priv->phy_ver = 2;
break; break;
#endif
case HW_VERID_R8185_ABC: case HW_VERID_R8185_ABC:
DMESG("MAC controller is a RTL8185 b/g"); DMESG("MAC controller is a RTL8185 b/g");
priv->card_8185 = 1; priv->card_8185 = 1;
@ -4330,15 +4186,12 @@ short rtl8180_init(struct net_device *dev)
/* you should not found any 8185 Ver B Card */ /* you should not found any 8185 Ver B Card */
priv->card_8185_Bversion = 0; priv->card_8185_Bversion = 0;
#ifdef CONFIG_RTL8185B
// just for sync 85 // just for sync 85
priv->card_type = PCI; priv->card_type = PCI;
DMESG("This is a PCI NIC"); DMESG("This is a PCI NIC");
#endif
priv->enable_gpio0 = 0; priv->enable_gpio0 = 0;
//by amy for antenna //by amy for antenna
#ifdef CONFIG_RTL8185B
usValue = eprom_read(dev, EEPROM_SW_REVD_OFFSET); usValue = eprom_read(dev, EEPROM_SW_REVD_OFFSET);
DMESG("usValue is 0x%x\n",usValue); DMESG("usValue is 0x%x\n",usValue);
//3Read AntennaDiversity //3Read AntennaDiversity
@ -4391,7 +4244,6 @@ short rtl8180_init(struct net_device *dev)
priv->bDefaultAntenna1 = ((priv->RegDefaultAntenna== 2) ? true : false); priv->bDefaultAntenna1 = ((priv->RegDefaultAntenna== 2) ? true : false);
} }
//printk("bDefaultAntenna1 = %d\n", priv->bDefaultAntenna1); //printk("bDefaultAntenna1 = %d\n", priv->bDefaultAntenna1);
#endif
//by amy for antenna //by amy for antenna
/* rtl8185 can calc plcp len in HW.*/ /* rtl8185 can calc plcp len in HW.*/
priv->hw_plcp_len = 1; priv->hw_plcp_len = 1;
@ -4460,11 +4312,9 @@ short rtl8180_init(struct net_device *dev)
priv->bTxPowerTrack = true; priv->bTxPowerTrack = true;
//by amy 080312} //by amy 080312}
#ifdef CONFIG_RTL8185B
word = eprom_read(dev,EPROM_TXPW_BASE); word = eprom_read(dev,EPROM_TXPW_BASE);
priv->cck_txpwr_base = word & 0xf; priv->cck_txpwr_base = word & 0xf;
priv->ofdm_txpwr_base = (word>>4) & 0xf; priv->ofdm_txpwr_base = (word>>4) & 0xf;
#endif
version = eprom_read(dev,EPROM_VERSION); version = eprom_read(dev,EPROM_VERSION);
DMESG("EEPROM version %x",version); DMESG("EEPROM version %x",version);
@ -4500,7 +4350,6 @@ DMESG output to andreamrl@tiscali.it THANKS");
priv->rf_chip = 0xff & eprom_read(dev,RFCHIPID); priv->rf_chip = 0xff & eprom_read(dev,RFCHIPID);
} }
#ifdef CONFIG_RTL8185B
priv->rf_chip = RF_ZEBRA4; priv->rf_chip = RF_ZEBRA4;
priv->rf_sleep = rtl8225z4_rf_sleep; priv->rf_sleep = rtl8225z4_rf_sleep;
priv->rf_wakeup = rtl8225z4_rf_wakeup; priv->rf_wakeup = rtl8225z4_rf_wakeup;
@ -4516,121 +4365,6 @@ DMESG output to andreamrl@tiscali.it THANKS");
//priv->rf_sleep = rtl8225_rf_sleep; //priv->rf_sleep = rtl8225_rf_sleep;
//priv->rf_wakeup = rtl8225_rf_wakeup; //priv->rf_wakeup = rtl8225_rf_wakeup;
#else
/* check RF frontend chipset */
switch (priv->rf_chip) {
case RFCHIPID_RTL8225:
if(priv->card_8185){
DMESG("Card reports RF frontend Realtek 8225");
DMESGW("This driver has EXPERIMENTAL support for this chipset.");
DMESGW("use it with care and at your own risk and");
DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO andreamrl@tiscali.it");
priv->rf_close = rtl8225_rf_close;
priv->rf_init = rtl8225_rf_init;
priv->rf_set_chan = rtl8225_rf_set_chan;
priv->rf_set_sens = NULL;
priv->rf_sleep = rtl8225_rf_sleep;
priv->rf_wakeup = rtl8225_rf_wakeup;
}else{
DMESGW("Detected RTL8225 radio on a card recognized as RTL8180");
DMESGW("This could not be... something went wrong....");
return -ENODEV;
}
break;
case RFCHIPID_RTL8255:
if(priv->card_8185){
DMESG("Card reports RF frontend Realtek 8255");
DMESGW("This driver has EXPERIMENTAL support for this chipset.");
DMESGW("use it with care and at your own risk and");
DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO andreamrl@tiscali.it");
priv->rf_close = rtl8255_rf_close;
priv->rf_init = rtl8255_rf_init;
priv->rf_set_chan = rtl8255_rf_set_chan;
priv->rf_set_sens = NULL;
priv->rf_sleep = NULL;
priv->rf_wakeup = NULL;
}else{
DMESGW("Detected RTL8255 radio on a card recognized as RTL8180");
DMESGW("This could not be... something went wrong....");
return -ENODEV;
}
break;
case RFCHIPID_INTERSIL:
DMESGW("Card reports RF frontend by Intersil.");
DMESGW("This driver has NO support for this chipset.");
return -ENODEV;
break;
case RFCHIPID_RFMD:
DMESGW("Card reports RF frontend by RFMD.");
DMESGW("This driver has NO support for this chipset.");
return -ENODEV;
break;
case RFCHIPID_GCT:
DMESGW("Card reports RF frontend by GCT.");
DMESGW("This driver has EXPERIMENTAL support for this chipset.");
DMESGW("use it with care and at your own risk and");
DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO andreamrl@tiscali.it");
priv->rf_close = gct_rf_close;
priv->rf_init = gct_rf_init;
priv->rf_set_chan = gct_rf_set_chan;
priv->rf_set_sens = NULL;
priv->rf_sleep = NULL;
priv->rf_wakeup = NULL;
break;
case RFCHIPID_MAXIM:
DMESGW("Card reports RF frontend by MAXIM.");
DMESGW("This driver has EXPERIMENTAL support for this chipset.");
DMESGW("use it with care and at your own risk and");
DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO andreamrl@tiscali.it");
priv->rf_close = maxim_rf_close;
priv->rf_init = maxim_rf_init;
priv->rf_set_chan = maxim_rf_set_chan;
priv->rf_set_sens = NULL;
priv->rf_sleep = NULL;
priv->rf_wakeup = NULL;
break;
case RFCHIPID_PHILIPS:
DMESG("Card reports RF frontend by Philips.");
DMESG("OK! Philips SA2400 radio chipset is supported.");
priv->rf_close = sa2400_rf_close;
priv->rf_init = sa2400_rf_init;
priv->rf_set_chan = sa2400_rf_set_chan;
priv->rf_set_sens = sa2400_rf_set_sens;
priv->sens = SA2400_RF_DEF_SENS; /* default sensitivity */
priv->max_sens = SA2400_RF_MAX_SENS; /* maximum sensitivity */
priv->rf_sleep = NULL;
priv->rf_wakeup = NULL;
if(priv->digphy){
DMESGW("Digital PHY found");
DMESGW("Philips DIGITAL PHY is untested! *Please*\
report success/failure to <andreamrl@tiscali.it>");
}else{
DMESG ("Analog PHY found");
}
break;
default:
DMESGW("Unknown RF module %x",priv->rf_chip);
DMESGW("Exiting...");
return -1;
}
#endif
if(!priv->card_8185){ if(!priv->card_8185){
@ -5140,11 +4874,7 @@ void rtl8180_start_tx_beacon(struct net_device *dev)
rtl8180_set_mode(dev, EPROM_CMD_NORMAL); rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
// rtl8180_beacon_tx_enable(dev); // rtl8180_beacon_tx_enable(dev);
#ifdef CONFIG_RTL8185B
rtl8185b_irq_enable(dev); rtl8185b_irq_enable(dev);
#else
rtl8180_irq_enable(dev);
#endif
/* VV !!!!!!!!!! VV*/ /* VV !!!!!!!!!! VV*/
/* /*
rtl8180_set_mode(dev,EPROM_CMD_CONFIG); rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
@ -5434,15 +5164,9 @@ int _rtl8180_up(struct net_device *dev)
priv->up=1; priv->up=1;
DMESG("Bringing up iface"); DMESG("Bringing up iface");
#ifdef CONFIG_RTL8185B
rtl8185b_adapter_start(dev); rtl8185b_adapter_start(dev);
rtl8185b_rx_enable(dev); rtl8185b_rx_enable(dev);
rtl8185b_tx_enable(dev); rtl8185b_tx_enable(dev);
#else
rtl8180_adapter_start(dev);
rtl8180_rx_enable(dev);
rtl8180_tx_enable(dev);
#endif
#ifdef ENABLE_IPS #ifdef ENABLE_IPS
if(priv->bInactivePs){ if(priv->bInactivePs){
if(priv->ieee80211->iw_mode == IW_MODE_ADHOC) if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
@ -5768,12 +5492,10 @@ static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
#endif //end #ifdef RTL_IO_MAP #endif //end #ifdef RTL_IO_MAP
#ifdef CONFIG_RTL8185B
//pci_read_config_byte(pdev, 0x05, ptr); //pci_read_config_byte(pdev, 0x05, ptr);
//pci_write_config_byte(pdev, 0x05, (*ptr) & (~0x04)); //pci_write_config_byte(pdev, 0x05, (*ptr) & (~0x04));
pci_read_config_byte(pdev, 0x05, &unit); pci_read_config_byte(pdev, 0x05, &unit);
pci_write_config_byte(pdev, 0x05, unit & (~0x04)); pci_write_config_byte(pdev, 0x05, unit & (~0x04));
#endif
dev->irq = pdev->irq; dev->irq = pdev->irq;
priv->irq = 0; priv->irq = 0;
@ -6220,14 +5942,9 @@ irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs)
spin_lock_irqsave(&priv->irq_th_lock,flags); spin_lock_irqsave(&priv->irq_th_lock,flags);
#ifdef CONFIG_RTL8185B
//ISR: 4bytes //ISR: 4bytes
inta = read_nic_dword(dev, ISR);// & priv->IntrMask; inta = read_nic_dword(dev, ISR);// & priv->IntrMask;
write_nic_dword(dev,ISR,inta); // reset int situation write_nic_dword(dev,ISR,inta); // reset int situation
#else
inta = read_nic_word(dev,INTA) & priv->irq_mask;
write_nic_word(dev,INTA,inta); // reset int situation
#endif
priv->stats.shints++; priv->stats.shints++;
@ -6307,7 +6024,6 @@ irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs)
DMESGW("RX error int"); DMESGW("RX error int");
#endif #endif
} }
#ifdef CONFIG_RTL8185B
if(inta & ISR_TBKDER){ //corresponding to BK_PRIORITY if(inta & ISR_TBKDER){ //corresponding to BK_PRIORITY
priv->stats.txbkperr++; priv->stats.txbkperr++;
priv->ieee80211->stats.tx_errors++; priv->ieee80211->stats.tx_errors++;
@ -6329,7 +6045,6 @@ irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs)
//tasklet_schedule(&priv->irq_tx_tasklet); //tasklet_schedule(&priv->irq_tx_tasklet);
rtl8180_try_wake_queue(dev, BE_PRIORITY); rtl8180_try_wake_queue(dev, BE_PRIORITY);
} }
#endif
if(inta & ISR_TNPDER){ //corresponding to VO_PRIORITY if(inta & ISR_TNPDER){ //corresponding to VO_PRIORITY
priv->stats.txnperr++; priv->stats.txnperr++;
priv->ieee80211->stats.tx_errors++; priv->ieee80211->stats.tx_errors++;
@ -6338,9 +6053,7 @@ irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs)
#endif #endif
//tasklet_schedule(&priv->irq_tx_tasklet); //tasklet_schedule(&priv->irq_tx_tasklet);
rtl8180_tx_isr(dev,NORM_PRIORITY,1); rtl8180_tx_isr(dev,NORM_PRIORITY,1);
#ifdef CONFIG_RTL8185B
rtl8180_try_wake_queue(dev, NORM_PRIORITY); rtl8180_try_wake_queue(dev, NORM_PRIORITY);
#endif
} }
if(inta & ISR_TLPDER){ //corresponding to VI_PRIORITY if(inta & ISR_TLPDER){ //corresponding to VI_PRIORITY
@ -6421,7 +6134,6 @@ irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs)
rtl8180_try_wake_queue(dev, LOW_PRIORITY); rtl8180_try_wake_queue(dev, LOW_PRIORITY);
} }
#ifdef CONFIG_RTL8185B
if(inta & ISR_TBKDOK){ //corresponding to BK_PRIORITY if(inta & ISR_TBKDOK){ //corresponding to BK_PRIORITY
priv->stats.txbkpokint++; priv->stats.txbkpokint++;
#ifdef DEBUG_TX #ifdef DEBUG_TX
@ -6445,7 +6157,6 @@ irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs)
rtl8180_tx_isr(dev,BE_PRIORITY,0); rtl8180_tx_isr(dev,BE_PRIORITY,0);
rtl8180_try_wake_queue(dev, BE_PRIORITY); rtl8180_try_wake_queue(dev, BE_PRIORITY);
} }
#endif
force_pci_posting(dev); force_pci_posting(dev);
spin_unlock_irqrestore(&priv->irq_th_lock,flags); spin_unlock_irqrestore(&priv->irq_th_lock,flags);

View File

@ -1315,14 +1315,12 @@ SetAntenna8185(
{ {
case RF_ZEBRA2: case RF_ZEBRA2:
case RF_ZEBRA4: case RF_ZEBRA4:
#ifdef CONFIG_RTL8185B
// Mac register, main antenna // Mac register, main antenna
write_nic_byte(dev, ANTSEL, 0x03); write_nic_byte(dev, ANTSEL, 0x03);
//base band //base band
write_phy_cck(dev,0x11, 0x9b); // Config CCK RX antenna. write_phy_cck(dev,0x11, 0x9b); // Config CCK RX antenna.
write_phy_ofdm(dev, 0x0d, 0x5c); // Config OFDM RX antenna. write_phy_ofdm(dev, 0x0d, 0x5c); // Config OFDM RX antenna.
#endif
bAntennaSwitched = true; bAntennaSwitched = true;
break; break;
@ -1338,13 +1336,11 @@ SetAntenna8185(
{ {
case RF_ZEBRA2: case RF_ZEBRA2:
case RF_ZEBRA4: case RF_ZEBRA4:
#ifdef CONFIG_RTL8185B
// Mac register, aux antenna // Mac register, aux antenna
write_nic_byte(dev, ANTSEL, 0x00); write_nic_byte(dev, ANTSEL, 0x00);
//base band //base band
write_phy_cck(dev, 0x11, 0xbb); // Config CCK RX antenna. write_phy_cck(dev, 0x11, 0xbb); // Config CCK RX antenna.
write_phy_ofdm(dev, 0x0d, 0x54); // Config OFDM RX antenna. write_phy_ofdm(dev, 0x0d, 0x54); // Config OFDM RX antenna.
#endif
bAntennaSwitched = true; bAntennaSwitched = true;
break; break;

View File

@ -20,7 +20,6 @@
#ifndef R8180_HW #ifndef R8180_HW
#define R8180_HW #define R8180_HW
#define CONFIG_RTL8185B //support for rtl8185B, xiong-2006-11-15
#define BIT0 0x00000001 #define BIT0 0x00000001
#define BIT1 0x00000002 #define BIT1 0x00000002
@ -250,7 +249,6 @@
#define CR 0x0037 #define CR 0x0037
#ifdef CONFIG_RTL8185B
#define RF_SW_CONFIG 0x8 // store data which is transmitted to RF for driver #define RF_SW_CONFIG 0x8 // store data which is transmitted to RF for driver
#define RF_SW_CFG_SI BIT1 #define RF_SW_CFG_SI BIT1
#define PIFS 0x2C // PCF InterFrame Spacing Timer Setting. #define PIFS 0x2C // PCF InterFrame Spacing Timer Setting.
@ -260,18 +258,6 @@
#define IMR 0x006C #define IMR 0x006C
#define ISR 0x003C #define ISR 0x003C
#else
#define BRSR 0x002C
#define BRSR_END 0x002D
/* 0x0034 - 0x0034 - reserved */
#define EIFS 0x0035
#define IMR 0x003C
#define IMR_END 0x003D
#define ISR 0x003E
#define ISR_END 0x003F
#endif
#define TCR 0x0040 #define TCR 0x0040
#define TCR_END 0x0043 #define TCR_END 0x0043
@ -298,7 +284,6 @@
#define CONFIG3 0x0059 #define CONFIG3 0x0059
#define CONFIG4 0x005A #define CONFIG4 0x005A
#ifdef CONFIG_RTL8185B
// SD3 szuyitasi: Mac0x57= CC -> B0 Mac0x60= D1 -> C6 // SD3 szuyitasi: Mac0x57= CC -> B0 Mac0x60= D1 -> C6
// Mac0x60 = 0x000004C6 power save parameters // Mac0x60 = 0x000004C6 power save parameters
#define ANAPARM_ASIC_ON 0xB0054D00 #define ANAPARM_ASIC_ON 0xB0054D00
@ -306,7 +291,6 @@
#define ANAPARM_ON ANAPARM_ASIC_ON #define ANAPARM_ON ANAPARM_ASIC_ON
#define ANAPARM2_ON ANAPARM2_ASIC_ON #define ANAPARM2_ON ANAPARM2_ASIC_ON
#endif
#define TESTR 0x005B #define TESTR 0x005B
@ -461,12 +445,7 @@
#define FER 0x00F0 #define FER 0x00F0
#define FER_END 0x00F3 #define FER_END 0x00F3
#ifdef CONFIG_RTL8185B
#define FEMR 0x1D4 // Function Event Mask register #define FEMR 0x1D4 // Function Event Mask register
#else
#define FEMR 0x00F4
#define FEMR_END 0x00F7
#endif
#define FPSR 0x00F8 #define FPSR 0x00F8
#define FPSR_END 0x00FB #define FPSR_END 0x00FB
@ -496,7 +475,6 @@
#define CR_TE ((1<< 2)) #define CR_TE ((1<< 2))
#define CR_MulRW ((1<< 0)) #define CR_MulRW ((1<< 0))
#ifdef CONFIG_RTL8185B
#define IMR_Dot11hInt ((1<< 25)) // 802.11h Measurement Interrupt #define IMR_Dot11hInt ((1<< 25)) // 802.11h Measurement Interrupt
#define IMR_BcnDmaInt ((1<< 24)) // Beacon DMA Interrupt // What differenct between BcnDmaInt and BcnInt??? #define IMR_BcnDmaInt ((1<< 24)) // Beacon DMA Interrupt // What differenct between BcnDmaInt and BcnInt???
#define IMR_WakeInt ((1<< 23)) // Wake Up Interrupt #define IMR_WakeInt ((1<< 23)) // Wake Up Interrupt
@ -559,49 +537,12 @@
#define ISR_TimeOut ISR_TimeOut1 #define ISR_TimeOut ISR_TimeOut1
#define ISR_RXFOVW ISR_FOVW #define ISR_RXFOVW ISR_FOVW
#else
#define IMR_TXFOVW ((1<<15))
#define IMR_TimeOut ((1<<14))
#define IMR_BcnInt ((1<<13))
#define IMR_ATIMInt ((1<<12))
#define IMR_TBDER ((1<<11))
#define IMR_TBDOK ((1<<10))
#define IMR_THPDER ((1<< 9))
#define IMR_THPDOK ((1<< 8))
#define IMR_TNPDER ((1<< 7))
#define IMR_TNPDOK ((1<< 6))
#define IMR_RXFOVW ((1<< 5))
#define IMR_RDU ((1<< 4))
#define IMR_TLPDER ((1<< 3))
#define IMR_TLPDOK ((1<< 2))
#define IMR_RER ((1<< 1))
#define IMR_ROK ((1<< 0))
#define ISR_TXFOVW ((1<<15))
#define ISR_TimeOut ((1<<14))
#define ISR_BcnInt ((1<<13))
#define ISR_ATIMInt ((1<<12))
#define ISR_TBDER ((1<<11))
#define ISR_TBDOK ((1<<10))
#define ISR_THPDER ((1<< 9))
#define ISR_THPDOK ((1<< 8))
#define ISR_TNPDER ((1<< 7))
#define ISR_TNPDOK ((1<< 6))
#define ISR_RXFOVW ((1<< 5))
#define ISR_RDU ((1<< 4))
#define ISR_TLPDER ((1<< 3))
#define ISR_TLPDOK ((1<< 2))
#define ISR_RER ((1<< 1))
#define ISR_ROK ((1<< 0))
#endif
#define HW_VERID_R8180_F 3 #define HW_VERID_R8180_F 3
#define HW_VERID_R8180_ABCD 2 #define HW_VERID_R8180_ABCD 2
#define HW_VERID_R8185_ABC 4 #define HW_VERID_R8185_ABC 4
#define HW_VERID_R8185_D 5 #define HW_VERID_R8185_D 5
#ifdef CONFIG_RTL8185B
#define HW_VERID_R8185B_B 6 #define HW_VERID_R8185B_B 6
#endif
#define TCR_CWMIN ((1<<31)) #define TCR_CWMIN ((1<<31))
#define TCR_SWSEQ ((1<<30)) #define TCR_SWSEQ ((1<<30))
@ -759,7 +700,6 @@
#define FFER_INTR ((1<<15)) #define FFER_INTR ((1<<15))
#define FFER_GWAKE ((1<< 4)) #define FFER_GWAKE ((1<< 4))
#ifdef CONFIG_RTL8185B
// Three wire mode. // Three wire mode.
#define SW_THREE_WIRE 0 #define SW_THREE_WIRE 0
#define HW_THREE_WIRE 2 #define HW_THREE_WIRE 2
@ -933,6 +873,5 @@
//YJ,add for Country IE, 080630 //YJ,add for Country IE, 080630
#define EEPROM_COUNTRY_CODE 0x2E #define EEPROM_COUNTRY_CODE 0x2E
//YJ,add,080630,end //YJ,add,080630,end
#endif
#endif #endif

View File

@ -19,7 +19,6 @@
#define RTL8225_ANAPARAM_SLEEP 0xa00bab59 #define RTL8225_ANAPARAM_SLEEP 0xa00bab59
#define RTL8225_ANAPARAM2_SLEEP 0x840dec11 #define RTL8225_ANAPARAM2_SLEEP 0x840dec11
#ifdef CONFIG_RTL8185B
void rtl8225z2_rf_init(struct net_device *dev); void rtl8225z2_rf_init(struct net_device *dev);
void rtl8225z2_rf_set_chan(struct net_device *dev,short ch); void rtl8225z2_rf_set_chan(struct net_device *dev,short ch);
void rtl8225z2_rf_close(struct net_device *dev); void rtl8225z2_rf_close(struct net_device *dev);
@ -30,7 +29,6 @@ void rtl8225_host_usb_init(struct net_device *dev);
void write_rtl8225(struct net_device *dev, u8 adr, u16 data); void write_rtl8225(struct net_device *dev, u8 adr, u16 data);
void RF_WriteReg(struct net_device *dev, u8 offset, u32 data); void RF_WriteReg(struct net_device *dev, u8 offset, u32 data);
u32 RF_ReadReg(struct net_device *dev, u8 offset); u32 RF_ReadReg(struct net_device *dev, u8 offset);
#endif
void rtl8225_rf_init(struct net_device *dev); void rtl8225_rf_init(struct net_device *dev);
void rtl8225_rf_set_chan(struct net_device *dev,short ch); void rtl8225_rf_set_chan(struct net_device *dev,short ch);
void rtl8225_rf_close(struct net_device *dev); void rtl8225_rf_close(struct net_device *dev);

View File

@ -16,7 +16,6 @@
#include "ieee80211/dot11d.h" #include "ieee80211/dot11d.h"
#ifdef CONFIG_RTL8185B
extern u8 rtl8225_agc[]; extern u8 rtl8225_agc[];
@ -574,7 +573,6 @@ void rtl8225z2_SetTXPowerLevel(struct net_device *dev, short ch)
max_ofdm_power_level = 25; // 12 -> 25 max_ofdm_power_level = 25; // 12 -> 25
min_ofdm_power_level = 10; min_ofdm_power_level = 10;
#ifdef CONFIG_RTL8185B
if(cck_power_level > 35) if(cck_power_level > 35)
{ {
@ -587,7 +585,6 @@ void rtl8225z2_SetTXPowerLevel(struct net_device *dev, short ch)
//printk("CCK TX power is %x\n", (ZEBRA2_CCK_OFDM_GAIN_SETTING[cck_power_level])); //printk("CCK TX power is %x\n", (ZEBRA2_CCK_OFDM_GAIN_SETTING[cck_power_level]));
force_pci_posting(dev); force_pci_posting(dev);
mdelay(1); mdelay(1);
#endif
/* OFDM power setting */ /* OFDM power setting */
// Old: // Old:
// if(ofdm_power_level > max_ofdm_power_level) // if(ofdm_power_level > max_ofdm_power_level)
@ -1536,5 +1533,4 @@ void rtl8225z4_rf_wakeup(struct net_device *dev)
//printk("=========>%s()\n", __func__); //printk("=========>%s()\n", __func__);
MgntActSet_RF_State(dev, eRfOn, RF_CHANGE_BY_PS); MgntActSet_RF_State(dev, eRfOn, RF_CHANGE_BY_PS);
} }
#endif

View File

@ -34,7 +34,6 @@ Notes:
#include "ieee80211/dot11d.h" #include "ieee80211/dot11d.h"
#ifdef CONFIG_RTL8185B
//#define CONFIG_RTL8180_IO_MAP //#define CONFIG_RTL8180_IO_MAP
@ -3139,4 +3138,3 @@ void rtl8185b_tx_enable(struct net_device *dev)
} }
#endif