Fourth Round of Renesas ARM based SoC fixes for v3.12

* Remove unused #gpio-ranges-cells DT property
 
 * Remove usage of deprecated #gpio-range-cells DT property
   from GPIO R-Car
 
   Property was deprecated in v3.11-rc2
 
 * Correct ether pinctl naming for armadillo800eva board
 
   Regression introduced in v3.10-rc5
 
 * Add Micrel KSZ8041 PHY fixup to lager board
 
   This resolves a problem that has been present since 3.11-rc2
 
 * Update SDHI DT compatibility string to the <unit>-<soc> format
 
   This makes compatibility strings consistent across all renesas
   hardware which currently supports DT.
 
   The bindings which are being updated where intorodiced on
   a per-SoC basis starting in v3.8-rc7. They may have
   been internally consistent when originally added.
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Merge tag 'renesas-fixes4-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes

From Simon Horman:
Fourth Round of Renesas ARM based SoC fixes for v3.12

* Remove unused #gpio-ranges-cells DT property

* Remove usage of deprecated #gpio-range-cells DT property
  from GPIO R-Car

  Property was deprecated in v3.11-rc2

* Correct ether pinctl naming for armadillo800eva board

  Regression introduced in v3.10-rc5

* Add Micrel KSZ8041 PHY fixup to lager board

  This resolves a problem that has been present since 3.11-rc2

* Update SDHI DT compatibility string to the <unit>-<soc> format

  This makes compatibility strings consistent across all renesas
  hardware which currently supports DT.

  The bindings which are being updated where intorodiced on
  a per-SoC basis starting in v3.8-rc7. They may have
  been internally consistent when originally added.

* tag 'renesas-fixes4-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: Remove #gpio-ranges-cells DT property
  gpio: rcar: Remove #gpio-range-cells DT property usage
  ARM: shmobile: armadillo: fixup ether pinctrl naming
  ARM: shmobile: Lager: add Micrel KSZ8041 PHY fixup
  ARM: shmobile: update SDHI DT compatibility string to the <unit>-<soc> format

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2013-09-30 09:24:20 -07:00
commit f1bb7cd5a1
10 changed files with 59 additions and 35 deletions

View File

@ -9,12 +9,15 @@ compulsory and any optional properties, common to all SD/MMC drivers, as
described in mmc.txt, can be used. Additionally the following tmio_mmc-specific
optional bindings can be used.
Required properties:
- compatible: "renesas,sdhi-shmobile" - a generic sh-mobile SDHI unit
"renesas,sdhi-sh7372" - SDHI IP on SH7372 SoC
"renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC
"renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
"renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC
"renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC
"renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC
"renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC
Optional properties:
- toshiba,mmc-wrprotect-disable: write-protect detection is unavailable
When used with Renesas SDHI hardware, the following compatibility strings
configure various model-specific properties:
"renesas,sh7372-sdhi": (default) compatible with SH7372
"renesas,r8a7740-sdhi": compatible with R8A7740: certain MMC/SD commands have to
wait for the interface to become idle.

View File

@ -193,7 +193,7 @@
};
sdhi0: sdhi@ee100000 {
compatible = "renesas,r8a73a4-sdhi";
compatible = "renesas,sdhi-r8a73a4";
reg = <0 0xee100000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 165 4>;
@ -202,7 +202,7 @@
};
sdhi1: sdhi@ee120000 {
compatible = "renesas,r8a73a4-sdhi";
compatible = "renesas,sdhi-r8a73a4";
reg = <0 0xee120000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 166 4>;
@ -211,7 +211,7 @@
};
sdhi2: sdhi@ee140000 {
compatible = "renesas,r8a73a4-sdhi";
compatible = "renesas,sdhi-r8a73a4";
reg = <0 0xee140000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 167 4>;

View File

@ -96,6 +96,5 @@
pfc: pfc@fffc0000 {
compatible = "renesas,pfc-r8a7778";
reg = <0xfffc000 0x118>;
#gpio-range-cells = <3>;
};
};

View File

@ -188,7 +188,6 @@
pfc: pfc@fffc0000 {
compatible = "renesas,pfc-r8a7779";
reg = <0xfffc0000 0x23c>;
#gpio-range-cells = <3>;
};
thermal@ffc48000 {

View File

@ -148,11 +148,10 @@
pfc: pfc@e6060000 {
compatible = "renesas,pfc-r8a7790";
reg = <0 0xe6060000 0 0x250>;
#gpio-range-cells = <3>;
};
sdhi0: sdhi@ee100000 {
compatible = "renesas,r8a7790-sdhi";
compatible = "renesas,sdhi-r8a7790";
reg = <0 0xee100000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 165 4>;
@ -161,7 +160,7 @@
};
sdhi1: sdhi@ee120000 {
compatible = "renesas,r8a7790-sdhi";
compatible = "renesas,sdhi-r8a7790";
reg = <0 0xee120000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 166 4>;
@ -170,7 +169,7 @@
};
sdhi2: sdhi@ee140000 {
compatible = "renesas,r8a7790-sdhi";
compatible = "renesas,sdhi-r8a7790";
reg = <0 0xee140000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 167 4>;
@ -179,7 +178,7 @@
};
sdhi3: sdhi@ee160000 {
compatible = "renesas,r8a7790-sdhi";
compatible = "renesas,sdhi-r8a7790";
reg = <0 0xee160000 0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 168 4>;

View File

@ -196,7 +196,7 @@
};
sdhi0: sdhi@ee100000 {
compatible = "renesas,r8a7740-sdhi";
compatible = "renesas,sdhi-r8a7740";
reg = <0xee100000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 83 4
@ -208,7 +208,7 @@
/* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */
sdhi1: sdhi@ee120000 {
compatible = "renesas,r8a7740-sdhi";
compatible = "renesas,sdhi-r8a7740";
reg = <0xee120000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 88 4
@ -219,7 +219,7 @@
};
sdhi2: sdhi@ee140000 {
compatible = "renesas,r8a7740-sdhi";
compatible = "renesas,sdhi-r8a7740";
reg = <0xee140000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 104 4

View File

@ -1108,9 +1108,9 @@ static const struct pinctrl_map eva_pinctrl_map[] = {
PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.1", "pfc-r8a7740",
"fsib_mclk_in", "fsib"),
/* GETHER */
PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7740",
PIN_MAP_MUX_GROUP_DEFAULT("r8a7740-gether", "pfc-r8a7740",
"gether_mii", "gether"),
PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7740",
PIN_MAP_MUX_GROUP_DEFAULT("r8a7740-gether", "pfc-r8a7740",
"gether_int", "gether"),
/* HDMI */
PIN_MAP_MUX_GROUP_DEFAULT("sh-mobile-hdmi", "pfc-r8a7740",

View File

@ -29,6 +29,7 @@
#include <linux/pinctrl/machine.h>
#include <linux/platform_data/gpio-rcar.h>
#include <linux/platform_device.h>
#include <linux/phy.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <linux/sh_eth.h>
@ -155,6 +156,30 @@ static void __init lager_add_standard_devices(void)
&ether_pdata, sizeof(ether_pdata));
}
/*
* Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds
* to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits
* 14-15. We have to set them back to 01 from the default 00 value each time
* the PHY is reset. It's also important because the PHY's LED0 signal is
* connected to SoC's ETH_LINK signal and in the PHY's default mode it will
* bounce on and off after each packet, which we apparently want to avoid.
*/
static int lager_ksz8041_fixup(struct phy_device *phydev)
{
u16 phyctrl1 = phy_read(phydev, 0x1e);
phyctrl1 &= ~0xc000;
phyctrl1 |= 0x4000;
return phy_write(phydev, 0x1e, phyctrl1);
}
static void __init lager_init(void)
{
lager_add_standard_devices();
phy_register_fixup_for_id("r8a7790-ether-ff:01", lager_ksz8041_fixup);
}
static const char *lager_boards_compat_dt[] __initdata = {
"renesas,lager",
NULL,
@ -163,6 +188,6 @@ static const char *lager_boards_compat_dt[] __initdata = {
DT_MACHINE_START(LAGER_DT, "lager")
.init_early = r8a7790_init_delay,
.init_time = r8a7790_timer_init,
.init_machine = lager_add_standard_devices,
.init_machine = lager_init,
.dt_compat = lager_boards_compat_dt,
MACHINE_END

View File

@ -293,10 +293,9 @@ static void gpio_rcar_parse_pdata(struct gpio_rcar_priv *p)
if (pdata) {
p->config = *pdata;
} else if (IS_ENABLED(CONFIG_OF) && np) {
ret = of_parse_phandle_with_args(np, "gpio-ranges",
"#gpio-range-cells", 0, &args);
p->config.number_of_pins = ret == 0 && args.args_count == 3
? args.args[2]
ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0,
&args);
p->config.number_of_pins = ret == 0 ? args.args[2]
: RCAR_MAX_GPIO_PER_BANK;
p->config.gpio_base = -1;
}

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@ -113,14 +113,14 @@ static const struct sh_mobile_sdhi_ops sdhi_ops = {
};
static const struct of_device_id sh_mobile_sdhi_of_match[] = {
{ .compatible = "renesas,shmobile-sdhi" },
{ .compatible = "renesas,sh7372-sdhi" },
{ .compatible = "renesas,sh73a0-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], },
{ .compatible = "renesas,r8a73a4-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], },
{ .compatible = "renesas,r8a7740-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], },
{ .compatible = "renesas,r8a7778-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], },
{ .compatible = "renesas,r8a7779-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], },
{ .compatible = "renesas,r8a7790-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], },
{ .compatible = "renesas,sdhi-shmobile" },
{ .compatible = "renesas,sdhi-sh7372" },
{ .compatible = "renesas,sdhi-sh73a0", .data = &sh_mobile_sdhi_of_cfg[0], },
{ .compatible = "renesas,sdhi-r8a73a4", .data = &sh_mobile_sdhi_of_cfg[0], },
{ .compatible = "renesas,sdhi-r8a7740", .data = &sh_mobile_sdhi_of_cfg[0], },
{ .compatible = "renesas,sdhi-r8a7778", .data = &sh_mobile_sdhi_of_cfg[0], },
{ .compatible = "renesas,sdhi-r8a7779", .data = &sh_mobile_sdhi_of_cfg[0], },
{ .compatible = "renesas,sdhi-r8a7790", .data = &sh_mobile_sdhi_of_cfg[0], },
{},
};
MODULE_DEVICE_TABLE(of, sh_mobile_sdhi_of_match);