drm/mga: fixed brace, macro and spacing coding style issues
Fixed brace, macro and spacing coding style issues. Signed-off-by: Nicolas Kaiser <nikai@nikai.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Nicolas Kaiser
Dave Airlie
parent
58c1e85af3
commit
f2b2cb790e
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@ -52,7 +52,7 @@ static int mga_do_cleanup_dma(struct drm_device *dev, int full_cleanup);
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* Engine control
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*/
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int mga_do_wait_for_idle(drm_mga_private_t * dev_priv)
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int mga_do_wait_for_idle(drm_mga_private_t *dev_priv)
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{
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u32 status = 0;
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int i;
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@ -74,7 +74,7 @@ int mga_do_wait_for_idle(drm_mga_private_t * dev_priv)
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return -EBUSY;
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}
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static int mga_do_dma_reset(drm_mga_private_t * dev_priv)
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static int mga_do_dma_reset(drm_mga_private_t *dev_priv)
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{
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drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
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drm_mga_primary_buffer_t *primary = &dev_priv->prim;
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@ -102,7 +102,7 @@ static int mga_do_dma_reset(drm_mga_private_t * dev_priv)
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* Primary DMA stream
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*/
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void mga_do_dma_flush(drm_mga_private_t * dev_priv)
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void mga_do_dma_flush(drm_mga_private_t *dev_priv)
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{
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drm_mga_primary_buffer_t *primary = &dev_priv->prim;
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u32 head, tail;
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@ -142,11 +142,10 @@ void mga_do_dma_flush(drm_mga_private_t * dev_priv)
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head = MGA_READ(MGA_PRIMADDRESS);
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if (head <= tail) {
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if (head <= tail)
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primary->space = primary->size - primary->tail;
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} else {
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else
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primary->space = head - tail;
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}
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DRM_DEBUG(" head = 0x%06lx\n", (unsigned long)(head - dev_priv->primary->offset));
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DRM_DEBUG(" tail = 0x%06lx\n", (unsigned long)(tail - dev_priv->primary->offset));
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@ -158,7 +157,7 @@ void mga_do_dma_flush(drm_mga_private_t * dev_priv)
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DRM_DEBUG("done.\n");
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}
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void mga_do_dma_wrap_start(drm_mga_private_t * dev_priv)
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void mga_do_dma_wrap_start(drm_mga_private_t *dev_priv)
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{
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drm_mga_primary_buffer_t *primary = &dev_priv->prim;
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u32 head, tail;
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@ -181,11 +180,10 @@ void mga_do_dma_wrap_start(drm_mga_private_t * dev_priv)
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head = MGA_READ(MGA_PRIMADDRESS);
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if (head == dev_priv->primary->offset) {
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if (head == dev_priv->primary->offset)
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primary->space = primary->size;
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} else {
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else
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primary->space = head - dev_priv->primary->offset;
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}
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DRM_DEBUG(" head = 0x%06lx\n", (unsigned long)(head - dev_priv->primary->offset));
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DRM_DEBUG(" tail = 0x%06x\n", primary->tail);
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@ -199,7 +197,7 @@ void mga_do_dma_wrap_start(drm_mga_private_t * dev_priv)
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DRM_DEBUG("done.\n");
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}
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void mga_do_dma_wrap_end(drm_mga_private_t * dev_priv)
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void mga_do_dma_wrap_end(drm_mga_private_t *dev_priv)
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{
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drm_mga_primary_buffer_t *primary = &dev_priv->prim;
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drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
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@ -220,11 +218,11 @@ void mga_do_dma_wrap_end(drm_mga_private_t * dev_priv)
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* Freelist management
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*/
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#define MGA_BUFFER_USED ~0
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#define MGA_BUFFER_USED (~0)
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#define MGA_BUFFER_FREE 0
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#if MGA_FREELIST_DEBUG
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static void mga_freelist_print(struct drm_device * dev)
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static void mga_freelist_print(struct drm_device *dev)
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{
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drm_mga_private_t *dev_priv = dev->dev_private;
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drm_mga_freelist_t *entry;
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@ -245,7 +243,7 @@ static void mga_freelist_print(struct drm_device * dev)
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}
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#endif
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static int mga_freelist_init(struct drm_device * dev, drm_mga_private_t * dev_priv)
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static int mga_freelist_init(struct drm_device *dev, drm_mga_private_t *dev_priv)
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{
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struct drm_device_dma *dma = dev->dma;
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struct drm_buf *buf;
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@ -288,7 +286,7 @@ static int mga_freelist_init(struct drm_device * dev, drm_mga_private_t * dev_pr
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return 0;
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}
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static void mga_freelist_cleanup(struct drm_device * dev)
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static void mga_freelist_cleanup(struct drm_device *dev)
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{
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drm_mga_private_t *dev_priv = dev->dev_private;
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drm_mga_freelist_t *entry;
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@ -308,7 +306,7 @@ static void mga_freelist_cleanup(struct drm_device * dev)
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#if 0
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/* FIXME: Still needed?
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*/
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static void mga_freelist_reset(struct drm_device * dev)
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static void mga_freelist_reset(struct drm_device *dev)
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{
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struct drm_device_dma *dma = dev->dma;
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struct drm_buf *buf;
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@ -356,7 +354,7 @@ static struct drm_buf *mga_freelist_get(struct drm_device * dev)
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return NULL;
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}
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int mga_freelist_put(struct drm_device * dev, struct drm_buf * buf)
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int mga_freelist_put(struct drm_device *dev, struct drm_buf *buf)
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{
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drm_mga_private_t *dev_priv = dev->dev_private;
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drm_mga_buf_priv_t *buf_priv = buf->dev_private;
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@ -391,7 +389,7 @@ int mga_freelist_put(struct drm_device * dev, struct drm_buf * buf)
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* DMA initialization, cleanup
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*/
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int mga_driver_load(struct drm_device * dev, unsigned long flags)
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int mga_driver_load(struct drm_device *dev, unsigned long flags)
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{
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drm_mga_private_t *dev_priv;
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int ret;
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@ -439,8 +437,8 @@ int mga_driver_load(struct drm_device * dev, unsigned long flags)
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*
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* \sa mga_do_dma_bootstrap, mga_do_pci_dma_bootstrap
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*/
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static int mga_do_agp_dma_bootstrap(struct drm_device * dev,
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drm_mga_dma_bootstrap_t * dma_bs)
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static int mga_do_agp_dma_bootstrap(struct drm_device *dev,
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drm_mga_dma_bootstrap_t *dma_bs)
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{
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drm_mga_private_t *const dev_priv =
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(drm_mga_private_t *) dev->dev_private;
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@ -481,11 +479,10 @@ static int mga_do_agp_dma_bootstrap(struct drm_device * dev,
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*/
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if (dev_priv->chipset == MGA_CARD_TYPE_G200) {
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if (mode.mode & 0x02) {
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if (mode.mode & 0x02)
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MGA_WRITE(MGA_AGP_PLL, MGA_AGP2XPLL_ENABLE);
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} else {
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else
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MGA_WRITE(MGA_AGP_PLL, MGA_AGP2XPLL_DISABLE);
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}
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}
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/* Allocate and bind AGP memory. */
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@ -593,8 +590,8 @@ static int mga_do_agp_dma_bootstrap(struct drm_device * dev,
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return 0;
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}
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#else
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static int mga_do_agp_dma_bootstrap(struct drm_device * dev,
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drm_mga_dma_bootstrap_t * dma_bs)
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static int mga_do_agp_dma_bootstrap(struct drm_device *dev,
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drm_mga_dma_bootstrap_t *dma_bs)
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{
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return -EINVAL;
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}
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@ -614,8 +611,8 @@ static int mga_do_agp_dma_bootstrap(struct drm_device * dev,
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*
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* \sa mga_do_dma_bootstrap, mga_do_agp_dma_bootstrap
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*/
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static int mga_do_pci_dma_bootstrap(struct drm_device * dev,
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drm_mga_dma_bootstrap_t * dma_bs)
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static int mga_do_pci_dma_bootstrap(struct drm_device *dev,
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drm_mga_dma_bootstrap_t *dma_bs)
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{
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drm_mga_private_t *const dev_priv =
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(drm_mga_private_t *) dev->dev_private;
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@ -678,9 +675,8 @@ static int mga_do_pci_dma_bootstrap(struct drm_device * dev,
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req.size = dma_bs->secondary_bin_size;
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err = drm_addbufs_pci(dev, &req);
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if (!err) {
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if (!err)
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break;
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}
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}
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if (bin_count == 0) {
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@ -704,8 +700,8 @@ static int mga_do_pci_dma_bootstrap(struct drm_device * dev,
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return 0;
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}
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static int mga_do_dma_bootstrap(struct drm_device * dev,
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drm_mga_dma_bootstrap_t * dma_bs)
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static int mga_do_dma_bootstrap(struct drm_device *dev,
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drm_mga_dma_bootstrap_t *dma_bs)
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{
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const int is_agp = (dma_bs->agp_mode != 0) && drm_device_is_agp(dev);
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int err;
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@ -737,17 +733,15 @@ static int mga_do_dma_bootstrap(struct drm_device * dev,
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* carve off portions of it for internal uses. The remaining memory
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* is returned to user-mode to be used for AGP textures.
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*/
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if (is_agp) {
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if (is_agp)
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err = mga_do_agp_dma_bootstrap(dev, dma_bs);
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}
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/* If we attempted to initialize the card for AGP DMA but failed,
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* clean-up any mess that may have been created.
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*/
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if (err) {
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if (err)
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mga_do_cleanup_dma(dev, MINIMAL_CLEANUP);
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}
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/* Not only do we want to try and initialized PCI cards for PCI DMA,
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* but we also try to initialized AGP cards that could not be
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@ -757,9 +751,8 @@ static int mga_do_dma_bootstrap(struct drm_device * dev,
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* AGP memory, etc.
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*/
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if (!is_agp || err) {
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if (!is_agp || err)
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err = mga_do_pci_dma_bootstrap(dev, dma_bs);
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}
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return err;
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}
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@ -792,7 +785,7 @@ int mga_dma_bootstrap(struct drm_device *dev, void *data,
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return err;
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}
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static int mga_do_init_dma(struct drm_device * dev, drm_mga_init_t * init)
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static int mga_do_init_dma(struct drm_device *dev, drm_mga_init_t *init)
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{
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drm_mga_private_t *dev_priv;
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int ret;
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@ -800,11 +793,10 @@ static int mga_do_init_dma(struct drm_device * dev, drm_mga_init_t * init)
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dev_priv = dev->dev_private;
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if (init->sgram) {
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if (init->sgram)
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dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_BLK;
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} else {
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else
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dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_RSTR;
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}
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dev_priv->maccess = init->maccess;
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dev_priv->fb_cpp = init->fb_cpp;
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@ -975,9 +967,8 @@ static int mga_do_cleanup_dma(struct drm_device *dev, int full_cleanup)
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dev_priv->agp_handle = 0;
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}
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if ((dev->agp != NULL) && dev->agp->acquired) {
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if ((dev->agp != NULL) && dev->agp->acquired)
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err = drm_agp_release(dev);
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}
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#endif
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}
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@ -998,9 +989,8 @@ static int mga_do_cleanup_dma(struct drm_device *dev, int full_cleanup)
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memset(dev_priv->warp_pipe_phys, 0,
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sizeof(dev_priv->warp_pipe_phys));
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if (dev_priv->head != NULL) {
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if (dev_priv->head != NULL)
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mga_freelist_cleanup(dev);
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}
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}
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return err;
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@ -1017,9 +1007,8 @@ int mga_dma_init(struct drm_device *dev, void *data,
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switch (init->func) {
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case MGA_INIT_DMA:
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err = mga_do_init_dma(dev, init);
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if (err) {
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if (err)
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(void)mga_do_cleanup_dma(dev, FULL_CLEANUP);
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}
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return err;
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case MGA_CLEANUP_DMA:
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return mga_do_cleanup_dma(dev, FULL_CLEANUP);
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@ -1047,9 +1036,8 @@ int mga_dma_flush(struct drm_device *dev, void *data,
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WRAP_WAIT_WITH_RETURN(dev_priv);
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if (lock->flags & (_DRM_LOCK_FLUSH | _DRM_LOCK_FLUSH_ALL)) {
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if (lock->flags & (_DRM_LOCK_FLUSH | _DRM_LOCK_FLUSH_ALL))
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mga_do_dma_flush(dev_priv);
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}
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if (lock->flags & _DRM_LOCK_QUIESCENT) {
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#if MGA_DMA_DEBUG
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@ -1079,8 +1067,8 @@ int mga_dma_reset(struct drm_device *dev, void *data,
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* DMA buffer management
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*/
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static int mga_dma_get_buffers(struct drm_device * dev,
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struct drm_file *file_priv, struct drm_dma * d)
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static int mga_dma_get_buffers(struct drm_device *dev,
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struct drm_file *file_priv, struct drm_dma *d)
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{
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struct drm_buf *buf;
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int i;
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@ -1134,9 +1122,8 @@ int mga_dma_buffers(struct drm_device *dev, void *data,
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d->granted_count = 0;
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if (d->request_count) {
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if (d->request_count)
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ret = mga_dma_get_buffers(dev, file_priv, d);
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}
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return ret;
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}
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@ -1144,7 +1131,7 @@ int mga_dma_buffers(struct drm_device *dev, void *data,
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/**
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* Called just before the module is unloaded.
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*/
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int mga_driver_unload(struct drm_device * dev)
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int mga_driver_unload(struct drm_device *dev)
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{
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kfree(dev->dev_private);
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dev->dev_private = NULL;
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@ -1155,12 +1142,12 @@ int mga_driver_unload(struct drm_device * dev)
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/**
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* Called when the last opener of the device is closed.
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*/
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void mga_driver_lastclose(struct drm_device * dev)
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void mga_driver_lastclose(struct drm_device *dev)
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{
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mga_do_cleanup_dma(dev, FULL_CLEANUP);
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}
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int mga_driver_dma_quiescent(struct drm_device * dev)
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int mga_driver_dma_quiescent(struct drm_device *dev)
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{
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drm_mga_private_t *dev_priv = dev->dev_private;
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return mga_do_wait_for_idle(dev_priv);
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@ -36,7 +36,7 @@
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#include "drm_pciids.h"
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static int mga_driver_device_is_agp(struct drm_device * dev);
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static int mga_driver_device_is_agp(struct drm_device *dev);
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static struct pci_device_id pciidlist[] = {
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mga_PCI_IDS
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@ -119,7 +119,7 @@ MODULE_LICENSE("GPL and additional rights");
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* \returns
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* If the device is a PCI G450, zero is returned. Otherwise 2 is returned.
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*/
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static int mga_driver_device_is_agp(struct drm_device * dev)
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static int mga_driver_device_is_agp(struct drm_device *dev)
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{
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const struct pci_dev *const pdev = dev->pdev;
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@ -164,59 +164,59 @@ extern int mga_dma_reset(struct drm_device *dev, void *data,
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extern int mga_dma_buffers(struct drm_device *dev, void *data,
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struct drm_file *file_priv);
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extern int mga_driver_load(struct drm_device *dev, unsigned long flags);
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extern int mga_driver_unload(struct drm_device * dev);
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extern void mga_driver_lastclose(struct drm_device * dev);
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extern int mga_driver_dma_quiescent(struct drm_device * dev);
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extern int mga_driver_unload(struct drm_device *dev);
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extern void mga_driver_lastclose(struct drm_device *dev);
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extern int mga_driver_dma_quiescent(struct drm_device *dev);
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extern int mga_do_wait_for_idle(drm_mga_private_t * dev_priv);
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extern int mga_do_wait_for_idle(drm_mga_private_t *dev_priv);
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extern void mga_do_dma_flush(drm_mga_private_t * dev_priv);
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extern void mga_do_dma_wrap_start(drm_mga_private_t * dev_priv);
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extern void mga_do_dma_wrap_end(drm_mga_private_t * dev_priv);
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extern void mga_do_dma_flush(drm_mga_private_t *dev_priv);
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extern void mga_do_dma_wrap_start(drm_mga_private_t *dev_priv);
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extern void mga_do_dma_wrap_end(drm_mga_private_t *dev_priv);
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extern int mga_freelist_put(struct drm_device * dev, struct drm_buf * buf);
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extern int mga_freelist_put(struct drm_device *dev, struct drm_buf *buf);
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/* mga_warp.c */
|
||||
extern int mga_warp_install_microcode(drm_mga_private_t * dev_priv);
|
||||
extern int mga_warp_init(drm_mga_private_t * dev_priv);
|
||||
extern int mga_warp_install_microcode(drm_mga_private_t *dev_priv);
|
||||
extern int mga_warp_init(drm_mga_private_t *dev_priv);
|
||||
|
||||
/* mga_irq.c */
|
||||
extern int mga_enable_vblank(struct drm_device *dev, int crtc);
|
||||
extern void mga_disable_vblank(struct drm_device *dev, int crtc);
|
||||
extern u32 mga_get_vblank_counter(struct drm_device *dev, int crtc);
|
||||
extern int mga_driver_fence_wait(struct drm_device * dev, unsigned int *sequence);
|
||||
extern int mga_driver_vblank_wait(struct drm_device * dev, unsigned int *sequence);
|
||||
extern int mga_driver_fence_wait(struct drm_device *dev, unsigned int *sequence);
|
||||
extern int mga_driver_vblank_wait(struct drm_device *dev, unsigned int *sequence);
|
||||
extern irqreturn_t mga_driver_irq_handler(DRM_IRQ_ARGS);
|
||||
extern void mga_driver_irq_preinstall(struct drm_device * dev);
|
||||
extern void mga_driver_irq_preinstall(struct drm_device *dev);
|
||||
extern int mga_driver_irq_postinstall(struct drm_device *dev);
|
||||
extern void mga_driver_irq_uninstall(struct drm_device * dev);
|
||||
extern void mga_driver_irq_uninstall(struct drm_device *dev);
|
||||
extern long mga_compat_ioctl(struct file *filp, unsigned int cmd,
|
||||
unsigned long arg);
|
||||
|
||||
#define mga_flush_write_combine() DRM_WRITEMEMORYBARRIER()
|
||||
|
||||
#if defined(__linux__) && defined(__alpha__)
|
||||
#define MGA_BASE( reg ) ((unsigned long)(dev_priv->mmio->handle))
|
||||
#define MGA_ADDR( reg ) (MGA_BASE(reg) + reg)
|
||||
#define MGA_BASE(reg) ((unsigned long)(dev_priv->mmio->handle))
|
||||
#define MGA_ADDR(reg) (MGA_BASE(reg) + reg)
|
||||
|
||||
#define MGA_DEREF( reg ) *(volatile u32 *)MGA_ADDR( reg )
|
||||
#define MGA_DEREF8( reg ) *(volatile u8 *)MGA_ADDR( reg )
|
||||
#define MGA_DEREF(reg) (*(volatile u32 *)MGA_ADDR(reg))
|
||||
#define MGA_DEREF8(reg) (*(volatile u8 *)MGA_ADDR(reg))
|
||||
|
||||
#define MGA_READ( reg ) (_MGA_READ((u32 *)MGA_ADDR(reg)))
|
||||
#define MGA_READ8( reg ) (_MGA_READ((u8 *)MGA_ADDR(reg)))
|
||||
#define MGA_WRITE( reg, val ) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF( reg ) = val; } while (0)
|
||||
#define MGA_WRITE8( reg, val ) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF8( reg ) = val; } while (0)
|
||||
#define MGA_READ(reg) (_MGA_READ((u32 *)MGA_ADDR(reg)))
|
||||
#define MGA_READ8(reg) (_MGA_READ((u8 *)MGA_ADDR(reg)))
|
||||
#define MGA_WRITE(reg, val) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF(reg) = val; } while (0)
|
||||
#define MGA_WRITE8(reg, val) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF8(reg) = val; } while (0)
|
||||
|
||||
static inline u32 _MGA_READ(u32 * addr)
|
||||
static inline u32 _MGA_READ(u32 *addr)
|
||||
{
|
||||
DRM_MEMORYBARRIER();
|
||||
return *(volatile u32 *)addr;
|
||||
}
|
||||
#else
|
||||
#define MGA_READ8( reg ) DRM_READ8(dev_priv->mmio, (reg))
|
||||
#define MGA_READ( reg ) DRM_READ32(dev_priv->mmio, (reg))
|
||||
#define MGA_WRITE8( reg, val ) DRM_WRITE8(dev_priv->mmio, (reg), (val))
|
||||
#define MGA_WRITE( reg, val ) DRM_WRITE32(dev_priv->mmio, (reg), (val))
|
||||
#define MGA_READ8(reg) DRM_READ8(dev_priv->mmio, (reg))
|
||||
#define MGA_READ(reg) DRM_READ32(dev_priv->mmio, (reg))
|
||||
#define MGA_WRITE8(reg, val) DRM_WRITE8(dev_priv->mmio, (reg), (val))
|
||||
#define MGA_WRITE(reg, val) DRM_WRITE32(dev_priv->mmio, (reg), (val))
|
||||
#endif
|
||||
|
||||
#define DWGREG0 0x1c00
|
||||
|
|
@ -233,40 +233,39 @@ static inline u32 _MGA_READ(u32 * addr)
|
|||
* Helper macross...
|
||||
*/
|
||||
|
||||
#define MGA_EMIT_STATE( dev_priv, dirty ) \
|
||||
#define MGA_EMIT_STATE(dev_priv, dirty) \
|
||||
do { \
|
||||
if ( (dirty) & ~MGA_UPLOAD_CLIPRECTS ) { \
|
||||
if ( dev_priv->chipset >= MGA_CARD_TYPE_G400 ) { \
|
||||
mga_g400_emit_state( dev_priv ); \
|
||||
} else { \
|
||||
mga_g200_emit_state( dev_priv ); \
|
||||
if ((dirty) & ~MGA_UPLOAD_CLIPRECTS) { \
|
||||
if (dev_priv->chipset >= MGA_CARD_TYPE_G400) \
|
||||
mga_g400_emit_state(dev_priv); \
|
||||
else \
|
||||
mga_g200_emit_state(dev_priv); \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
#define WRAP_TEST_WITH_RETURN(dev_priv) \
|
||||
do { \
|
||||
if (test_bit(0, &dev_priv->prim.wrapped)) { \
|
||||
if (mga_is_idle(dev_priv)) { \
|
||||
mga_do_dma_wrap_end(dev_priv); \
|
||||
} else if (dev_priv->prim.space < \
|
||||
dev_priv->prim.high_mark) { \
|
||||
if (MGA_DMA_DEBUG) \
|
||||
DRM_INFO("wrap...\n"); \
|
||||
return -EBUSY; \
|
||||
} \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
#define WRAP_TEST_WITH_RETURN( dev_priv ) \
|
||||
#define WRAP_WAIT_WITH_RETURN(dev_priv) \
|
||||
do { \
|
||||
if ( test_bit( 0, &dev_priv->prim.wrapped ) ) { \
|
||||
if ( mga_is_idle( dev_priv ) ) { \
|
||||
mga_do_dma_wrap_end( dev_priv ); \
|
||||
} else if ( dev_priv->prim.space < \
|
||||
dev_priv->prim.high_mark ) { \
|
||||
if ( MGA_DMA_DEBUG ) \
|
||||
DRM_INFO( "wrap...\n"); \
|
||||
return -EBUSY; \
|
||||
if (test_bit(0, &dev_priv->prim.wrapped)) { \
|
||||
if (mga_do_wait_for_idle(dev_priv) < 0) { \
|
||||
if (MGA_DMA_DEBUG) \
|
||||
DRM_INFO("wrap...\n"); \
|
||||
return -EBUSY; \
|
||||
} \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
#define WRAP_WAIT_WITH_RETURN( dev_priv ) \
|
||||
do { \
|
||||
if ( test_bit( 0, &dev_priv->prim.wrapped ) ) { \
|
||||
if ( mga_do_wait_for_idle( dev_priv ) < 0 ) { \
|
||||
if ( MGA_DMA_DEBUG ) \
|
||||
DRM_INFO( "wrap...\n"); \
|
||||
return -EBUSY; \
|
||||
} \
|
||||
mga_do_dma_wrap_end( dev_priv ); \
|
||||
mga_do_dma_wrap_end(dev_priv); \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
|
|
@ -280,12 +279,12 @@ do { \
|
|||
|
||||
#define DMA_BLOCK_SIZE (5 * sizeof(u32))
|
||||
|
||||
#define BEGIN_DMA( n ) \
|
||||
#define BEGIN_DMA(n) \
|
||||
do { \
|
||||
if ( MGA_VERBOSE ) { \
|
||||
DRM_INFO( "BEGIN_DMA( %d )\n", (n) ); \
|
||||
DRM_INFO( " space=0x%x req=0x%Zx\n", \
|
||||
dev_priv->prim.space, (n) * DMA_BLOCK_SIZE ); \
|
||||
if (MGA_VERBOSE) { \
|
||||
DRM_INFO("BEGIN_DMA(%d)\n", (n)); \
|
||||
DRM_INFO(" space=0x%x req=0x%Zx\n", \
|
||||
dev_priv->prim.space, (n) * DMA_BLOCK_SIZE); \
|
||||
} \
|
||||
prim = dev_priv->prim.start; \
|
||||
write = dev_priv->prim.tail; \
|
||||
|
|
@ -293,9 +292,9 @@ do { \
|
|||
|
||||
#define BEGIN_DMA_WRAP() \
|
||||
do { \
|
||||
if ( MGA_VERBOSE ) { \
|
||||
DRM_INFO( "BEGIN_DMA()\n" ); \
|
||||
DRM_INFO( " space=0x%x\n", dev_priv->prim.space ); \
|
||||
if (MGA_VERBOSE) { \
|
||||
DRM_INFO("BEGIN_DMA()\n"); \
|
||||
DRM_INFO(" space=0x%x\n", dev_priv->prim.space); \
|
||||
} \
|
||||
prim = dev_priv->prim.start; \
|
||||
write = dev_priv->prim.tail; \
|
||||
|
|
@ -304,72 +303,68 @@ do { \
|
|||
#define ADVANCE_DMA() \
|
||||
do { \
|
||||
dev_priv->prim.tail = write; \
|
||||
if ( MGA_VERBOSE ) { \
|
||||
DRM_INFO( "ADVANCE_DMA() tail=0x%05x sp=0x%x\n", \
|
||||
write, dev_priv->prim.space ); \
|
||||
} \
|
||||
if (MGA_VERBOSE) \
|
||||
DRM_INFO("ADVANCE_DMA() tail=0x%05x sp=0x%x\n", \
|
||||
write, dev_priv->prim.space); \
|
||||
} while (0)
|
||||
|
||||
#define FLUSH_DMA() \
|
||||
do { \
|
||||
if ( 0 ) { \
|
||||
DRM_INFO( "\n" ); \
|
||||
DRM_INFO( " tail=0x%06x head=0x%06lx\n", \
|
||||
dev_priv->prim.tail, \
|
||||
(unsigned long)(MGA_READ(MGA_PRIMADDRESS) - \
|
||||
dev_priv->primary->offset)); \
|
||||
if (0) { \
|
||||
DRM_INFO("\n"); \
|
||||
DRM_INFO(" tail=0x%06x head=0x%06lx\n", \
|
||||
dev_priv->prim.tail, \
|
||||
(unsigned long)(MGA_READ(MGA_PRIMADDRESS) - \
|
||||
dev_priv->primary->offset)); \
|
||||
} \
|
||||
if ( !test_bit( 0, &dev_priv->prim.wrapped ) ) { \
|
||||
if ( dev_priv->prim.space < \
|
||||
dev_priv->prim.high_mark ) { \
|
||||
mga_do_dma_wrap_start( dev_priv ); \
|
||||
} else { \
|
||||
mga_do_dma_flush( dev_priv ); \
|
||||
} \
|
||||
if (!test_bit(0, &dev_priv->prim.wrapped)) { \
|
||||
if (dev_priv->prim.space < dev_priv->prim.high_mark) \
|
||||
mga_do_dma_wrap_start(dev_priv); \
|
||||
else \
|
||||
mga_do_dma_flush(dev_priv); \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
/* Never use this, always use DMA_BLOCK(...) for primary DMA output.
|
||||
*/
|
||||
#define DMA_WRITE( offset, val ) \
|
||||
#define DMA_WRITE(offset, val) \
|
||||
do { \
|
||||
if ( MGA_VERBOSE ) { \
|
||||
DRM_INFO( " DMA_WRITE( 0x%08x ) at 0x%04Zx\n", \
|
||||
(u32)(val), write + (offset) * sizeof(u32) ); \
|
||||
} \
|
||||
if (MGA_VERBOSE) \
|
||||
DRM_INFO(" DMA_WRITE( 0x%08x ) at 0x%04Zx\n", \
|
||||
(u32)(val), write + (offset) * sizeof(u32)); \
|
||||
*(volatile u32 *)(prim + write + (offset) * sizeof(u32)) = val; \
|
||||
} while (0)
|
||||
|
||||
#define DMA_BLOCK( reg0, val0, reg1, val1, reg2, val2, reg3, val3 ) \
|
||||
#define DMA_BLOCK(reg0, val0, reg1, val1, reg2, val2, reg3, val3) \
|
||||
do { \
|
||||
DMA_WRITE( 0, ((DMAREG( reg0 ) << 0) | \
|
||||
(DMAREG( reg1 ) << 8) | \
|
||||
(DMAREG( reg2 ) << 16) | \
|
||||
(DMAREG( reg3 ) << 24)) ); \
|
||||
DMA_WRITE( 1, val0 ); \
|
||||
DMA_WRITE( 2, val1 ); \
|
||||
DMA_WRITE( 3, val2 ); \
|
||||
DMA_WRITE( 4, val3 ); \
|
||||
DMA_WRITE(0, ((DMAREG(reg0) << 0) | \
|
||||
(DMAREG(reg1) << 8) | \
|
||||
(DMAREG(reg2) << 16) | \
|
||||
(DMAREG(reg3) << 24))); \
|
||||
DMA_WRITE(1, val0); \
|
||||
DMA_WRITE(2, val1); \
|
||||
DMA_WRITE(3, val2); \
|
||||
DMA_WRITE(4, val3); \
|
||||
write += DMA_BLOCK_SIZE; \
|
||||
} while (0)
|
||||
|
||||
/* Buffer aging via primary DMA stream head pointer.
|
||||
*/
|
||||
|
||||
#define SET_AGE( age, h, w ) \
|
||||
#define SET_AGE(age, h, w) \
|
||||
do { \
|
||||
(age)->head = h; \
|
||||
(age)->wrap = w; \
|
||||
} while (0)
|
||||
|
||||
#define TEST_AGE( age, h, w ) ( (age)->wrap < w || \
|
||||
( (age)->wrap == w && \
|
||||
(age)->head < h ) )
|
||||
#define TEST_AGE(age, h, w) ((age)->wrap < w || \
|
||||
((age)->wrap == w && \
|
||||
(age)->head < h))
|
||||
|
||||
#define AGE_BUFFER( buf_priv ) \
|
||||
#define AGE_BUFFER(buf_priv) \
|
||||
do { \
|
||||
drm_mga_freelist_t *entry = (buf_priv)->list_entry; \
|
||||
if ( (buf_priv)->dispatched ) { \
|
||||
if ((buf_priv)->dispatched) { \
|
||||
entry->age.head = (dev_priv->prim.tail + \
|
||||
dev_priv->primary->offset); \
|
||||
entry->age.wrap = dev_priv->sarea_priv->last_wrap; \
|
||||
|
|
@ -681,7 +676,7 @@ do { \
|
|||
|
||||
/* Simple idle test.
|
||||
*/
|
||||
static __inline__ int mga_is_idle(drm_mga_private_t * dev_priv)
|
||||
static __inline__ int mga_is_idle(drm_mga_private_t *dev_priv)
|
||||
{
|
||||
u32 status = MGA_READ(MGA_STATUS) & MGA_ENGINE_IDLE_MASK;
|
||||
return (status == MGA_ENDPRDMASTS);
|
||||
|
|
|
|||
|
|
@ -76,9 +76,8 @@ irqreturn_t mga_driver_irq_handler(DRM_IRQ_ARGS)
|
|||
/* In addition to clearing the interrupt-pending bit, we
|
||||
* have to write to MGA_PRIMEND to re-start the DMA operation.
|
||||
*/
|
||||
if ((prim_start & ~0x03) != (prim_end & ~0x03)) {
|
||||
if ((prim_start & ~0x03) != (prim_end & ~0x03))
|
||||
MGA_WRITE(MGA_PRIMEND, prim_end);
|
||||
}
|
||||
|
||||
atomic_inc(&dev_priv->last_fence_retired);
|
||||
DRM_WAKEUP(&dev_priv->fence_queue);
|
||||
|
|
@ -120,7 +119,7 @@ void mga_disable_vblank(struct drm_device *dev, int crtc)
|
|||
/* MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN); */
|
||||
}
|
||||
|
||||
int mga_driver_fence_wait(struct drm_device * dev, unsigned int *sequence)
|
||||
int mga_driver_fence_wait(struct drm_device *dev, unsigned int *sequence)
|
||||
{
|
||||
drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
|
||||
unsigned int cur_fence;
|
||||
|
|
@ -139,7 +138,7 @@ int mga_driver_fence_wait(struct drm_device * dev, unsigned int *sequence)
|
|||
return ret;
|
||||
}
|
||||
|
||||
void mga_driver_irq_preinstall(struct drm_device * dev)
|
||||
void mga_driver_irq_preinstall(struct drm_device *dev)
|
||||
{
|
||||
drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
|
||||
|
||||
|
|
@ -162,7 +161,7 @@ int mga_driver_irq_postinstall(struct drm_device *dev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
void mga_driver_irq_uninstall(struct drm_device * dev)
|
||||
void mga_driver_irq_uninstall(struct drm_device *dev)
|
||||
{
|
||||
drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
|
||||
if (!dev_priv)
|
||||
|
|
|
|||
|
|
@ -41,8 +41,8 @@
|
|||
* DMA hardware state programming functions
|
||||
*/
|
||||
|
||||
static void mga_emit_clip_rect(drm_mga_private_t * dev_priv,
|
||||
struct drm_clip_rect * box)
|
||||
static void mga_emit_clip_rect(drm_mga_private_t *dev_priv,
|
||||
struct drm_clip_rect *box)
|
||||
{
|
||||
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
||||
drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
|
||||
|
|
@ -66,7 +66,7 @@ static void mga_emit_clip_rect(drm_mga_private_t * dev_priv,
|
|||
ADVANCE_DMA();
|
||||
}
|
||||
|
||||
static __inline__ void mga_g200_emit_context(drm_mga_private_t * dev_priv)
|
||||
static __inline__ void mga_g200_emit_context(drm_mga_private_t *dev_priv)
|
||||
{
|
||||
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
||||
drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
|
||||
|
|
@ -89,7 +89,7 @@ static __inline__ void mga_g200_emit_context(drm_mga_private_t * dev_priv)
|
|||
ADVANCE_DMA();
|
||||
}
|
||||
|
||||
static __inline__ void mga_g400_emit_context(drm_mga_private_t * dev_priv)
|
||||
static __inline__ void mga_g400_emit_context(drm_mga_private_t *dev_priv)
|
||||
{
|
||||
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
||||
drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
|
||||
|
|
@ -116,7 +116,7 @@ static __inline__ void mga_g400_emit_context(drm_mga_private_t * dev_priv)
|
|||
ADVANCE_DMA();
|
||||
}
|
||||
|
||||
static __inline__ void mga_g200_emit_tex0(drm_mga_private_t * dev_priv)
|
||||
static __inline__ void mga_g200_emit_tex0(drm_mga_private_t *dev_priv)
|
||||
{
|
||||
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
||||
drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0];
|
||||
|
|
@ -144,7 +144,7 @@ static __inline__ void mga_g200_emit_tex0(drm_mga_private_t * dev_priv)
|
|||
ADVANCE_DMA();
|
||||
}
|
||||
|
||||
static __inline__ void mga_g400_emit_tex0(drm_mga_private_t * dev_priv)
|
||||
static __inline__ void mga_g400_emit_tex0(drm_mga_private_t *dev_priv)
|
||||
{
|
||||
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
||||
drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0];
|
||||
|
|
@ -184,7 +184,7 @@ static __inline__ void mga_g400_emit_tex0(drm_mga_private_t * dev_priv)
|
|||
ADVANCE_DMA();
|
||||
}
|
||||
|
||||
static __inline__ void mga_g400_emit_tex1(drm_mga_private_t * dev_priv)
|
||||
static __inline__ void mga_g400_emit_tex1(drm_mga_private_t *dev_priv)
|
||||
{
|
||||
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
||||
drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[1];
|
||||
|
|
@ -223,7 +223,7 @@ static __inline__ void mga_g400_emit_tex1(drm_mga_private_t * dev_priv)
|
|||
ADVANCE_DMA();
|
||||
}
|
||||
|
||||
static __inline__ void mga_g200_emit_pipe(drm_mga_private_t * dev_priv)
|
||||
static __inline__ void mga_g200_emit_pipe(drm_mga_private_t *dev_priv)
|
||||
{
|
||||
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
||||
unsigned int pipe = sarea_priv->warp_pipe;
|
||||
|
|
@ -250,7 +250,7 @@ static __inline__ void mga_g200_emit_pipe(drm_mga_private_t * dev_priv)
|
|||
ADVANCE_DMA();
|
||||
}
|
||||
|
||||
static __inline__ void mga_g400_emit_pipe(drm_mga_private_t * dev_priv)
|
||||
static __inline__ void mga_g400_emit_pipe(drm_mga_private_t *dev_priv)
|
||||
{
|
||||
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
||||
unsigned int pipe = sarea_priv->warp_pipe;
|
||||
|
|
@ -327,7 +327,7 @@ static __inline__ void mga_g400_emit_pipe(drm_mga_private_t * dev_priv)
|
|||
ADVANCE_DMA();
|
||||
}
|
||||
|
||||
static void mga_g200_emit_state(drm_mga_private_t * dev_priv)
|
||||
static void mga_g200_emit_state(drm_mga_private_t *dev_priv)
|
||||
{
|
||||
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
||||
unsigned int dirty = sarea_priv->dirty;
|
||||
|
|
@ -348,7 +348,7 @@ static void mga_g200_emit_state(drm_mga_private_t * dev_priv)
|
|||
}
|
||||
}
|
||||
|
||||
static void mga_g400_emit_state(drm_mga_private_t * dev_priv)
|
||||
static void mga_g400_emit_state(drm_mga_private_t *dev_priv)
|
||||
{
|
||||
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
||||
unsigned int dirty = sarea_priv->dirty;
|
||||
|
|
@ -381,7 +381,7 @@ static void mga_g400_emit_state(drm_mga_private_t * dev_priv)
|
|||
|
||||
/* Disallow all write destinations except the front and backbuffer.
|
||||
*/
|
||||
static int mga_verify_context(drm_mga_private_t * dev_priv)
|
||||
static int mga_verify_context(drm_mga_private_t *dev_priv)
|
||||
{
|
||||
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
||||
drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
|
||||
|
|
@ -400,7 +400,7 @@ static int mga_verify_context(drm_mga_private_t * dev_priv)
|
|||
|
||||
/* Disallow texture reads from PCI space.
|
||||
*/
|
||||
static int mga_verify_tex(drm_mga_private_t * dev_priv, int unit)
|
||||
static int mga_verify_tex(drm_mga_private_t *dev_priv, int unit)
|
||||
{
|
||||
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
||||
drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[unit];
|
||||
|
|
@ -417,7 +417,7 @@ static int mga_verify_tex(drm_mga_private_t * dev_priv, int unit)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int mga_verify_state(drm_mga_private_t * dev_priv)
|
||||
static int mga_verify_state(drm_mga_private_t *dev_priv)
|
||||
{
|
||||
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
||||
unsigned int dirty = sarea_priv->dirty;
|
||||
|
|
@ -446,7 +446,7 @@ static int mga_verify_state(drm_mga_private_t * dev_priv)
|
|||
return (ret == 0);
|
||||
}
|
||||
|
||||
static int mga_verify_iload(drm_mga_private_t * dev_priv,
|
||||
static int mga_verify_iload(drm_mga_private_t *dev_priv,
|
||||
unsigned int dstorg, unsigned int length)
|
||||
{
|
||||
if (dstorg < dev_priv->texture_offset ||
|
||||
|
|
@ -465,7 +465,7 @@ static int mga_verify_iload(drm_mga_private_t * dev_priv,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int mga_verify_blit(drm_mga_private_t * dev_priv,
|
||||
static int mga_verify_blit(drm_mga_private_t *dev_priv,
|
||||
unsigned int srcorg, unsigned int dstorg)
|
||||
{
|
||||
if ((srcorg & 0x3) == (MGA_SRCACC_PCI | MGA_SRCMAP_SYSMEM) ||
|
||||
|
|
@ -480,7 +480,7 @@ static int mga_verify_blit(drm_mga_private_t * dev_priv,
|
|||
*
|
||||
*/
|
||||
|
||||
static void mga_dma_dispatch_clear(struct drm_device * dev, drm_mga_clear_t * clear)
|
||||
static void mga_dma_dispatch_clear(struct drm_device *dev, drm_mga_clear_t *clear)
|
||||
{
|
||||
drm_mga_private_t *dev_priv = dev->dev_private;
|
||||
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
||||
|
|
@ -568,7 +568,7 @@ static void mga_dma_dispatch_clear(struct drm_device * dev, drm_mga_clear_t * cl
|
|||
FLUSH_DMA();
|
||||
}
|
||||
|
||||
static void mga_dma_dispatch_swap(struct drm_device * dev)
|
||||
static void mga_dma_dispatch_swap(struct drm_device *dev)
|
||||
{
|
||||
drm_mga_private_t *dev_priv = dev->dev_private;
|
||||
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
||||
|
|
@ -622,7 +622,7 @@ static void mga_dma_dispatch_swap(struct drm_device * dev)
|
|||
DRM_DEBUG("... done.\n");
|
||||
}
|
||||
|
||||
static void mga_dma_dispatch_vertex(struct drm_device * dev, struct drm_buf * buf)
|
||||
static void mga_dma_dispatch_vertex(struct drm_device *dev, struct drm_buf *buf)
|
||||
{
|
||||
drm_mga_private_t *dev_priv = dev->dev_private;
|
||||
drm_mga_buf_priv_t *buf_priv = buf->dev_private;
|
||||
|
|
@ -669,7 +669,7 @@ static void mga_dma_dispatch_vertex(struct drm_device * dev, struct drm_buf * bu
|
|||
FLUSH_DMA();
|
||||
}
|
||||
|
||||
static void mga_dma_dispatch_indices(struct drm_device * dev, struct drm_buf * buf,
|
||||
static void mga_dma_dispatch_indices(struct drm_device *dev, struct drm_buf *buf,
|
||||
unsigned int start, unsigned int end)
|
||||
{
|
||||
drm_mga_private_t *dev_priv = dev->dev_private;
|
||||
|
|
@ -718,7 +718,7 @@ static void mga_dma_dispatch_indices(struct drm_device * dev, struct drm_buf * b
|
|||
/* This copies a 64 byte aligned agp region to the frambuffer with a
|
||||
* standard blit, the ioctl needs to do checking.
|
||||
*/
|
||||
static void mga_dma_dispatch_iload(struct drm_device * dev, struct drm_buf * buf,
|
||||
static void mga_dma_dispatch_iload(struct drm_device *dev, struct drm_buf *buf,
|
||||
unsigned int dstorg, unsigned int length)
|
||||
{
|
||||
drm_mga_private_t *dev_priv = dev->dev_private;
|
||||
|
|
@ -766,7 +766,7 @@ static void mga_dma_dispatch_iload(struct drm_device * dev, struct drm_buf * buf
|
|||
FLUSH_DMA();
|
||||
}
|
||||
|
||||
static void mga_dma_dispatch_blit(struct drm_device * dev, drm_mga_blit_t * blit)
|
||||
static void mga_dma_dispatch_blit(struct drm_device *dev, drm_mga_blit_t *blit)
|
||||
{
|
||||
drm_mga_private_t *dev_priv = dev->dev_private;
|
||||
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
||||
|
|
@ -801,9 +801,8 @@ static void mga_dma_dispatch_blit(struct drm_device * dev, drm_mga_blit_t * blit
|
|||
int w = pbox[i].x2 - pbox[i].x1 - 1;
|
||||
int start;
|
||||
|
||||
if (blit->ydir == -1) {
|
||||
if (blit->ydir == -1)
|
||||
srcy = blit->height - srcy - 1;
|
||||
}
|
||||
|
||||
start = srcy * blit->src_pitch + srcx;
|
||||
|
||||
|
|
|
|||
|
|
@ -46,7 +46,7 @@ MODULE_FIRMWARE(FIRMWARE_G400);
|
|||
|
||||
#define WARP_UCODE_SIZE(size) ALIGN(size, MGA_WARP_CODE_ALIGN)
|
||||
|
||||
int mga_warp_install_microcode(drm_mga_private_t * dev_priv)
|
||||
int mga_warp_install_microcode(drm_mga_private_t *dev_priv)
|
||||
{
|
||||
unsigned char *vcbase = dev_priv->warp->handle;
|
||||
unsigned long pcbase = dev_priv->warp->offset;
|
||||
|
|
@ -133,7 +133,7 @@ out:
|
|||
|
||||
#define WMISC_EXPECTED (MGA_WUCODECACHE_ENABLE | MGA_WMASTER_ENABLE)
|
||||
|
||||
int mga_warp_init(drm_mga_private_t * dev_priv)
|
||||
int mga_warp_init(drm_mga_private_t *dev_priv)
|
||||
{
|
||||
u32 wmisc;
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue