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drm/mga: fixed brace, macro and spacing coding style issues 

Fixed brace, macro and spacing coding style issues.

Signed-off-by: Nicolas Kaiser <nikai@nikai.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Nicolas Kaiser 2010-07-12 01:46:57 +02:00 committed by Dave Airlie
parent 58c1e85af3
commit f2b2cb790e
6 changed files with 169 additions and 189 deletions
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49
drivers/gpu/drm/mga/mga_dma.c
View File

@ -142,11 +142,10 @@ void mga_do_dma_flush(drm_mga_private_t * dev_priv)
head = MGA_READ(MGA_PRIMADDRESS);
if (head <= tail) {
if (head <= tail)
primary->space = primary->size - primary->tail;
} else {
else
primary->space = head - tail;
}
DRM_DEBUG(" head = 0x%06lx\n", (unsigned long)(head - dev_priv->primary->offset));
DRM_DEBUG(" tail = 0x%06lx\n", (unsigned long)(tail - dev_priv->primary->offset));
@ -181,11 +180,10 @@ void mga_do_dma_wrap_start(drm_mga_private_t * dev_priv)
head = MGA_READ(MGA_PRIMADDRESS);
if (head == dev_priv->primary->offset) {
if (head == dev_priv->primary->offset)
primary->space = primary->size;
} else {
else
primary->space = head - dev_priv->primary->offset;
}
DRM_DEBUG(" head = 0x%06lx\n", (unsigned long)(head - dev_priv->primary->offset));
DRM_DEBUG(" tail = 0x%06x\n", primary->tail);
@ -220,7 +218,7 @@ void mga_do_dma_wrap_end(drm_mga_private_t * dev_priv)
* Freelist management
*/
#define MGA_BUFFER_USED ~0
#define MGA_BUFFER_USED (~0)
#define MGA_BUFFER_FREE 0
#if MGA_FREELIST_DEBUG
@ -481,12 +479,11 @@ static int mga_do_agp_dma_bootstrap(struct drm_device * dev,
*/
if (dev_priv->chipset == MGA_CARD_TYPE_G200) {
if (mode.mode & 0x02) {
if (mode.mode & 0x02)
MGA_WRITE(MGA_AGP_PLL, MGA_AGP2XPLL_ENABLE);
} else {
else
MGA_WRITE(MGA_AGP_PLL, MGA_AGP2XPLL_DISABLE);
}
}
/* Allocate and bind AGP memory. */
agp_req.size = agp_size;
@ -678,10 +675,9 @@ static int mga_do_pci_dma_bootstrap(struct drm_device * dev,
req.size = dma_bs->secondary_bin_size;
err = drm_addbufs_pci(dev, &req);
if (!err) {
if (!err)
break;
}
}
if (bin_count == 0) {
DRM_ERROR("Unable to add secondary DMA buffers: %d\n", err);
@ -737,17 +733,15 @@ static int mga_do_dma_bootstrap(struct drm_device * dev,
* carve off portions of it for internal uses. The remaining memory
* is returned to user-mode to be used for AGP textures.
*/
if (is_agp) {
if (is_agp)
err = mga_do_agp_dma_bootstrap(dev, dma_bs);
}
/* If we attempted to initialize the card for AGP DMA but failed,
* clean-up any mess that may have been created.
*/
if (err) {
if (err)
mga_do_cleanup_dma(dev, MINIMAL_CLEANUP);
}
/* Not only do we want to try and initialized PCI cards for PCI DMA,
* but we also try to initialized AGP cards that could not be
@ -757,9 +751,8 @@ static int mga_do_dma_bootstrap(struct drm_device * dev,
* AGP memory, etc.
*/
if (!is_agp || err) {
if (!is_agp || err)
err = mga_do_pci_dma_bootstrap(dev, dma_bs);
}
return err;
}
@ -800,11 +793,10 @@ static int mga_do_init_dma(struct drm_device * dev, drm_mga_init_t * init)
dev_priv = dev->dev_private;
if (init->sgram) {
if (init->sgram)
dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_BLK;
} else {
else
dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_RSTR;
}
dev_priv->maccess = init->maccess;
dev_priv->fb_cpp = init->fb_cpp;
@ -975,9 +967,8 @@ static int mga_do_cleanup_dma(struct drm_device *dev, int full_cleanup)
dev_priv->agp_handle = 0;
}
if ((dev->agp != NULL) && dev->agp->acquired) {
if ((dev->agp != NULL) && dev->agp->acquired)
err = drm_agp_release(dev);
}
#endif
}
@ -998,10 +989,9 @@ static int mga_do_cleanup_dma(struct drm_device *dev, int full_cleanup)
memset(dev_priv->warp_pipe_phys, 0,
sizeof(dev_priv->warp_pipe_phys));
if (dev_priv->head != NULL) {
if (dev_priv->head != NULL)
mga_freelist_cleanup(dev);
}
}
return err;
}
@ -1017,9 +1007,8 @@ int mga_dma_init(struct drm_device *dev, void *data,
switch (init->func) {
case MGA_INIT_DMA:
err = mga_do_init_dma(dev, init);
if (err) {
if (err)
(void)mga_do_cleanup_dma(dev, FULL_CLEANUP);
}
return err;
case MGA_CLEANUP_DMA:
return mga_do_cleanup_dma(dev, FULL_CLEANUP);
@ -1047,9 +1036,8 @@ int mga_dma_flush(struct drm_device *dev, void *data,
WRAP_WAIT_WITH_RETURN(dev_priv);
if (lock->flags & (_DRM_LOCK_FLUSH | _DRM_LOCK_FLUSH_ALL)) {
if (lock->flags & (_DRM_LOCK_FLUSH | _DRM_LOCK_FLUSH_ALL))
mga_do_dma_flush(dev_priv);
}
if (lock->flags & _DRM_LOCK_QUIESCENT) {
#if MGA_DMA_DEBUG
@ -1134,9 +1122,8 @@ int mga_dma_buffers(struct drm_device *dev, void *data,
d->granted_count = 0;
if (d->request_count) {
if (d->request_count)
ret = mga_dma_get_buffers(dev, file_priv, d);
}
return ret;
}

21
drivers/gpu/drm/mga/mga_drv.h
View File

@ -199,8 +199,8 @@ extern long mga_compat_ioctl(struct file *filp, unsigned int cmd,
#define MGA_BASE(reg) ((unsigned long)(dev_priv->mmio->handle))
#define MGA_ADDR(reg) (MGA_BASE(reg) + reg)
#define MGA_DEREF( reg ) *(volatile u32 *)MGA_ADDR( reg )
#define MGA_DEREF8( reg ) *(volatile u8 *)MGA_ADDR( reg )
#define MGA_DEREF(reg) (*(volatile u32 *)MGA_ADDR(reg))
#define MGA_DEREF8(reg) (*(volatile u8 *)MGA_ADDR(reg))
#define MGA_READ(reg) (_MGA_READ((u32 *)MGA_ADDR(reg)))
#define MGA_READ8(reg) (_MGA_READ((u8 *)MGA_ADDR(reg)))
@ -236,12 +236,11 @@ static inline u32 _MGA_READ(u32 * addr)
#define MGA_EMIT_STATE(dev_priv, dirty) \
do { \
if ((dirty) & ~MGA_UPLOAD_CLIPRECTS) { \
if ( dev_priv->chipset >= MGA_CARD_TYPE_G400 ) { \
if (dev_priv->chipset >= MGA_CARD_TYPE_G400) \
mga_g400_emit_state(dev_priv); \
} else { \
else \
mga_g200_emit_state(dev_priv); \
} \
} \
} while (0)
#define WRAP_TEST_WITH_RETURN(dev_priv) \
@ -304,10 +303,9 @@ do { \
#define ADVANCE_DMA() \
do { \
dev_priv->prim.tail = write; \
if ( MGA_VERBOSE ) { \
if (MGA_VERBOSE) \
DRM_INFO("ADVANCE_DMA() tail=0x%05x sp=0x%x\n", \
write, dev_priv->prim.space); \
} \
} while (0)
#define FLUSH_DMA() \
@ -320,23 +318,20 @@ do { \
dev_priv->primary->offset)); \
} \
if (!test_bit(0, &dev_priv->prim.wrapped)) { \
if ( dev_priv->prim.space < \
dev_priv->prim.high_mark ) { \
if (dev_priv->prim.space < dev_priv->prim.high_mark) \
mga_do_dma_wrap_start(dev_priv); \
} else { \
else \
mga_do_dma_flush(dev_priv); \
} \
} \
} while (0)
/* Never use this, always use DMA_BLOCK(...) for primary DMA output.
*/
#define DMA_WRITE(offset, val) \
do { \
if ( MGA_VERBOSE ) { \
if (MGA_VERBOSE) \
DRM_INFO(" DMA_WRITE( 0x%08x ) at 0x%04Zx\n", \
(u32)(val), write + (offset) * sizeof(u32)); \
} \
*(volatile u32 *)(prim + write + (offset) * sizeof(u32)) = val; \
} while (0)

3
drivers/gpu/drm/mga/mga_irq.c
View File

@ -76,9 +76,8 @@ irqreturn_t mga_driver_irq_handler(DRM_IRQ_ARGS)
/* In addition to clearing the interrupt-pending bit, we
* have to write to MGA_PRIMEND to re-start the DMA operation.
*/
if ((prim_start & ~0x03) != (prim_end & ~0x03)) {
if ((prim_start & ~0x03) != (prim_end & ~0x03))
MGA_WRITE(MGA_PRIMEND, prim_end);
}
atomic_inc(&dev_priv->last_fence_retired);
DRM_WAKEUP(&dev_priv->fence_queue);

3
drivers/gpu/drm/mga/mga_state.c
View File

@ -801,9 +801,8 @@ static void mga_dma_dispatch_blit(struct drm_device * dev, drm_mga_blit_t * blit
int w = pbox[i].x2 - pbox[i].x1 - 1;
int start;
if (blit->ydir == -1) {
if (blit->ydir == -1)
srcy = blit->height - srcy - 1;
}
start = srcy * blit->src_pitch + srcx;