ARM: tegra: Fix FLOW_CTLR_HALT register clobbering by tegra_resume()
commit d70f7d31a9
upstream.
There is an unfortunate typo in the code that results in writing to
FLOW_CTLR_HALT instead of FLOW_CTLR_CSR.
Cc: <stable@vger.kernel.org>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -44,16 +44,16 @@ ENTRY(tegra_resume)
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cmp r6, #TEGRA20
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beq 1f @ Yes
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/* Clear the flow controller flags for this CPU. */
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cpu_to_csr_reg r1, r0
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cpu_to_csr_reg r3, r0
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mov32 r2, TEGRA_FLOW_CTRL_BASE
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ldr r1, [r2, r1]
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ldr r1, [r2, r3]
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/* Clear event & intr flag */
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orr r1, r1, \
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#FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG
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movw r0, #0x3FFD @ enable, cluster_switch, immed, bitmaps
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@ & ext flags for CPU power mgnt
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bic r1, r1, r0
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str r1, [r2]
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str r1, [r2, r3]
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1:
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mov32 r9, 0xc09
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