From f3b7d0efc6b401c4e06cac45b085ddd56ba28208 Mon Sep 17 00:00:00 2001 From: Jyri Sarha Date: Wed, 3 Dec 2014 16:24:06 +0200 Subject: [PATCH] OMAPDSS: hdmi5: Fix bit field for IEC958_AES2_CON_SOURCE The bit field for IEC958_AES2_CON_SOURCE is bits 3-0 in HDMI_CORE_FC_AUDSCHNLS2, not imaginary bits 3-4 (reverse order). Signed-off-by: Jyri Sarha Signed-off-by: Tomi Valkeinen --- drivers/video/fbdev/omap2/dss/hdmi5_core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/video/fbdev/omap2/dss/hdmi5_core.c b/drivers/video/fbdev/omap2/dss/hdmi5_core.c index a71157935e33..a3cfe3d708f7 100644 --- a/drivers/video/fbdev/omap2/dss/hdmi5_core.c +++ b/drivers/video/fbdev/omap2/dss/hdmi5_core.c @@ -716,7 +716,7 @@ static void hdmi5_core_audio_config(struct hdmi_core_data *core, /* Source number */ val = cfg->iec60958_cfg->status[2] & IEC958_AES2_CON_SOURCE; - REG_FLD_MOD(base, HDMI_CORE_FC_AUDSCHNLS(2), val, 3, 4); + REG_FLD_MOD(base, HDMI_CORE_FC_AUDSCHNLS(2), val, 3, 0); /* Channel number right 0 */ REG_FLD_MOD(base, HDMI_CORE_FC_AUDSCHNLS(3), 2, 3, 0);