ARM: BCM5310X: activate erratas needed for SoC

The BCM4708 I have, which is probably the first generation which got
to the consumer market, is using a ARM Cortex-A9 rev r3p0 and a
L2C-310 rev r3p2 L2 cache controller. There are 3 workarounds for known
erratas in the Linux kernel which could be activated and will be in
this patch. There are currently no workarounds which have to be
activated for the L2C-310 rev r3p2 in Linux.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This commit is contained in:
Hauke Mehrtens 2015-11-21 15:29:47 +01:00 committed by Florian Fainelli
parent 937b12306e
commit f4ce7effe2
1 changed files with 4 additions and 0 deletions

View File

@ -52,6 +52,10 @@ config ARCH_BCM_NSP
config ARCH_BCM_5301X
bool "Broadcom BCM470X / BCM5301X ARM SoC" if ARCH_MULTI_V7
select ARCH_BCM_IPROC
select ARM_ERRATA_754322
select ARM_ERRATA_775420
select ARM_ERRATA_764369 if SMP
help
Support for Broadcom BCM470X and BCM5301X SoCs with ARM CPU cores.