Merge branch 'fixes' of git://git.infradead.org/users/vkoul/slave-dma
Pull slave-dmaengine fixes from Vinod Koul: "Here is the common fixes PULL for dmaengine. Dan has been working on fixing the build issues in bunch of drivers. Here we have one fixing s3c24xx-dma, along with fix from Russell on pl08x. Also we have Kuninori rcar dma fixes. The s3c24xx-dma which was added in last merge window missed updates to usage of DMA_COMPLETE so converting the last driver" * 'fixes' of git://git.infradead.org/users/vkoul/slave-dma: dma: fix build breakage in s3c24xx-dma Fix pl08x warnings rcar-hpbdma: initialise plane information when halted rcar-hpbdma: fixup channel busy check for double plane rcar-hpbdma: add max transfer size dma: mmp_pdma: add missing platform_set_drvdata() in mmp_pdma_probe() dmaengine: s3c24xx-dma: use DMA_COMPLETE for dma completion status
This commit is contained in:
commit
f649350591
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@ -1169,7 +1169,7 @@ static void pl08x_desc_free(struct virt_dma_desc *vd)
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struct pl08x_txd *txd = to_pl08x_txd(&vd->tx);
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struct pl08x_txd *txd = to_pl08x_txd(&vd->tx);
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struct pl08x_dma_chan *plchan = to_pl08x_chan(vd->tx.chan);
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struct pl08x_dma_chan *plchan = to_pl08x_chan(vd->tx.chan);
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dma_descriptor_unmap(txd);
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dma_descriptor_unmap(&vd->tx);
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if (!txd->done)
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if (!txd->done)
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pl08x_release_mux(plchan);
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pl08x_release_mux(plchan);
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@ -1017,6 +1017,7 @@ static int mmp_pdma_probe(struct platform_device *op)
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}
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}
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}
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}
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platform_set_drvdata(op, pdev);
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dev_info(pdev->device.dev, "initialized %d channels\n", dma_channels);
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dev_info(pdev->device.dev, "initialized %d channels\n", dma_channels);
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return 0;
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return 0;
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}
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}
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@ -628,42 +628,13 @@ retry:
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s3cchan->state = S3C24XX_DMA_CHAN_IDLE;
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s3cchan->state = S3C24XX_DMA_CHAN_IDLE;
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}
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}
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static void s3c24xx_dma_unmap_buffers(struct s3c24xx_txd *txd)
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{
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struct device *dev = txd->vd.tx.chan->device->dev;
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struct s3c24xx_sg *dsg;
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if (!(txd->vd.tx.flags & DMA_COMPL_SKIP_SRC_UNMAP)) {
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if (txd->vd.tx.flags & DMA_COMPL_SRC_UNMAP_SINGLE)
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list_for_each_entry(dsg, &txd->dsg_list, node)
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dma_unmap_single(dev, dsg->src_addr, dsg->len,
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DMA_TO_DEVICE);
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else {
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list_for_each_entry(dsg, &txd->dsg_list, node)
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dma_unmap_page(dev, dsg->src_addr, dsg->len,
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DMA_TO_DEVICE);
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}
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}
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if (!(txd->vd.tx.flags & DMA_COMPL_SKIP_DEST_UNMAP)) {
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if (txd->vd.tx.flags & DMA_COMPL_DEST_UNMAP_SINGLE)
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list_for_each_entry(dsg, &txd->dsg_list, node)
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dma_unmap_single(dev, dsg->dst_addr, dsg->len,
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DMA_FROM_DEVICE);
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else
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list_for_each_entry(dsg, &txd->dsg_list, node)
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dma_unmap_page(dev, dsg->dst_addr, dsg->len,
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DMA_FROM_DEVICE);
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}
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}
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static void s3c24xx_dma_desc_free(struct virt_dma_desc *vd)
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static void s3c24xx_dma_desc_free(struct virt_dma_desc *vd)
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{
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{
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struct s3c24xx_txd *txd = to_s3c24xx_txd(&vd->tx);
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struct s3c24xx_txd *txd = to_s3c24xx_txd(&vd->tx);
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struct s3c24xx_dma_chan *s3cchan = to_s3c24xx_dma_chan(vd->tx.chan);
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struct s3c24xx_dma_chan *s3cchan = to_s3c24xx_dma_chan(vd->tx.chan);
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if (!s3cchan->slave)
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if (!s3cchan->slave)
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s3c24xx_dma_unmap_buffers(txd);
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dma_descriptor_unmap(&vd->tx);
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s3c24xx_dma_free_txd(txd);
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s3c24xx_dma_free_txd(txd);
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}
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}
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@ -795,7 +766,7 @@ static enum dma_status s3c24xx_dma_tx_status(struct dma_chan *chan,
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spin_lock_irqsave(&s3cchan->vc.lock, flags);
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spin_lock_irqsave(&s3cchan->vc.lock, flags);
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ret = dma_cookie_status(chan, cookie, txstate);
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ret = dma_cookie_status(chan, cookie, txstate);
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if (ret == DMA_SUCCESS) {
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if (ret == DMA_COMPLETE) {
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spin_unlock_irqrestore(&s3cchan->vc.lock, flags);
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spin_unlock_irqrestore(&s3cchan->vc.lock, flags);
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return ret;
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return ret;
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}
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}
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@ -60,6 +60,7 @@
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#define HPB_DMAE_DSTPR_DMSTP BIT(0)
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#define HPB_DMAE_DSTPR_DMSTP BIT(0)
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/* DMA status register (DSTSR) bits */
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/* DMA status register (DSTSR) bits */
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#define HPB_DMAE_DSTSR_DQSTS BIT(2)
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#define HPB_DMAE_DSTSR_DMSTS BIT(0)
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#define HPB_DMAE_DSTSR_DMSTS BIT(0)
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/* DMA common registers */
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/* DMA common registers */
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@ -286,6 +287,9 @@ static void hpb_dmae_halt(struct shdma_chan *schan)
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ch_reg_write(chan, HPB_DMAE_DCMDR_DQEND, HPB_DMAE_DCMDR);
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ch_reg_write(chan, HPB_DMAE_DCMDR_DQEND, HPB_DMAE_DCMDR);
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ch_reg_write(chan, HPB_DMAE_DSTPR_DMSTP, HPB_DMAE_DSTPR);
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ch_reg_write(chan, HPB_DMAE_DSTPR_DMSTP, HPB_DMAE_DSTPR);
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chan->plane_idx = 0;
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chan->first_desc = true;
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}
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}
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static const struct hpb_dmae_slave_config *
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static const struct hpb_dmae_slave_config *
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@ -385,7 +389,10 @@ static bool hpb_dmae_channel_busy(struct shdma_chan *schan)
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struct hpb_dmae_chan *chan = to_chan(schan);
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struct hpb_dmae_chan *chan = to_chan(schan);
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u32 dstsr = ch_reg_read(chan, HPB_DMAE_DSTSR);
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u32 dstsr = ch_reg_read(chan, HPB_DMAE_DSTSR);
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return (dstsr & HPB_DMAE_DSTSR_DMSTS) == HPB_DMAE_DSTSR_DMSTS;
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if (chan->xfer_mode == XFER_DOUBLE)
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return dstsr & HPB_DMAE_DSTSR_DQSTS;
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else
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return dstsr & HPB_DMAE_DSTSR_DMSTS;
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}
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}
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static int
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static int
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@ -510,6 +517,8 @@ static int hpb_dmae_chan_probe(struct hpb_dmae_device *hpbdev, int id)
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}
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}
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schan = &new_hpb_chan->shdma_chan;
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schan = &new_hpb_chan->shdma_chan;
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schan->max_xfer_len = HPB_DMA_TCR_MAX;
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shdma_chan_probe(sdev, schan, id);
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shdma_chan_probe(sdev, schan, id);
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if (pdev->id >= 0)
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if (pdev->id >= 0)
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