drm/i915: Fix FBC_FENCE_OFF
Having a 4 byte register at 0x321b seems unlikely as that's not 4 byte aligned. Since later platforms have more or less the same FBC registers with new names, assume that FBC_FENCE_OFF is at 0x3218 just like DPFC_FENCE_YOFF. This feels like a simple typo in BSpec. 321Bh looks a lot like 3218h after all. Should still be tested on real hardware of course. But I don't have any mobile gen4 systems. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Acked-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -1048,7 +1048,7 @@
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#define FBC_CTL_IDLE_DEBUG (3<<2)
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#define FBC_CTL_CPU_FENCE (1<<1)
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#define FBC_CTL_PLANE(plane) ((plane)<<0)
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#define FBC_FENCE_OFF 0x0321b
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#define FBC_FENCE_OFF 0x03218 /* BSpec typo has 321Bh */
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#define FBC_TAG 0x03300
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#define FBC_LL_SIZE (1536)
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