staging: comedi: daqboard2000: remove struct daqboard2000_hw
In this driver the PCI bar 2 resource is being ioremap'ed to a void * in the private data. This void * is then being cast to a struct daqboard2000_hw * that defines all the registers used by the driver. This is causing a number of sparse warnings similar to: warning: incorrect type in argument 1 (different address space) expected void const volatile [noderef] <asn:2>*addr got void * Change the type in the private data to void __iomem * to correctly store the ioremap'ed address. Remove struct daqboard2000_hw and change the contents to #define's for the register memory map. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Cc: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -173,55 +173,38 @@ static const struct comedi_lrange range_daqboard2000_ao = { 1, {
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}
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};
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struct daqboard2000_hw {
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volatile u16 acqControl; /* 0x00 */
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volatile u16 acqScanListFIFO; /* 0x02 */
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volatile u32 acqPacerClockDivLow; /* 0x04 */
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volatile u16 acqScanCounter; /* 0x08 */
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volatile u16 acqPacerClockDivHigh; /* 0x0a */
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volatile u16 acqTriggerCount; /* 0x0c */
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volatile u16 fill2; /* 0x0e */
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volatile u16 acqResultsFIFO; /* 0x10 */
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volatile u16 fill3; /* 0x12 */
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volatile u16 acqResultsShadow; /* 0x14 */
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volatile u16 fill4; /* 0x16 */
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volatile u16 acqAdcResult; /* 0x18 */
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volatile u16 fill5; /* 0x1a */
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volatile u16 dacScanCounter; /* 0x1c */
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volatile u16 fill6; /* 0x1e */
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volatile u16 dacControl; /* 0x20 */
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volatile u16 fill7; /* 0x22 */
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volatile s16 dacFIFO; /* 0x24 */
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volatile u16 fill8[2]; /* 0x26 */
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volatile u16 dacPacerClockDiv; /* 0x2a */
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volatile u16 refDacs; /* 0x2c */
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volatile u16 fill9; /* 0x2e */
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volatile u16 dioControl; /* 0x30 */
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volatile s16 dioP3hsioData; /* 0x32 */
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volatile u16 dioP3Control; /* 0x34 */
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volatile u16 calEepromControl; /* 0x36 */
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volatile s16 dacSetting[4]; /* 0x38 */
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volatile s16 dioP2ExpansionIO8Bit[32]; /* 0x40 */
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volatile u16 ctrTmrControl; /* 0x80 */
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volatile u16 fill10[3]; /* 0x82 */
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volatile s16 ctrInput[4]; /* 0x88 */
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volatile u16 fill11[8]; /* 0x90 */
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volatile u16 timerDivisor[2]; /* 0xa0 */
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volatile u16 fill12[6]; /* 0xa4 */
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volatile u16 dmaControl; /* 0xb0 */
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volatile u16 trigControl; /* 0xb2 */
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volatile u16 fill13[2]; /* 0xb4 */
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volatile u16 calEeprom; /* 0xb8 */
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volatile u16 acqDigitalMark; /* 0xba */
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volatile u16 trigDacs; /* 0xbc */
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volatile u16 fill14; /* 0xbe */
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volatile s16 dioP2ExpansionIO16Bit[32]; /* 0xc0 */
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};
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/*
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* Register Memory Map
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*/
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#define acqControl 0x00 /* u16 */
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#define acqScanListFIFO 0x02 /* u16 */
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#define acqPacerClockDivLow 0x04 /* u32 */
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#define acqScanCounter 0x08 /* u16 */
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#define acqPacerClockDivHigh 0x0a /* u16 */
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#define acqTriggerCount 0x0c /* u16 */
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#define acqResultsFIFO 0x10 /* u16 */
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#define acqResultsShadow 0x14 /* u16 */
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#define acqAdcResult 0x18 /* u16 */
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#define dacScanCounter 0x1c /* u16 */
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#define dacControl 0x20 /* u16 */
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#define dacFIFO 0x24 /* s16 */
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#define dacPacerClockDiv 0x2a /* u16 */
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#define refDacs 0x2c /* u16 */
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#define dioControl 0x30 /* u16 */
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#define dioP3hsioData 0x32 /* s16 */
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#define dioP3Control 0x34 /* u16 */
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#define calEepromControl 0x36 /* u16 */
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#define dacSetting(x) (0x38 + (x)*2) /* s16 */
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#define dioP2ExpansionIO8Bit 0x40 /* s16 */
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#define ctrTmrControl 0x80 /* u16 */
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#define ctrInput(x) (0x88 + (x)*2) /* s16 */
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#define timerDivisor(x) (0xa0 + (x)*2) /* u16 */
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#define dmaControl 0xb0 /* u16 */
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#define trigControl 0xb2 /* u16 */
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#define calEeprom 0xb8 /* u16 */
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#define acqDigitalMark 0xba /* u16 */
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#define trigDacs 0xbc /* u16 */
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#define dioP2ExpansionIO16Bit(x) (0xc0 + (x)*2) /* s16 */
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/* Scan Sequencer programming */
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#define DAQBOARD2000_SeqStartScanList 0x0011
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@ -317,7 +300,7 @@ struct daqboard2000_private {
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enum {
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card_daqboard_2000
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} card;
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void *daq;
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void __iomem *daq;
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void __iomem *plx;
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unsigned int ao_readback[2];
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};
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@ -326,12 +309,10 @@ struct daqboard2000_private {
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static void writeAcqScanListEntry(struct comedi_device *dev, u16 entry)
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{
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struct daqboard2000_hw *fpga = devpriv->daq;
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/* udelay(4); */
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fpga->acqScanListFIFO = entry & 0x00ff;
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/* udelay(4); */
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fpga->acqScanListFIFO = (entry >> 8) & 0x00ff;
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/* udelay(4); */
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writew(entry & 0x00ff, devpriv->daq + acqScanListFIFO);
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/* udelay(4); */
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writew((entry >> 8) & 0x00ff, devpriv->daq + acqScanListFIFO);
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}
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static void setup_sampling(struct comedi_device *dev, int chan, int gain)
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@ -384,21 +365,21 @@ static int daqboard2000_ai_insn_read(struct comedi_device *dev,
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struct comedi_insn *insn,
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unsigned int *data)
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{
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int i;
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struct daqboard2000_hw *fpga = devpriv->daq;
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unsigned int val;
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int gain, chan, timeout;
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int i;
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fpga->acqControl =
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DAQBOARD2000_AcqResetScanListFifo |
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DAQBOARD2000_AcqResetResultsFifo | DAQBOARD2000_AcqResetConfigPipe;
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writew(DAQBOARD2000_AcqResetScanListFifo |
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DAQBOARD2000_AcqResetResultsFifo |
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DAQBOARD2000_AcqResetConfigPipe, devpriv->daq + acqControl);
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/*
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* If pacer clock is not set to some high value (> 10 us), we
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* risk multiple samples to be put into the result FIFO.
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*/
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/* 1 second, should be long enough */
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fpga->acqPacerClockDivLow = 1000000;
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fpga->acqPacerClockDivHigh = 0;
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writel(1000000, devpriv->daq + acqPacerClockDivLow);
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writew(0, devpriv->daq + acqPacerClockDivHigh);
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gain = CR_RANGE(insn->chanspec);
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chan = CR_CHAN(insn->chanspec);
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@ -410,28 +391,30 @@ static int daqboard2000_ai_insn_read(struct comedi_device *dev,
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for (i = 0; i < insn->n; i++) {
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setup_sampling(dev, chan, gain);
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/* Enable reading from the scanlist FIFO */
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fpga->acqControl = DAQBOARD2000_SeqStartScanList;
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writew(DAQBOARD2000_SeqStartScanList,
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devpriv->daq + acqControl);
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for (timeout = 0; timeout < 20; timeout++) {
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if (fpga->acqControl & DAQBOARD2000_AcqConfigPipeFull)
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val = readw(devpriv->daq + acqControl);
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if (val & DAQBOARD2000_AcqConfigPipeFull)
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break;
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/* udelay(2); */
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}
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fpga->acqControl = DAQBOARD2000_AdcPacerEnable;
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writew(DAQBOARD2000_AdcPacerEnable, devpriv->daq + acqControl);
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for (timeout = 0; timeout < 20; timeout++) {
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if (fpga->acqControl & DAQBOARD2000_AcqLogicScanning)
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val = readw(devpriv->daq + acqControl);
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if (val & DAQBOARD2000_AcqLogicScanning)
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break;
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/* udelay(2); */
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}
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for (timeout = 0; timeout < 20; timeout++) {
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if (fpga->acqControl &
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DAQBOARD2000_AcqResultsFIFOHasValidData) {
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val = readw(devpriv->daq + acqControl);
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if (val & DAQBOARD2000_AcqResultsFIFOHasValidData)
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break;
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}
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/* udelay(2); */
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}
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data[i] = fpga->acqResultsFIFO;
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fpga->acqControl = DAQBOARD2000_AdcPacerDisable;
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fpga->acqControl = DAQBOARD2000_SeqStopScanList;
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data[i] = readw(devpriv->daq + acqResultsFIFO);
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writew(DAQBOARD2000_AdcPacerDisable, devpriv->daq + acqControl);
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writew(DAQBOARD2000_SeqStopScanList, devpriv->daq + acqControl);
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}
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return i;
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@ -456,28 +439,38 @@ static int daqboard2000_ao_insn_write(struct comedi_device *dev,
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struct comedi_insn *insn,
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unsigned int *data)
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{
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int i;
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int chan = CR_CHAN(insn->chanspec);
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struct daqboard2000_hw *fpga = devpriv->daq;
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unsigned int val;
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int timeout;
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int i;
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for (i = 0; i < insn->n; i++) {
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#if 0
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/*
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* OK, since it works OK without enabling the DAC's, let's keep
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* it as simple as possible...
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* OK, since it works OK without enabling the DAC's,
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* let's keep it as simple as possible...
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*/
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/* fpga->dacControl = (chan + 2) * 0x0010 | 0x0001; udelay(1000); */
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fpga->dacSetting[chan] = data[i];
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writew((chan + 2) * 0x0010 | 0x0001,
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devpriv->daq + dacControl);
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udelay(1000);
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#endif
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writew(data[i], devpriv->daq + dacSetting(chan));
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for (timeout = 0; timeout < 20; timeout++) {
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if ((fpga->dacControl & ((chan + 1) * 0x0010)) == 0)
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val = readw(devpriv->daq + dacControl);
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if ((val & ((chan + 1) * 0x0010)) == 0)
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break;
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/* udelay(2); */
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}
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devpriv->ao_readback[chan] = data[i];
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#if 0
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/*
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* Since we never enabled the DAC's, we don't need to disable it...
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* fpga->dacControl = (chan + 2) * 0x0010 | 0x0000; udelay(1000);
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* Since we never enabled the DAC's, we don't need
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* to disable it...
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*/
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writew((chan + 2) * 0x0010 | 0x0000,
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devpriv->daq + dacControl);
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udelay(1000);
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#endif
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}
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return i;
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@ -608,21 +601,21 @@ static void daqboard2000_adcStopDmaTransfer(struct comedi_device *dev)
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static void daqboard2000_adcDisarm(struct comedi_device *dev)
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{
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struct daqboard2000_hw *fpga = devpriv->daq;
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/* Disable hardware triggers */
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udelay(2);
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fpga->trigControl = DAQBOARD2000_TrigAnalog | DAQBOARD2000_TrigDisable;
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writew(DAQBOARD2000_TrigAnalog | DAQBOARD2000_TrigDisable,
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devpriv->daq + trigControl);
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udelay(2);
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fpga->trigControl = DAQBOARD2000_TrigTTL | DAQBOARD2000_TrigDisable;
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writew(DAQBOARD2000_TrigTTL | DAQBOARD2000_TrigDisable,
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devpriv->daq + trigControl);
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/* Stop the scan list FIFO from loading the configuration pipe */
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udelay(2);
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fpga->acqControl = DAQBOARD2000_SeqStopScanList;
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writew(DAQBOARD2000_SeqStopScanList, devpriv->daq + acqControl);
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/* Stop the pacer clock */
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udelay(2);
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fpga->acqControl = DAQBOARD2000_AdcPacerDisable;
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writew(DAQBOARD2000_AdcPacerDisable, devpriv->daq + acqControl);
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/* Stop the input dma (abort channel 1) */
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daqboard2000_adcStopDmaTransfer(dev);
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@ -630,22 +623,24 @@ static void daqboard2000_adcDisarm(struct comedi_device *dev)
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static void daqboard2000_activateReferenceDacs(struct comedi_device *dev)
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{
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struct daqboard2000_hw *fpga = devpriv->daq;
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unsigned int val;
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int timeout;
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/* Set the + reference dac value in the FPGA */
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fpga->refDacs = 0x80 | DAQBOARD2000_PosRefDacSelect;
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writew(0x80 | DAQBOARD2000_PosRefDacSelect, devpriv->daq + refDacs);
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for (timeout = 0; timeout < 20; timeout++) {
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if ((fpga->dacControl & DAQBOARD2000_RefBusy) == 0)
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val = readw(devpriv->daq + dacControl);
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if ((val & DAQBOARD2000_RefBusy) == 0)
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break;
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udelay(2);
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}
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/* printk("DAQBOARD2000_PosRefDacSelect %d\n", timeout);*/
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/* Set the - reference dac value in the FPGA */
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fpga->refDacs = 0x80 | DAQBOARD2000_NegRefDacSelect;
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writew(0x80 | DAQBOARD2000_NegRefDacSelect, devpriv->daq + refDacs);
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for (timeout = 0; timeout < 20; timeout++) {
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if ((fpga->dacControl & DAQBOARD2000_RefBusy) == 0)
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val = readw(devpriv->daq + dacControl);
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if ((val & DAQBOARD2000_RefBusy) == 0)
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break;
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udelay(2);
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}
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@ -689,18 +684,14 @@ rmmod daqboard2000 ; rmmod comedi; make install ; modprobe daqboard2000; /usr/sb
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static int daqboard2000_8255_cb(int dir, int port, int data,
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unsigned long ioaddr)
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{
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int result = 0;
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void __iomem *mmio_base = (void __iomem *)ioaddr;
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if (dir) {
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writew(data, ((void *)ioaddr) + port * 2);
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result = 0;
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writew(data, mmio_base + port * 2);
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return 0;
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} else {
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result = readw(((void *)ioaddr) + port * 2);
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return readw(mmio_base + port * 2);
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}
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/*
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printk("daqboard2000_8255_cb %x %d %d %2.2x -> %2.2x\n",
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arg, dir, port, data, result);
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*/
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return result;
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}
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static struct pci_dev *daqboard2000_find_pci_dev(struct comedi_device *dev,
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@ -825,7 +816,7 @@ static int daqboard2000_attach(struct comedi_device *dev,
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s = &dev->subdevices[2];
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result = subdev_8255_init(dev, s, daqboard2000_8255_cb,
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(unsigned long)(devpriv->daq + 0x40));
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(unsigned long)(devpriv->daq + dioP2ExpansionIO8Bit));
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out:
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return result;
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