IOMMU Fixes for Linux v4.5-rc1

Five patches queued up:
 
 	* Two patches for the AMD and Intel IOMMU drivers to fix alias
 	  handling and ATS handling.
 
 	* Fix build error with arm io-pgtable code
 
 	* Two documentation fixes
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Merge tag 'iommu-fixes-v4.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu

Pull IOMMU fixes from Joerg Roedel:
 "Five patches queued up:

   - Two patches for the AMD and Intel IOMMU drivers to fix alias
     handling and ATS handling.

   - Fix build error with arm io-pgtable code

   - Two documentation fixes"

* tag 'iommu-fixes-v4.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu:
  iommu: Update struct iommu_ops comments
  iommu/vt-d: Fix link to Intel IOMMU Specification
  iommu/amd: Correct the wrong setting of alias DTE in do_attach
  iommu/vt-d: Don't skip PCI devices when disabling IOTLB
  iommu/io-pgtable-arm: Fix io-pgtable-arm build failure
This commit is contained in:
Linus Torvalds 2016-01-29 15:05:49 -08:00
commit f6a239a927
5 changed files with 16 additions and 7 deletions

View File

@ -3,7 +3,7 @@ Linux IOMMU Support
The architecture spec can be obtained from the below location.
http://www.intel.com/technology/virtualization/
http://www.intel.com/content/dam/www/public/us/en/documents/product-specifications/vt-directed-io-spec.pdf
This guide gives a quick cheat sheet for some basic understanding.

View File

@ -2049,7 +2049,7 @@ static void do_attach(struct iommu_dev_data *dev_data,
/* Update device table */
set_dte_entry(dev_data->devid, domain, ats);
if (alias != dev_data->devid)
set_dte_entry(dev_data->devid, domain, ats);
set_dte_entry(alias, domain, ats);
device_flush_dte(dev_data);
}

View File

@ -1489,7 +1489,7 @@ static void iommu_disable_dev_iotlb(struct device_domain_info *info)
{
struct pci_dev *pdev;
if (dev_is_pci(info->dev))
if (!dev_is_pci(info->dev))
return;
pdev = to_pci_dev(info->dev);

View File

@ -25,6 +25,7 @@
#include <linux/sizes.h>
#include <linux/slab.h>
#include <linux/types.h>
#include <linux/dma-mapping.h>
#include <asm/barrier.h>

View File

@ -133,8 +133,9 @@ struct iommu_dm_region {
/**
* struct iommu_ops - iommu ops and capabilities
* @domain_init: init iommu domain
* @domain_destroy: destroy iommu domain
* @capable: check capability
* @domain_alloc: allocate iommu domain
* @domain_free: free iommu domain
* @attach_dev: attach device to an iommu domain
* @detach_dev: detach device from an iommu domain
* @map: map a physically contiguous memory region to an iommu domain
@ -144,8 +145,15 @@ struct iommu_dm_region {
* @iova_to_phys: translate iova to physical address
* @add_device: add device to iommu grouping
* @remove_device: remove device from iommu grouping
* @device_group: find iommu group for a particular device
* @domain_get_attr: Query domain attributes
* @domain_set_attr: Change domain attributes
* @get_dm_regions: Request list of direct mapping requirements for a device
* @put_dm_regions: Free list of direct mapping requirements for a device
* @domain_window_enable: Configure and enable a particular window for a domain
* @domain_window_disable: Disable a particular window for a domain
* @domain_set_windows: Set the number of windows for a domain
* @domain_get_windows: Return the number of windows for a domain
* @of_xlate: add OF master IDs to iommu grouping
* @pgsize_bitmap: bitmap of supported page sizes
* @priv: per-instance data private to the iommu driver
@ -182,9 +190,9 @@ struct iommu_ops {
int (*domain_window_enable)(struct iommu_domain *domain, u32 wnd_nr,
phys_addr_t paddr, u64 size, int prot);
void (*domain_window_disable)(struct iommu_domain *domain, u32 wnd_nr);
/* Set the numer of window per domain */
/* Set the number of windows per domain */
int (*domain_set_windows)(struct iommu_domain *domain, u32 w_count);
/* Get the numer of window per domain */
/* Get the number of windows per domain */
u32 (*domain_get_windows)(struct iommu_domain *domain);
#ifdef CONFIG_OF_IOMMU