gpio: samsung: Fix off-by-one bug in gpio addresses

Move gpc4 to the end of the automatically processed gpio controllers so
we don't taint the automatic offset calculation.

This bug caused all controllers coming after gpc4 to map to the
incorrect address. The result is <&gpd1 0 0 0 0> would actually map to
GPIO 0 in gpd0.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Doug Anderson <dianders@chromium.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Sean Paul 2012-07-20 13:58:59 -07:00 committed by Linus Walleij
parent 5230f8fe9a
commit f7093f3e7a
1 changed files with 7 additions and 7 deletions

View File

@ -2452,12 +2452,6 @@ static struct samsung_gpio_chip exynos5_gpios_1[] = {
.ngpio = EXYNOS5_GPIO_C3_NR,
.label = "GPC3",
},
}, {
.chip = {
.base = EXYNOS5_GPC4(0),
.ngpio = EXYNOS5_GPIO_C4_NR,
.label = "GPC4",
},
}, {
.chip = {
.base = EXYNOS5_GPD0(0),
@ -2512,6 +2506,12 @@ static struct samsung_gpio_chip exynos5_gpios_1[] = {
.ngpio = EXYNOS5_GPIO_Y6_NR,
.label = "GPY6",
},
}, {
.chip = {
.base = EXYNOS5_GPC4(0),
.ngpio = EXYNOS5_GPIO_C4_NR,
.label = "GPC4",
},
}, {
.config = &samsung_gpio_cfgs[9],
.irq_base = IRQ_EINT(0),
@ -2836,7 +2836,7 @@ static __init void exynos5_gpiolib_init(void)
}
/* need to set base address for gpc4 */
exynos5_gpios_1[11].base = gpio_base1 + 0x2E0;
exynos5_gpios_1[20].base = gpio_base1 + 0x2E0;
/* need to set base address for gpx */
chip = &exynos5_gpios_1[21];