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media: v4l: fwnode: C-PHY has no clock lane 

C-PHY doesn't use a clock lane, hence the test for the clock lane when
there isn't one is faulty. Rework the test for the conflicting clock lane.

Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
This commit is contained in:
Sakari Ailus 2019-05-03 06:39:41 -04:00 committed by Mauro Carvalho Chehab
parent d7ac8b1bd2
commit f8075c1cdc
1 changed files with 4 additions and 4 deletions
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8
drivers/media/v4l2-core/v4l2-fwnode.c
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@ -212,10 +212,10 @@ static int v4l2_fwnode_endpoint_parse_csi2_bus(struct fwnode_handle *fwnode,
have_clk_lane = true;
}
if (lanes_used & BIT(clock_lane)) {
if (have_clk_lane || !use_default_lane_mapping)
pr_warn("duplicated lane %u in clock-lanes, using defaults\n",
v);
if (have_clk_lane && lanes_used & BIT(clock_lane) &&
!use_default_lane_mapping) {
pr_warn("duplicated lane %u in clock-lanes, using defaults\n",
v);
use_default_lane_mapping = true;
}