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intelfb: add vsync interrupt support 

[05/05] intelfb: Honor FB_ACTIVATE_VBL for display panning

Extends the intelfb_vsync struct to store panning offset. The interrupt service routine uses the stored panning offset if a pan is requested for the vsync. intelfbhw_disable_irq also pans the display if there is a pending request.

Signed-off-by: Eric Hustvedt <ehustvedt@cecropia.com>
This commit is contained in:
Eric Hustvedt 2006-06-20 14:36:42 -04:00 committed by Dave Airlie
parent 37bced38b3
commit f80d0d23f2
3 changed files with 19 additions and 1 deletions
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2
drivers/video/intelfb/intelfb.h
View File

@ -211,6 +211,8 @@ struct intelfb_heap_data {
struct intelfb_vsync {
wait_queue_head_t wait;
unsigned int count;
int pan_display;
u32 pan_offset;
};
struct intelfb_info {

2
drivers/video/intelfb/intelfbdrv.c
View File

@ -900,6 +900,8 @@ intelfb_pci_register(struct pci_dev *pdev, const struct pci_device_id *ent)
init_waitqueue_head(&dinfo->vsync.wait);
spin_lock_init(&dinfo->int_lock);
dinfo->irq_flags = 0;
dinfo->vsync.pan_display = 0;
dinfo->vsync.pan_offset = 0;
return 0;

16
drivers/video/intelfb/intelfbhw.c
View File

@ -371,7 +371,13 @@ intelfbhw_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
offset += dinfo->fb.offset << 12;
OUTREG(DSPABASE, offset);
dinfo->vsync.pan_offset = offset;
if ((var->activate & FB_ACTIVATE_VBL) && !intelfbhw_enable_irq(dinfo, 0)) {
dinfo->vsync.pan_display = 1;
} else {
dinfo->vsync.pan_display = 0;
OUTREG(DSPABASE, offset);
}
return 0;
}
@ -1965,6 +1971,10 @@ intelfbhw_irq(int irq, void *dev_id, struct pt_regs *fp) {
if (tmp & VSYNC_PIPE_A_INTERRUPT) {
dinfo->vsync.count++;
if (dinfo->vsync.pan_display) {
dinfo->vsync.pan_display = 0;
OUTREG(DSPABASE, dinfo->vsync.pan_offset);
}
wake_up_interruptible(&dinfo->vsync.wait);
handled = 1;
}
@ -2007,6 +2017,10 @@ intelfbhw_disable_irq(struct intelfb_info *dinfo) {
u16 tmp;
if (test_and_clear_bit(0, &dinfo->irq_flags)) {
if (dinfo->vsync.pan_display) {
dinfo->vsync.pan_display = 0;
OUTREG(DSPABASE, dinfo->vsync.pan_offset);
}
spin_lock_irq(&dinfo->int_lock);
OUTREG16(HWSTAM, 0xffff);
OUTREG16(IMR, 0xffff);