arm64: percpu: Implement this_cpu operations
The generic this_cpu operations disable interrupts to ensure that the requested operation is protected from pre-emption. For arm64, this is overkill and can hurt throughput and latency. This patch provides arm64 specific implementations for the this_cpu operations. Rather than disable interrupts, we use the exclusive monitor or atomic operations as appropriate. The following operations are implemented: add, add_return, and, or, read, write, xchg. We also wire up a cmpxchg implementation from cmpxchg.h. Testing was performed using the percpu_test module and hackbench on a Juno board running 3.18-rc4. Signed-off-by: Steve Capper <steve.capper@linaro.org> Reviewed-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
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@ -246,8 +246,10 @@ static inline unsigned long __cmpxchg_mb(volatile void *ptr, unsigned long old,
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__ret; \
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__ret; \
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})
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})
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#define this_cpu_cmpxchg_8(ptr, o, n) \
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#define this_cpu_cmpxchg_1(ptr, o, n) cmpxchg_local(raw_cpu_ptr(&(ptr)), o, n)
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cmpxchg_local(raw_cpu_ptr(&(ptr)), o, n)
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#define this_cpu_cmpxchg_2(ptr, o, n) cmpxchg_local(raw_cpu_ptr(&(ptr)), o, n)
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#define this_cpu_cmpxchg_4(ptr, o, n) cmpxchg_local(raw_cpu_ptr(&(ptr)), o, n)
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#define this_cpu_cmpxchg_8(ptr, o, n) cmpxchg_local(raw_cpu_ptr(&(ptr)), o, n)
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#define this_cpu_cmpxchg_double_8(ptr1, ptr2, o1, o2, n1, n2) \
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#define this_cpu_cmpxchg_double_8(ptr1, ptr2, o1, o2, n1, n2) \
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cmpxchg_double_local(raw_cpu_ptr(&(ptr1)), raw_cpu_ptr(&(ptr2)), \
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cmpxchg_double_local(raw_cpu_ptr(&(ptr1)), raw_cpu_ptr(&(ptr2)), \
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@ -44,6 +44,221 @@ static inline unsigned long __my_cpu_offset(void)
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#endif /* CONFIG_SMP */
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#endif /* CONFIG_SMP */
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#define PERCPU_OP(op, asm_op) \
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static inline unsigned long __percpu_##op(void *ptr, \
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unsigned long val, int size) \
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{ \
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unsigned long loop, ret; \
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\
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switch (size) { \
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case 1: \
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do { \
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asm ("//__per_cpu_" #op "_1\n" \
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"ldxrb %w[ret], %[ptr]\n" \
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#asm_op " %w[ret], %w[ret], %w[val]\n" \
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"stxrb %w[loop], %w[ret], %[ptr]\n" \
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: [loop] "=&r" (loop), [ret] "=&r" (ret), \
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[ptr] "+Q"(*(u8 *)ptr) \
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: [val] "Ir" (val)); \
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} while (loop); \
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break; \
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case 2: \
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do { \
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asm ("//__per_cpu_" #op "_2\n" \
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"ldxrh %w[ret], %[ptr]\n" \
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#asm_op " %w[ret], %w[ret], %w[val]\n" \
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"stxrh %w[loop], %w[ret], %[ptr]\n" \
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: [loop] "=&r" (loop), [ret] "=&r" (ret), \
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[ptr] "+Q"(*(u16 *)ptr) \
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: [val] "Ir" (val)); \
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} while (loop); \
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break; \
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case 4: \
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do { \
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asm ("//__per_cpu_" #op "_4\n" \
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"ldxr %w[ret], %[ptr]\n" \
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#asm_op " %w[ret], %w[ret], %w[val]\n" \
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"stxr %w[loop], %w[ret], %[ptr]\n" \
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: [loop] "=&r" (loop), [ret] "=&r" (ret), \
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[ptr] "+Q"(*(u32 *)ptr) \
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: [val] "Ir" (val)); \
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} while (loop); \
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break; \
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case 8: \
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do { \
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asm ("//__per_cpu_" #op "_8\n" \
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"ldxr %[ret], %[ptr]\n" \
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#asm_op " %[ret], %[ret], %[val]\n" \
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"stxr %w[loop], %[ret], %[ptr]\n" \
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: [loop] "=&r" (loop), [ret] "=&r" (ret), \
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[ptr] "+Q"(*(u64 *)ptr) \
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: [val] "Ir" (val)); \
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} while (loop); \
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break; \
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default: \
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BUILD_BUG(); \
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} \
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\
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return ret; \
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}
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PERCPU_OP(add, add)
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PERCPU_OP(and, and)
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PERCPU_OP(or, orr)
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#undef PERCPU_OP
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static inline unsigned long __percpu_read(void *ptr, int size)
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{
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unsigned long ret;
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switch (size) {
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case 1:
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ret = ACCESS_ONCE(*(u8 *)ptr);
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break;
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case 2:
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ret = ACCESS_ONCE(*(u16 *)ptr);
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break;
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case 4:
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ret = ACCESS_ONCE(*(u32 *)ptr);
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break;
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case 8:
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ret = ACCESS_ONCE(*(u64 *)ptr);
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break;
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default:
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BUILD_BUG();
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}
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return ret;
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}
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static inline void __percpu_write(void *ptr, unsigned long val, int size)
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{
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switch (size) {
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case 1:
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ACCESS_ONCE(*(u8 *)ptr) = (u8)val;
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break;
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case 2:
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ACCESS_ONCE(*(u16 *)ptr) = (u16)val;
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break;
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case 4:
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ACCESS_ONCE(*(u32 *)ptr) = (u32)val;
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break;
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case 8:
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ACCESS_ONCE(*(u64 *)ptr) = (u64)val;
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break;
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default:
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BUILD_BUG();
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}
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}
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static inline unsigned long __percpu_xchg(void *ptr, unsigned long val,
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int size)
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{
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unsigned long ret, loop;
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switch (size) {
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case 1:
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do {
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asm ("//__percpu_xchg_1\n"
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"ldxrb %w[ret], %[ptr]\n"
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"stxrb %w[loop], %w[val], %[ptr]\n"
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: [loop] "=&r"(loop), [ret] "=&r"(ret),
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[ptr] "+Q"(*(u8 *)ptr)
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: [val] "r" (val));
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} while (loop);
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break;
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case 2:
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do {
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asm ("//__percpu_xchg_2\n"
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"ldxrh %w[ret], %[ptr]\n"
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"stxrh %w[loop], %w[val], %[ptr]\n"
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: [loop] "=&r"(loop), [ret] "=&r"(ret),
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[ptr] "+Q"(*(u16 *)ptr)
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: [val] "r" (val));
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} while (loop);
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break;
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case 4:
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do {
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asm ("//__percpu_xchg_4\n"
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"ldxr %w[ret], %[ptr]\n"
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"stxr %w[loop], %w[val], %[ptr]\n"
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: [loop] "=&r"(loop), [ret] "=&r"(ret),
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[ptr] "+Q"(*(u32 *)ptr)
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: [val] "r" (val));
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} while (loop);
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break;
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case 8:
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do {
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asm ("//__percpu_xchg_8\n"
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"ldxr %[ret], %[ptr]\n"
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"stxr %w[loop], %[val], %[ptr]\n"
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: [loop] "=&r"(loop), [ret] "=&r"(ret),
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[ptr] "+Q"(*(u64 *)ptr)
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: [val] "r" (val));
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} while (loop);
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break;
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default:
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BUILD_BUG();
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}
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return ret;
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}
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#define _percpu_add(pcp, val) \
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__percpu_add(raw_cpu_ptr(&(pcp)), val, sizeof(pcp))
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#define _percpu_add_return(pcp, val) (typeof(pcp)) (_percpu_add(pcp, val))
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#define _percpu_and(pcp, val) \
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__percpu_and(raw_cpu_ptr(&(pcp)), val, sizeof(pcp))
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#define _percpu_or(pcp, val) \
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__percpu_or(raw_cpu_ptr(&(pcp)), val, sizeof(pcp))
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#define _percpu_read(pcp) (typeof(pcp)) \
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(__percpu_read(raw_cpu_ptr(&(pcp)), sizeof(pcp)))
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#define _percpu_write(pcp, val) \
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__percpu_write(raw_cpu_ptr(&(pcp)), (unsigned long)(val), sizeof(pcp))
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#define _percpu_xchg(pcp, val) (typeof(pcp)) \
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(__percpu_xchg(raw_cpu_ptr(&(pcp)), (unsigned long)(val), sizeof(pcp)))
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#define this_cpu_add_1(pcp, val) _percpu_add(pcp, val)
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#define this_cpu_add_2(pcp, val) _percpu_add(pcp, val)
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#define this_cpu_add_4(pcp, val) _percpu_add(pcp, val)
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#define this_cpu_add_8(pcp, val) _percpu_add(pcp, val)
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#define this_cpu_add_return_1(pcp, val) _percpu_add_return(pcp, val)
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#define this_cpu_add_return_2(pcp, val) _percpu_add_return(pcp, val)
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#define this_cpu_add_return_4(pcp, val) _percpu_add_return(pcp, val)
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#define this_cpu_add_return_8(pcp, val) _percpu_add_return(pcp, val)
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#define this_cpu_and_1(pcp, val) _percpu_and(pcp, val)
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#define this_cpu_and_2(pcp, val) _percpu_and(pcp, val)
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#define this_cpu_and_4(pcp, val) _percpu_and(pcp, val)
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#define this_cpu_and_8(pcp, val) _percpu_and(pcp, val)
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#define this_cpu_or_1(pcp, val) _percpu_or(pcp, val)
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#define this_cpu_or_2(pcp, val) _percpu_or(pcp, val)
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#define this_cpu_or_4(pcp, val) _percpu_or(pcp, val)
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#define this_cpu_or_8(pcp, val) _percpu_or(pcp, val)
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#define this_cpu_read_1(pcp) _percpu_read(pcp)
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#define this_cpu_read_2(pcp) _percpu_read(pcp)
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#define this_cpu_read_4(pcp) _percpu_read(pcp)
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#define this_cpu_read_8(pcp) _percpu_read(pcp)
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#define this_cpu_write_1(pcp, val) _percpu_write(pcp, val)
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#define this_cpu_write_2(pcp, val) _percpu_write(pcp, val)
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#define this_cpu_write_4(pcp, val) _percpu_write(pcp, val)
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#define this_cpu_write_8(pcp, val) _percpu_write(pcp, val)
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#define this_cpu_xchg_1(pcp, val) _percpu_xchg(pcp, val)
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#define this_cpu_xchg_2(pcp, val) _percpu_xchg(pcp, val)
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#define this_cpu_xchg_4(pcp, val) _percpu_xchg(pcp, val)
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#define this_cpu_xchg_8(pcp, val) _percpu_xchg(pcp, val)
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#include <asm-generic/percpu.h>
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#include <asm-generic/percpu.h>
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#endif /* __ASM_PERCPU_H */
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#endif /* __ASM_PERCPU_H */
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