[PATCH] ppc32: Add soft reset to MPC834x
This change allows mpc83xx_restart to issue a software reset. Signed-off-by: Randy Vinson <rvinson@mvista.com> Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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@ -28,6 +28,12 @@
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#define BCSR_PHYS_ADDR ((uint)0xf8000000)
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#define BCSR_SIZE ((uint)(32 * 1024))
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#define BCSR_MISC_REG2_OFF 0x07
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#define BCSR_MISC_REG2_PORESET 0x01
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#define BCSR_MISC_REG3_OFF 0x08
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#define BCSR_MISC_REG3_CNFLOCK 0x80
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#ifdef CONFIG_PCI
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/* PCI interrupt controller */
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#define PIRQA MPC83xx_IRQ_IRQ4
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@ -29,6 +29,7 @@
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#include <asm/mmu.h>
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#include <asm/ppc_sys.h>
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#include <asm/kgdb.h>
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#include <asm/delay.h>
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#include <syslib/ppc83xx_setup.h>
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@ -117,7 +118,34 @@ mpc83xx_early_serial_map(void)
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void
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mpc83xx_restart(char *cmd)
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{
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volatile unsigned char __iomem *reg;
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unsigned char tmp;
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reg = ioremap(BCSR_PHYS_ADDR, BCSR_SIZE);
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local_irq_disable();
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/*
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* Unlock the BCSR bits so a PRST will update the contents.
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* Otherwise the reset asserts but doesn't clear.
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*/
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tmp = in_8(reg + BCSR_MISC_REG3_OFF);
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tmp |= BCSR_MISC_REG3_CNFLOCK; /* low true, high false */
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out_8(reg + BCSR_MISC_REG3_OFF, tmp);
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/*
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* Trigger a reset via a low->high transition of the
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* PORESET bit.
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*/
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tmp = in_8(reg + BCSR_MISC_REG2_OFF);
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tmp &= ~BCSR_MISC_REG2_PORESET;
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out_8(reg + BCSR_MISC_REG2_OFF, tmp);
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udelay(1);
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tmp |= BCSR_MISC_REG2_PORESET;
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out_8(reg + BCSR_MISC_REG2_OFF, tmp);
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for(;;);
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}
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