scsi: hisi_sas: Don't lock DQ for complete task sending
Currently we lock the DQ to protect whole delivery process. So this stops us building slots for the same queue in parallel, and can affect performance. To optimise it, only lock the DQ during special periods, specifically when allocating a slot from the DQ and when delivering a slot to the HW. This approach is now safe, thanks to the previous patches to ensure that we always deliver a slot to the HW once allocated. Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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@ -161,7 +161,7 @@ struct hisi_sas_cq {
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struct hisi_sas_dq {
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struct hisi_hba *hisi_hba;
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struct hisi_sas_slot *slot_prep;
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struct list_head list;
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spinlock_t lock;
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int wr_point;
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int id;
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@ -181,6 +181,7 @@ struct hisi_sas_device {
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struct hisi_sas_slot {
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struct list_head entry;
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struct list_head delivery;
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struct sas_task *task;
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struct hisi_sas_port *port;
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u64 n_elem;
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@ -190,6 +191,7 @@ struct hisi_sas_slot {
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int cmplt_queue_slot;
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int idx;
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int abort;
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int ready;
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void *buf;
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dma_addr_t buf_dma;
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void *cmd_hdr;
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@ -307,9 +307,9 @@ out:
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task->task_done(task);
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}
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static int hisi_sas_task_prep(struct sas_task *task, struct hisi_sas_dq
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*dq, int is_tmf, struct hisi_sas_tmf_task *tmf,
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int *pass)
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static int hisi_sas_task_prep(struct sas_task *task, struct hisi_sas_dq *dq,
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int is_tmf, struct hisi_sas_tmf_task *tmf,
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int *pass)
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{
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struct hisi_hba *hisi_hba = dq->hisi_hba;
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struct domain_device *device = task->dev;
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@ -321,7 +321,8 @@ static int hisi_sas_task_prep(struct sas_task *task, struct hisi_sas_dq
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struct device *dev = hisi_hba->dev;
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int dlvry_queue_slot, dlvry_queue, rc, slot_idx;
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int n_elem = 0, n_elem_req = 0, n_elem_resp = 0;
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unsigned long flags;
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unsigned long flags, flags_dq;
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int wr_q_index;
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if (!sas_port) {
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struct task_status_struct *ts = &task->task_status;
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@ -422,12 +423,18 @@ static int hisi_sas_task_prep(struct sas_task *task, struct hisi_sas_dq
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goto err_out_tag;
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}
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rc = hisi_hba->hw->get_free_slot(hisi_hba, dq);
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if (rc)
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spin_lock_irqsave(&dq->lock, flags_dq);
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wr_q_index = hisi_hba->hw->get_free_slot(hisi_hba, dq);
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if (wr_q_index < 0) {
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spin_unlock_irqrestore(&dq->lock, flags_dq);
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goto err_out_buf;
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}
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list_add_tail(&slot->delivery, &dq->list);
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spin_unlock_irqrestore(&dq->lock, flags_dq);
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dlvry_queue = dq->id;
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dlvry_queue_slot = dq->wr_point;
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dlvry_queue_slot = wr_q_index;
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slot->idx = slot_idx;
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slot->n_elem = n_elem;
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@ -471,8 +478,8 @@ static int hisi_sas_task_prep(struct sas_task *task, struct hisi_sas_dq
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task->task_state_flags |= SAS_TASK_AT_INITIATOR;
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spin_unlock_irqrestore(&task->task_state_lock, flags);
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dq->slot_prep = slot;
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++(*pass);
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slot->ready = 1;
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return 0;
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@ -518,11 +525,11 @@ static int hisi_sas_task_exec(struct sas_task *task, gfp_t gfp_flags,
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return -EINVAL;
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/* protect task_prep and start_delivery sequence */
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spin_lock_irqsave(&dq->lock, flags);
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rc = hisi_sas_task_prep(task, dq, is_tmf, tmf, &pass);
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if (rc)
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dev_err(dev, "task exec: failed[%d]!\n", rc);
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spin_lock_irqsave(&dq->lock, flags);
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if (likely(pass))
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hisi_hba->hw->start_delivery(dq);
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spin_unlock_irqrestore(&dq->lock, flags);
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@ -1503,7 +1510,8 @@ hisi_sas_internal_abort_task_exec(struct hisi_hba *hisi_hba, int device_id,
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struct hisi_sas_cmd_hdr *cmd_hdr_base;
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struct hisi_sas_dq *dq = sas_dev->dq;
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int dlvry_queue_slot, dlvry_queue, n_elem = 0, rc, slot_idx;
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unsigned long flags, flags_dq;
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unsigned long flags, flags_dq = 0;
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int wr_q_index;
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if (unlikely(test_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags)))
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return -EINVAL;
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@ -1531,16 +1539,18 @@ hisi_sas_internal_abort_task_exec(struct hisi_hba *hisi_hba, int device_id,
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rc = -ENOMEM;
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goto err_out_tag;
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}
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spin_lock_irqsave(&dq->lock, flags_dq);
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rc = hisi_hba->hw->get_free_slot(hisi_hba, dq);
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if (rc) {
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rc = -ENOMEM;
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wr_q_index = hisi_hba->hw->get_free_slot(hisi_hba, dq);
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if (wr_q_index < 0) {
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spin_unlock_irqrestore(&dq->lock, flags_dq);
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goto err_out_buf;
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}
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list_add_tail(&slot->delivery, &dq->list);
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spin_unlock_irqrestore(&dq->lock, flags_dq);
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dlvry_queue = dq->id;
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dlvry_queue_slot = dq->wr_point;
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dlvry_queue_slot = wr_q_index;
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slot->idx = slot_idx;
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slot->n_elem = n_elem;
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@ -1560,18 +1570,16 @@ hisi_sas_internal_abort_task_exec(struct hisi_hba *hisi_hba, int device_id,
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hisi_sas_task_prep_abort(hisi_hba, slot, device_id,
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abort_flag, task_tag);
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spin_lock_irqsave(&hisi_hba->lock, flags);
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list_add_tail(&slot->entry, &sas_dev->list);
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spin_unlock_irqrestore(&hisi_hba->lock, flags);
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spin_lock_irqsave(&task->task_state_lock, flags);
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task->task_state_flags |= SAS_TASK_AT_INITIATOR;
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spin_unlock_irqrestore(&task->task_state_lock, flags);
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dq->slot_prep = slot;
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slot->ready = 1;
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/* send abort command to the chip */
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spin_lock_irqsave(&dq->lock, flags);
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list_add_tail(&slot->entry, &sas_dev->list);
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hisi_hba->hw->start_delivery(dq);
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spin_unlock_irqrestore(&dq->lock, flags_dq);
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spin_unlock_irqrestore(&dq->lock, flags);
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return 0;
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@ -1856,6 +1864,7 @@ int hisi_sas_alloc(struct hisi_hba *hisi_hba, struct Scsi_Host *shost)
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/* Delivery queue structure */
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spin_lock_init(&dq->lock);
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INIT_LIST_HEAD(&dq->list);
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dq->id = i;
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dq->hisi_hba = hisi_hba;
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@ -921,18 +921,33 @@ get_free_slot_v1_hw(struct hisi_hba *hisi_hba, struct hisi_sas_dq *dq)
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return -EAGAIN;
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}
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return 0;
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dq->wr_point = (dq->wr_point + 1) % HISI_SAS_QUEUE_SLOTS;
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return w;
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}
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/* DQ lock must be taken here */
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static void start_delivery_v1_hw(struct hisi_sas_dq *dq)
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{
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struct hisi_hba *hisi_hba = dq->hisi_hba;
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int dlvry_queue = dq->slot_prep->dlvry_queue;
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int dlvry_queue_slot = dq->slot_prep->dlvry_queue_slot;
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struct hisi_sas_slot *s, *s1;
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struct list_head *dq_list;
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int dlvry_queue = dq->id;
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int wp, count = 0;
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dq->wr_point = ++dlvry_queue_slot % HISI_SAS_QUEUE_SLOTS;
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hisi_sas_write32(hisi_hba, DLVRY_Q_0_WR_PTR + (dlvry_queue * 0x14),
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dq->wr_point);
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dq_list = &dq->list;
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list_for_each_entry_safe(s, s1, &dq->list, delivery) {
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if (!s->ready)
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break;
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count++;
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wp = (s->dlvry_queue_slot + 1) % HISI_SAS_QUEUE_SLOTS;
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list_del(&s->delivery);
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}
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if (!count)
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return;
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hisi_sas_write32(hisi_hba, DLVRY_Q_0_WR_PTR + (dlvry_queue * 0x14), wp);
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}
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static void prep_prd_sge_v1_hw(struct hisi_hba *hisi_hba,
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@ -1663,23 +1663,38 @@ get_free_slot_v2_hw(struct hisi_hba *hisi_hba, struct hisi_sas_dq *dq)
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r = hisi_sas_read32_relaxed(hisi_hba,
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DLVRY_Q_0_RD_PTR + (queue * 0x14));
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if (r == (w+1) % HISI_SAS_QUEUE_SLOTS) {
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dev_warn(dev, "full queue=%d r=%d w=%d\n\n",
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dev_warn(dev, "full queue=%d r=%d w=%d\n",
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queue, r, w);
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return -EAGAIN;
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}
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return 0;
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dq->wr_point = (dq->wr_point + 1) % HISI_SAS_QUEUE_SLOTS;
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return w;
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}
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/* DQ lock must be taken here */
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static void start_delivery_v2_hw(struct hisi_sas_dq *dq)
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{
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struct hisi_hba *hisi_hba = dq->hisi_hba;
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int dlvry_queue = dq->slot_prep->dlvry_queue;
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int dlvry_queue_slot = dq->slot_prep->dlvry_queue_slot;
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struct hisi_sas_slot *s, *s1;
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struct list_head *dq_list;
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int dlvry_queue = dq->id;
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int wp, count = 0;
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dq->wr_point = ++dlvry_queue_slot % HISI_SAS_QUEUE_SLOTS;
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hisi_sas_write32(hisi_hba, DLVRY_Q_0_WR_PTR + (dlvry_queue * 0x14),
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dq->wr_point);
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dq_list = &dq->list;
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list_for_each_entry_safe(s, s1, &dq->list, delivery) {
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if (!s->ready)
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break;
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count++;
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wp = (s->dlvry_queue_slot + 1) % HISI_SAS_QUEUE_SLOTS;
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list_del(&s->delivery);
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}
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if (!count)
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return;
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hisi_sas_write32(hisi_hba, DLVRY_Q_0_WR_PTR + (dlvry_queue * 0x14), wp);
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}
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static void prep_prd_sge_v2_hw(struct hisi_hba *hisi_hba,
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@ -840,23 +840,37 @@ get_free_slot_v3_hw(struct hisi_hba *hisi_hba, struct hisi_sas_dq *dq)
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r = hisi_sas_read32_relaxed(hisi_hba,
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DLVRY_Q_0_RD_PTR + (queue * 0x14));
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if (r == (w+1) % HISI_SAS_QUEUE_SLOTS) {
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dev_warn(dev, "full queue=%d r=%d w=%d\n\n",
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dev_warn(dev, "full queue=%d r=%d w=%d\n",
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queue, r, w);
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return -EAGAIN;
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}
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return 0;
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dq->wr_point = (dq->wr_point + 1) % HISI_SAS_QUEUE_SLOTS;
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return w;
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}
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static void start_delivery_v3_hw(struct hisi_sas_dq *dq)
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{
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struct hisi_hba *hisi_hba = dq->hisi_hba;
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int dlvry_queue = dq->slot_prep->dlvry_queue;
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int dlvry_queue_slot = dq->slot_prep->dlvry_queue_slot;
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struct hisi_sas_slot *s, *s1;
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struct list_head *dq_list;
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int dlvry_queue = dq->id;
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int wp, count = 0;
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dq->wr_point = ++dlvry_queue_slot % HISI_SAS_QUEUE_SLOTS;
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hisi_sas_write32(hisi_hba, DLVRY_Q_0_WR_PTR + (dlvry_queue * 0x14),
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dq->wr_point);
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dq_list = &dq->list;
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list_for_each_entry_safe(s, s1, &dq->list, delivery) {
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if (!s->ready)
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break;
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count++;
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wp = (s->dlvry_queue_slot + 1) % HISI_SAS_QUEUE_SLOTS;
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list_del(&s->delivery);
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}
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if (!count)
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return;
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hisi_sas_write32(hisi_hba, DLVRY_Q_0_WR_PTR + (dlvry_queue * 0x14), wp);
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}
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static void prep_prd_sge_v3_hw(struct hisi_hba *hisi_hba,
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