PCI: collapse pcibios_resource_to_bus

Everybody uses the generic pcibios_resource_to_bus() supplied by the core
now, so remove the ARCH_HAS_GENERIC_PCI_OFFSETS used during conversion.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
Bjorn Helgaas 2012-02-23 20:19:04 -07:00
parent 4ba2aef315
commit fb127cb9de
13 changed files with 15 additions and 53 deletions

View File

@ -100,8 +100,6 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
return channel ? 15 : 14;
}
#define ARCH_HAS_GENERIC_PCI_OFFSETS
#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
static inline int pci_proc_domain(struct pci_bus *bus)

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@ -57,8 +57,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
enum pci_mmap_state mmap_state, int write_combine);
#define ARCH_HAS_GENERIC_PCI_OFFSETS
/*
* Dummy implementation; always return 0.
*/

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@ -108,8 +108,6 @@ static inline int pci_proc_domain(struct pci_bus *bus)
return (pci_domain_nr(bus) != 0);
}
#define ARCH_HAS_GENERIC_PCI_OFFSETS
static inline struct resource *
pcibios_select_root(struct pci_dev *pdev, struct resource *res)
{

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@ -94,8 +94,6 @@ extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
*/
#define PCI_DMA_BUS_IS_PHYS (1)
#define ARCH_HAS_GENERIC_PCI_OFFSETS
static inline struct resource *pcibios_select_root(struct pci_dev *pdev,
struct resource *res)
{

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@ -113,8 +113,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
}
#endif
#define ARCH_HAS_GENERIC_PCI_OFFSETS
#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
static inline int pci_proc_domain(struct pci_bus *bus)

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@ -85,8 +85,6 @@ extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
/* implement the pci_ DMA API in terms of the generic device dma_ one */
#include <asm-generic/pci-dma-compat.h>
#define ARCH_HAS_GENERIC_PCI_OFFSETS
static inline struct resource *
pcibios_select_root(struct pci_dev *pdev, struct resource *res)
{

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@ -215,8 +215,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
}
#endif
#define ARCH_HAS_GENERIC_PCI_OFFSETS
static inline void pcibios_penalize_isa_irq(int irq, int active)
{
/* We don't need to penalize isa irq's */

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@ -154,8 +154,6 @@ extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
#endif /* CONFIG_PPC64 */
#define ARCH_HAS_GENERIC_PCI_OFFSETS
extern void pcibios_claim_one_bus(struct pci_bus *b);
extern void pcibios_finish_adding_to_bus(struct pci_bus *bus);

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@ -114,8 +114,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
/* Board-specific fixup routines. */
int pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin);
#define ARCH_HAS_GENERIC_PCI_OFFSETS
#define pci_domain_nr(bus) ((struct pci_channel *)(bus)->sysdata)->index
static inline int pci_proc_domain(struct pci_bus *bus)

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@ -52,8 +52,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
* 64Kbytes by the Host controller.
*/
#define ARCH_HAS_GENERIC_PCI_OFFSETS
static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
{
return PCI_IRQ_NONE;

View File

@ -73,8 +73,6 @@ extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
enum pci_mmap_state mmap_state,
int write_combine);
#define ARCH_HAS_GENERIC_PCI_OFFSETS
static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
{
return PCI_IRQ_NONE;

View File

@ -66,8 +66,8 @@ static bool resource_contains(struct resource *res1, struct resource *res2)
return res1->start <= res2->start && res1->end >= res2->end;
}
void pci_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
struct resource *res)
void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
struct resource *res)
{
struct pci_host_bridge *bridge = pci_host_bridge(dev);
struct pci_host_bridge_window *window;
@ -86,6 +86,7 @@ void pci_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
region->start = res->start - offset;
region->end = res->end - offset;
}
EXPORT_SYMBOL(pcibios_resource_to_bus);
static bool region_contains(struct pci_bus_region *region1,
struct pci_bus_region *region2)
@ -93,8 +94,8 @@ static bool region_contains(struct pci_bus_region *region1,
return region1->start <= region2->start && region1->end >= region2->end;
}
void pci_bus_to_resource(struct pci_dev *dev, struct resource *res,
struct pci_bus_region *region)
void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
struct pci_bus_region *region)
{
struct pci_host_bridge *bridge = pci_host_bridge(dev);
struct pci_host_bridge_window *window;
@ -117,22 +118,7 @@ void pci_bus_to_resource(struct pci_dev *dev, struct resource *res,
res->start = region->start + offset;
res->end = region->end + offset;
}
#ifdef ARCH_HAS_GENERIC_PCI_OFFSETS
void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
struct resource *res)
{
pci_resource_to_bus(dev, region, res);
}
EXPORT_SYMBOL(pcibios_resource_to_bus);
void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
struct pci_bus_region *region)
{
pci_bus_to_resource(dev, res, region);
}
EXPORT_SYMBOL(pcibios_bus_to_resource);
#endif
/*
* PCI Bus Class
@ -309,11 +295,11 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
pci_write_config_dword(dev, pos + 4, 0);
region.start = 0;
region.end = sz64;
pci_bus_to_resource(dev, res, &region);
pcibios_bus_to_resource(dev, res, &region);
} else {
region.start = l64;
region.end = l64 + sz64;
pci_bus_to_resource(dev, res, &region);
pcibios_bus_to_resource(dev, res, &region);
dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n",
pos, res);
}
@ -325,7 +311,7 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
region.start = l;
region.end = l + sz;
pci_bus_to_resource(dev, res, &region);
pcibios_bus_to_resource(dev, res, &region);
dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n", pos, res);
}
@ -383,7 +369,7 @@ static void __devinit pci_read_bridge_io(struct pci_bus *child)
res->flags = (io_base_lo & PCI_IO_RANGE_TYPE_MASK) | IORESOURCE_IO;
region.start = base;
region.end = limit + 0xfff;
pci_bus_to_resource(dev, &res2, &region);
pcibios_bus_to_resource(dev, &res2, &region);
if (!res->start)
res->start = res2.start;
if (!res->end)
@ -409,7 +395,7 @@ static void __devinit pci_read_bridge_mmio(struct pci_bus *child)
res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM;
region.start = base;
region.end = limit + 0xfffff;
pci_bus_to_resource(dev, res, &region);
pcibios_bus_to_resource(dev, res, &region);
dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res);
}
}
@ -458,7 +444,7 @@ static void __devinit pci_read_bridge_mmio_pref(struct pci_bus *child)
res->flags |= IORESOURCE_MEM_64;
region.start = base;
region.end = limit + 0xfffff;
pci_bus_to_resource(dev, res, &region);
pcibios_bus_to_resource(dev, res, &region);
dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res);
}
}
@ -1071,24 +1057,24 @@ int pci_setup_device(struct pci_dev *dev)
region.end = 0x1F7;
res = &dev->resource[0];
res->flags = LEGACY_IO_RESOURCE;
pci_bus_to_resource(dev, res, &region);
pcibios_bus_to_resource(dev, res, &region);
region.start = 0x3F6;
region.end = 0x3F6;
res = &dev->resource[1];
res->flags = LEGACY_IO_RESOURCE;
pci_bus_to_resource(dev, res, &region);
pcibios_bus_to_resource(dev, res, &region);
}
if ((progif & 4) == 0) {
region.start = 0x170;
region.end = 0x177;
res = &dev->resource[2];
res->flags = LEGACY_IO_RESOURCE;
pci_bus_to_resource(dev, res, &region);
pcibios_bus_to_resource(dev, res, &region);
region.start = 0x376;
region.end = 0x376;
res = &dev->resource[3];
res->flags = LEGACY_IO_RESOURCE;
pci_bus_to_resource(dev, res, &region);
pcibios_bus_to_resource(dev, res, &region);
}
}
break;

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@ -6,8 +6,6 @@
#ifndef _ASM_GENERIC_PCI_H
#define _ASM_GENERIC_PCI_H
#define ARCH_HAS_GENERIC_PCI_OFFSETS
static inline struct resource *
pcibios_select_root(struct pci_dev *pdev, struct resource *res)
{