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[PATCH] ppc32: m8xx watchdog update 

This updates m8xx_wdt as follows:

1) Remove now obsolete fpos check in the write() function. The driver is
currently non functional due to this bug.

2) Use in/out macros for register access.

3) Allows m8xx_wdt to use a kernel timer instead of the builtin RTC/PIT
for keep-alive trigger (which is responsible for servicing the watchdog
until an userspace application takes over). For instance Cyclades PRxK
boards (MPC 855T based) have a non-functional internal RTC/PIT unit.
Behaviour for boards with RTC/PIT is unchaged.

4) The last change required moving the RTCSC register setting code
to a weak function which can be overriden by board specific files.
Otherwise the timer init code trashes the register making it impossible
for m8xx_wdt to detect the situation.

Signed-off-by: Marcelo Tosatti <marcelo.tosatti@cyclades.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
Marcelo Tosatti 2005-11-24 11:32:09 -02:00 committed by Paul Mackerras
parent 623703f620
commit fb64c2446b
4 changed files with 90 additions and 34 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
arch/ppc/syslib/m8xx_setup.c
View File

@ -135,6 +135,16 @@ static struct irqaction tbint_irqaction = {
.name = "tbint",
};
/* per-board overridable init_internal_rtc() function. */
void __init __attribute__ ((weak))
init_internal_rtc(void)
{
/* Disable the RTC one second and alarm interrupts. */
out_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, in_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc) & ~(RTCSC_SIE | RTCSC_ALE));
/* Enable the RTC */
out_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, in_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc) | (RTCSC_RTF | RTCSC_RTE));
}
/* The decrementer counts at the system (internal) clock frequency divided by
* sixteen, or external oscillator divided by four. We force the processor
* to use system clock divided by sixteen.
@ -183,10 +193,7 @@ void __init m8xx_calibrate_decr(void)
out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_rtcsck, KAPWR_KEY);
out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_tbk, KAPWR_KEY);
/* Disable the RTC one second and alarm interrupts. */
out_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, in_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc) & ~(RTCSC_SIE | RTCSC_ALE));
/* Enable the RTC */
out_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, in_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc) | (RTCSC_RTF | RTCSC_RTE));
init_internal_rtc();
/* Enabling the decrementer also enables the timebase interrupts
* (or from the other point of view, to get decrementer interrupts

92
arch/ppc/syslib/m8xx_wdt.c
View File

@ -19,6 +19,7 @@
#include <syslib/m8xx_wdt.h>
static int wdt_timeout;
int m8xx_has_internal_rtc = 0;
static irqreturn_t m8xx_wdt_interrupt(int, void *, struct pt_regs *);
static struct irqaction m8xx_wdt_irqaction = {
@ -45,35 +46,15 @@ static irqreturn_t m8xx_wdt_interrupt(int irq, void *dev, struct pt_regs *regs)
return IRQ_HANDLED;
}
void __init m8xx_wdt_handler_install(bd_t * binfo)
#define SYPCR_SWP 0x1
#define SYPCR_SWE 0x4
void __init m8xx_wdt_install_irq(volatile immap_t *imap, bd_t *binfo)
{
volatile immap_t *imap = (volatile immap_t *)IMAP_ADDR;
u32 pitc;
u32 sypcr;
u32 pitrtclk;
sypcr = in_be32(&imap->im_siu_conf.sc_sypcr);
if (!(sypcr & 0x04)) {
printk(KERN_NOTICE "m8xx_wdt: wdt disabled (SYPCR: 0x%08X)\n",
sypcr);
return;
}
m8xx_wdt_reset();
printk(KERN_NOTICE
"m8xx_wdt: active wdt found (SWTC: 0x%04X, SWP: 0x%01X)\n",
(sypcr >> 16), sypcr & 0x01);
wdt_timeout = (sypcr >> 16) & 0xFFFF;
if (!wdt_timeout)
wdt_timeout = 0xFFFF;
if (sypcr & 0x01)
wdt_timeout *= 2048;
/*
* Fire trigger if half of the wdt ticked down
*/
@ -98,6 +79,67 @@ void __init m8xx_wdt_handler_install(bd_t * binfo)
printk(KERN_NOTICE
"m8xx_wdt: keep-alive trigger installed (PITC: 0x%04X)\n", pitc);
}
static void m8xx_wdt_timer_func(unsigned long data);
static struct timer_list m8xx_wdt_timer =
TIMER_INITIALIZER(m8xx_wdt_timer_func, 0, 0);
void m8xx_wdt_stop_timer(void)
{
del_timer(&m8xx_wdt_timer);
}
void m8xx_wdt_install_timer(void)
{
m8xx_wdt_timer.expires = jiffies + (HZ/2);
add_timer(&m8xx_wdt_timer);
}
static void m8xx_wdt_timer_func(unsigned long data)
{
m8xx_wdt_reset();
m8xx_wdt_install_timer();
}
void __init m8xx_wdt_handler_install(bd_t * binfo)
{
volatile immap_t *imap = (volatile immap_t *)IMAP_ADDR;
u32 sypcr;
sypcr = in_be32(&imap->im_siu_conf.sc_sypcr);
if (!(sypcr & SYPCR_SWE)) {
printk(KERN_NOTICE "m8xx_wdt: wdt disabled (SYPCR: 0x%08X)\n",
sypcr);
return;
}
m8xx_wdt_reset();
printk(KERN_NOTICE
"m8xx_wdt: active wdt found (SWTC: 0x%04X, SWP: 0x%01X)\n",
(sypcr >> 16), sypcr & SYPCR_SWP);
wdt_timeout = (sypcr >> 16) & 0xFFFF;
if (!wdt_timeout)
wdt_timeout = 0xFFFF;
if (sypcr & SYPCR_SWP)
wdt_timeout *= 2048;
m8xx_has_internal_rtc = in_be16(&imap->im_sit.sit_rtcsc) & RTCSC_RTE;
/* if the internal RTC is off use a kernel timer */
if (!m8xx_has_internal_rtc) {
if (wdt_timeout < (binfo->bi_intfreq/HZ))
printk(KERN_ERR "m8xx_wdt: timeout too short for ktimer!\n");
m8xx_wdt_install_timer();
} else
m8xx_wdt_install_irq(imap, binfo);
wdt_timeout /= binfo->bi_intfreq;
}

4
arch/ppc/syslib/m8xx_wdt.h
View File

@ -9,8 +9,12 @@
#ifndef _PPC_SYSLIB_M8XX_WDT_H
#define _PPC_SYSLIB_M8XX_WDT_H
extern int m8xx_has_internal_rtc;
extern void m8xx_wdt_handler_install(bd_t * binfo);
extern int m8xx_wdt_get_timeout(void);
extern void m8xx_wdt_reset(void);
extern void m8xx_wdt_install_timer(void);
extern void m8xx_wdt_stop_timer(void);
#endif /* _PPC_SYSLIB_M8XX_WDT_H */

13
drivers/char/watchdog/mpc8xx_wdt.c
View File

@ -27,7 +27,10 @@ static void mpc8xx_wdt_handler_disable(void)
{
volatile immap_t *imap = (volatile immap_t *)IMAP_ADDR;
imap->im_sit.sit_piscr &= ~(PISCR_PIE | PISCR_PTE);
if (!m8xx_has_internal_rtc)
m8xx_wdt_stop_timer();
else
out_be32(imap->im_sit.sit_piscr, in_be32(&imap->im_sit.sit_piscr) & ~(PISCR_PIE | PISCR_PTE));
printk(KERN_NOTICE "mpc8xx_wdt: keep-alive handler deactivated\n");
}
@ -36,7 +39,10 @@ static void mpc8xx_wdt_handler_enable(void)
{
volatile immap_t *imap = (volatile immap_t *)IMAP_ADDR;
imap->im_sit.sit_piscr |= PISCR_PIE | PISCR_PTE;
if (!m8xx_has_internal_rtc)
m8xx_wdt_install_timer();
else
out_be32(&imap->im_sit.sit_piscr, in_be32(&imap->im_sit.sit_piscr) | PISCR_PIE | PISCR_PTE);
printk(KERN_NOTICE "mpc8xx_wdt: keep-alive handler activated\n");
}
@ -68,9 +74,6 @@ static int mpc8xx_wdt_release(struct inode *inode, struct file *file)
static ssize_t mpc8xx_wdt_write(struct file *file, const char *data, size_t len,
loff_t * ppos)
{
if (ppos != &file->f_pos)
return -ESPIPE;
if (len)
m8xx_wdt_reset();