ASoC: tfa9879: New driver for NXP Semiconductors TFA9879 amplifier.
Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Peter Rosin
Mark Brown
parent
f114040e3e
commit
fbace43e88
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@ -6565,6 +6565,12 @@ S: Supported
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F: drivers/gpu/drm/i2c/tda998x_drv.c
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F: include/drm/i2c/tda998x.h
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NXP TFA9879 DRIVER
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M: Peter Rosin <peda@axentia.se>
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L: alsa-devel@alsa-project.org (moderated for non-subscribers)
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S: Maintained
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F: sound/soc/codecs/tfa9879*
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OMAP SUPPORT
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M: Tony Lindgren <tony@atomide.com>
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L: linux-omap@vger.kernel.org
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@ -101,6 +101,7 @@ config SND_SOC_ALL_CODECS
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select SND_SOC_STAC9766 if SND_SOC_AC97_BUS
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select SND_SOC_TAS2552 if I2C
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select SND_SOC_TAS5086 if I2C
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select SND_SOC_TFA9879 if I2C
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select SND_SOC_TLV320AIC23_I2C if I2C
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select SND_SOC_TLV320AIC23_SPI if SPI_MASTER
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select SND_SOC_TLV320AIC26 if SPI_MASTER
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@ -577,6 +578,10 @@ config SND_SOC_TAS5086
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tristate "Texas Instruments TAS5086 speaker amplifier"
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depends on I2C
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config SND_SOC_TFA9879
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tristate "NXP Semiconductors TFA9879 amplifier"
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depends on I2C
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config SND_SOC_TLV320AIC23
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tristate
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@ -101,6 +101,7 @@ snd-soc-sta350-objs := sta350.o
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snd-soc-sta529-objs := sta529.o
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snd-soc-stac9766-objs := stac9766.o
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snd-soc-tas5086-objs := tas5086.o
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snd-soc-tfa9879-objs := tfa9879.o
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snd-soc-tlv320aic23-objs := tlv320aic23.o
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snd-soc-tlv320aic23-i2c-objs := tlv320aic23-i2c.o
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snd-soc-tlv320aic23-spi-objs := tlv320aic23-spi.o
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@ -274,6 +275,7 @@ obj-$(CONFIG_SND_SOC_STA529) += snd-soc-sta529.o
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obj-$(CONFIG_SND_SOC_STAC9766) += snd-soc-stac9766.o
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obj-$(CONFIG_SND_SOC_TAS2552) += snd-soc-tas2552.o
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obj-$(CONFIG_SND_SOC_TAS5086) += snd-soc-tas5086.o
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obj-$(CONFIG_SND_SOC_TFA9879) += snd-soc-tfa9879.o
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obj-$(CONFIG_SND_SOC_TLV320AIC23) += snd-soc-tlv320aic23.o
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obj-$(CONFIG_SND_SOC_TLV320AIC23_I2C) += snd-soc-tlv320aic23-i2c.o
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obj-$(CONFIG_SND_SOC_TLV320AIC23_SPI) += snd-soc-tlv320aic23-spi.o
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@ -0,0 +1,328 @@
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/*
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* tfa9879.c -- driver for NXP Semiconductors TFA9879
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*
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* Copyright (C) 2014 Axentia Technologies AB
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* Author: Peter Rosin <peda@axentia.se>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/i2c.h>
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#include <linux/regmap.h>
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#include <sound/soc.h>
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#include <sound/tlv.h>
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#include <sound/pcm_params.h>
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#include "tfa9879.h"
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struct tfa9879_priv {
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struct regmap *regmap;
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int lsb_justified;
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};
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static int tfa9879_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_codec *codec = dai->codec;
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struct tfa9879_priv *tfa9879 = snd_soc_codec_get_drvdata(codec);
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int fs;
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int i2s_set = 0;
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switch (params_rate(params)) {
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case 8000:
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fs = TFA9879_I2S_FS_8000;
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break;
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case 11025:
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fs = TFA9879_I2S_FS_11025;
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break;
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case 12000:
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fs = TFA9879_I2S_FS_12000;
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break;
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case 16000:
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fs = TFA9879_I2S_FS_16000;
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break;
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case 22050:
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fs = TFA9879_I2S_FS_22050;
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break;
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case 24000:
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fs = TFA9879_I2S_FS_24000;
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break;
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case 32000:
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fs = TFA9879_I2S_FS_32000;
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break;
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case 44100:
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fs = TFA9879_I2S_FS_44100;
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break;
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case 48000:
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fs = TFA9879_I2S_FS_48000;
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break;
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case 64000:
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fs = TFA9879_I2S_FS_64000;
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break;
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case 88200:
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fs = TFA9879_I2S_FS_88200;
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break;
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case 96000:
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fs = TFA9879_I2S_FS_96000;
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break;
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default:
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return -EINVAL;
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}
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switch (params_width(params)) {
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case 16:
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i2s_set = TFA9879_I2S_SET_LSB_J_16;
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break;
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case 24:
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i2s_set = TFA9879_I2S_SET_LSB_J_24;
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break;
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default:
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return -EINVAL;
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}
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if (tfa9879->lsb_justified)
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snd_soc_update_bits(codec, TFA9879_SERIAL_INTERFACE_1,
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TFA9879_I2S_SET_MASK,
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i2s_set << TFA9879_I2S_SET_SHIFT);
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snd_soc_update_bits(codec, TFA9879_SERIAL_INTERFACE_1,
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TFA9879_I2S_FS_MASK,
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fs << TFA9879_I2S_FS_SHIFT);
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return 0;
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}
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static int tfa9879_digital_mute(struct snd_soc_dai *dai, int mute)
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{
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struct snd_soc_codec *codec = dai->codec;
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snd_soc_update_bits(codec, TFA9879_MISC_CONTROL,
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TFA9879_S_MUTE_MASK,
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!!mute << TFA9879_S_MUTE_SHIFT);
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return 0;
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}
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static int tfa9879_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
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{
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struct snd_soc_codec *codec = dai->codec;
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struct tfa9879_priv *tfa9879 = snd_soc_codec_get_drvdata(codec);
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int i2s_set;
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int sck_pol;
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBS_CFS:
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break;
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default:
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return -EINVAL;
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}
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switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
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case SND_SOC_DAIFMT_NB_NF:
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sck_pol = TFA9879_SCK_POL_NORMAL;
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break;
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case SND_SOC_DAIFMT_IB_NF:
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sck_pol = TFA9879_SCK_POL_INVERSE;
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break;
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default:
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return -EINVAL;
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}
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_I2S:
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tfa9879->lsb_justified = 0;
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i2s_set = TFA9879_I2S_SET_I2S_24;
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break;
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case SND_SOC_DAIFMT_LEFT_J:
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tfa9879->lsb_justified = 0;
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i2s_set = TFA9879_I2S_SET_MSB_J_24;
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break;
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case SND_SOC_DAIFMT_RIGHT_J:
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tfa9879->lsb_justified = 1;
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i2s_set = TFA9879_I2S_SET_LSB_J_24;
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break;
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default:
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return -EINVAL;
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}
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snd_soc_update_bits(codec, TFA9879_SERIAL_INTERFACE_1,
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TFA9879_SCK_POL_MASK,
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sck_pol << TFA9879_SCK_POL_SHIFT);
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snd_soc_update_bits(codec, TFA9879_SERIAL_INTERFACE_1,
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TFA9879_I2S_SET_MASK,
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i2s_set << TFA9879_I2S_SET_SHIFT);
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return 0;
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}
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static struct reg_default tfa9879_regs[] = {
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{ TFA9879_DEVICE_CONTROL, 0x0000 }, /* 0x00 */
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{ TFA9879_SERIAL_INTERFACE_1, 0x0a18 }, /* 0x01 */
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{ TFA9879_PCM_IOM2_FORMAT_1, 0x0007 }, /* 0x02 */
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{ TFA9879_SERIAL_INTERFACE_2, 0x0a18 }, /* 0x03 */
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{ TFA9879_PCM_IOM2_FORMAT_2, 0x0007 }, /* 0x04 */
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{ TFA9879_EQUALIZER_A1, 0x59dd }, /* 0x05 */
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{ TFA9879_EQUALIZER_A2, 0xc63e }, /* 0x06 */
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{ TFA9879_EQUALIZER_B1, 0x651a }, /* 0x07 */
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{ TFA9879_EQUALIZER_B2, 0xe53e }, /* 0x08 */
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{ TFA9879_EQUALIZER_C1, 0x4616 }, /* 0x09 */
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{ TFA9879_EQUALIZER_C2, 0xd33e }, /* 0x0a */
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{ TFA9879_EQUALIZER_D1, 0x4df3 }, /* 0x0b */
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{ TFA9879_EQUALIZER_D2, 0xea3e }, /* 0x0c */
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{ TFA9879_EQUALIZER_E1, 0x5ee0 }, /* 0x0d */
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{ TFA9879_EQUALIZER_E2, 0xf93e }, /* 0x0e */
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{ TFA9879_BYPASS_CONTROL, 0x0093 }, /* 0x0f */
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{ TFA9879_DYNAMIC_RANGE_COMPR, 0x92ba }, /* 0x10 */
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{ TFA9879_BASS_TREBLE, 0x12a5 }, /* 0x11 */
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{ TFA9879_HIGH_PASS_FILTER, 0x0004 }, /* 0x12 */
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{ TFA9879_VOLUME_CONTROL, 0x10bd }, /* 0x13 */
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{ TFA9879_MISC_CONTROL, 0x0000 }, /* 0x14 */
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};
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static bool tfa9879_volatile_reg(struct device *dev, unsigned int reg)
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{
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return reg == TFA9879_MISC_STATUS;
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}
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static const DECLARE_TLV_DB_SCALE(volume_tlv, -7050, 50, 1);
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static const DECLARE_TLV_DB_SCALE(tb_gain_tlv, -1800, 200, 0);
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static const char * const tb_freq_text[] = {
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"Low", "Mid", "High"
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};
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static const struct soc_enum treble_freq_enum =
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SOC_ENUM_SINGLE(TFA9879_BASS_TREBLE, TFA9879_F_TRBLE_SHIFT,
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ARRAY_SIZE(tb_freq_text), tb_freq_text);
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static const struct soc_enum bass_freq_enum =
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SOC_ENUM_SINGLE(TFA9879_BASS_TREBLE, TFA9879_F_BASS_SHIFT,
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ARRAY_SIZE(tb_freq_text), tb_freq_text);
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static const struct snd_kcontrol_new tfa9879_controls[] = {
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SOC_SINGLE_TLV("PCM Playback Volume", TFA9879_VOLUME_CONTROL,
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TFA9879_VOL_SHIFT, 0xbd, 1, volume_tlv),
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SOC_SINGLE_TLV("Treble Volume", TFA9879_BASS_TREBLE,
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TFA9879_G_TRBLE_SHIFT, 18, 0, tb_gain_tlv),
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SOC_SINGLE_TLV("Bass Volume", TFA9879_BASS_TREBLE,
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TFA9879_G_BASS_SHIFT, 18, 0, tb_gain_tlv),
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SOC_ENUM("Treble Corner Freq", treble_freq_enum),
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SOC_ENUM("Bass Corner Freq", bass_freq_enum),
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};
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static const struct snd_soc_dapm_widget tfa9879_dapm_widgets[] = {
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SND_SOC_DAPM_AIF_IN("AIFINL", "Playback", 0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_IN("AIFINR", "Playback", 1, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_DAC("DAC", NULL, TFA9879_DEVICE_CONTROL, TFA9879_OPMODE_SHIFT, 0),
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SND_SOC_DAPM_OUTPUT("LINEOUT"),
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SND_SOC_DAPM_SUPPLY("POWER", TFA9879_DEVICE_CONTROL, TFA9879_POWERUP_SHIFT, 0,
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NULL, 0),
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};
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static const struct snd_soc_dapm_route tfa9879_dapm_routes[] = {
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{ "DAC", NULL, "AIFINL" },
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{ "DAC", NULL, "AIFINR" },
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{ "LINEOUT", NULL, "DAC" },
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{ "DAC", NULL, "POWER" },
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};
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static const struct snd_soc_codec_driver tfa9879_codec = {
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.controls = tfa9879_controls,
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.num_controls = ARRAY_SIZE(tfa9879_controls),
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.dapm_widgets = tfa9879_dapm_widgets,
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.num_dapm_widgets = ARRAY_SIZE(tfa9879_dapm_widgets),
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.dapm_routes = tfa9879_dapm_routes,
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.num_dapm_routes = ARRAY_SIZE(tfa9879_dapm_routes),
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};
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static const struct regmap_config tfa9879_regmap = {
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.reg_bits = 8,
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.val_bits = 16,
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.volatile_reg = tfa9879_volatile_reg,
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.max_register = TFA9879_MISC_STATUS,
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.reg_defaults = tfa9879_regs,
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.num_reg_defaults = ARRAY_SIZE(tfa9879_regs),
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.cache_type = REGCACHE_RBTREE,
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};
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static const struct snd_soc_dai_ops tfa9879_dai_ops = {
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.hw_params = tfa9879_hw_params,
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.digital_mute = tfa9879_digital_mute,
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.set_fmt = tfa9879_set_fmt,
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};
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#define TFA9879_RATES SNDRV_PCM_RATE_8000_96000
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#define TFA9879_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
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SNDRV_PCM_FMTBIT_S24_LE)
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static struct snd_soc_dai_driver tfa9879_dai = {
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.name = "tfa9879-hifi",
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.playback = {
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.stream_name = "Playback",
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.channels_min = 2,
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.channels_max = 2,
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.rates = TFA9879_RATES,
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.formats = TFA9879_FORMATS, },
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.ops = &tfa9879_dai_ops,
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};
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static int tfa9879_i2c_probe(struct i2c_client *i2c,
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const struct i2c_device_id *id)
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{
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struct tfa9879_priv *tfa9879;
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int i;
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tfa9879 = devm_kzalloc(&i2c->dev, sizeof(*tfa9879), GFP_KERNEL);
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if (IS_ERR(tfa9879))
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return PTR_ERR(tfa9879);
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i2c_set_clientdata(i2c, tfa9879);
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tfa9879->regmap = devm_regmap_init_i2c(i2c, &tfa9879_regmap);
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if (IS_ERR(tfa9879->regmap))
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return PTR_ERR(tfa9879->regmap);
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/* Ensure the device is in reset state */
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for (i = 0; i < ARRAY_SIZE(tfa9879_regs); i++)
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regmap_write(tfa9879->regmap,
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tfa9879_regs[i].reg, tfa9879_regs[i].def);
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return snd_soc_register_codec(&i2c->dev, &tfa9879_codec,
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&tfa9879_dai, 1);
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}
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static int tfa9879_i2c_remove(struct i2c_client *client)
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{
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snd_soc_unregister_codec(&client->dev);
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return 0;
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}
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static const struct i2c_device_id tfa9879_i2c_id[] = {
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{ "tfa9879", 0 },
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{ }
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};
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MODULE_DEVICE_TABLE(i2c, tfa9879_i2c_id);
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static struct i2c_driver tfa9879_i2c_driver = {
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.driver = {
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.name = "tfa9879",
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.owner = THIS_MODULE,
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},
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.probe = tfa9879_i2c_probe,
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.remove = tfa9879_i2c_remove,
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.id_table = tfa9879_i2c_id,
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};
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module_i2c_driver(tfa9879_i2c_driver);
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MODULE_DESCRIPTION("ASoC NXP Semiconductors TFA9879 driver");
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MODULE_AUTHOR("Peter Rosin <peda@axentia.se>");
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MODULE_LICENSE("GPL");
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@ -0,0 +1,202 @@
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/*
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* tfa9879.h -- driver for NXP Semiconductors TFA9879
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*
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* Copyright (C) 2014 Axentia Technologies AB
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* Author: Peter Rosin <peda@axentia.se>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
|
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#ifndef _TFA9879_H
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#define _TFA9879_H
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#define TFA9879_DEVICE_CONTROL 0x00
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#define TFA9879_SERIAL_INTERFACE_1 0x01
|
||||
#define TFA9879_PCM_IOM2_FORMAT_1 0x02
|
||||
#define TFA9879_SERIAL_INTERFACE_2 0x03
|
||||
#define TFA9879_PCM_IOM2_FORMAT_2 0x04
|
||||
#define TFA9879_EQUALIZER_A1 0x05
|
||||
#define TFA9879_EQUALIZER_A2 0x06
|
||||
#define TFA9879_EQUALIZER_B1 0x07
|
||||
#define TFA9879_EQUALIZER_B2 0x08
|
||||
#define TFA9879_EQUALIZER_C1 0x09
|
||||
#define TFA9879_EQUALIZER_C2 0x0a
|
||||
#define TFA9879_EQUALIZER_D1 0x0b
|
||||
#define TFA9879_EQUALIZER_D2 0x0c
|
||||
#define TFA9879_EQUALIZER_E1 0x0d
|
||||
#define TFA9879_EQUALIZER_E2 0x0e
|
||||
#define TFA9879_BYPASS_CONTROL 0x0f
|
||||
#define TFA9879_DYNAMIC_RANGE_COMPR 0x10
|
||||
#define TFA9879_BASS_TREBLE 0x11
|
||||
#define TFA9879_HIGH_PASS_FILTER 0x12
|
||||
#define TFA9879_VOLUME_CONTROL 0x13
|
||||
#define TFA9879_MISC_CONTROL 0x14
|
||||
#define TFA9879_MISC_STATUS 0x15
|
||||
|
||||
/* TFA9879_DEVICE_CONTROL */
|
||||
#define TFA9879_INPUT_SEL_MASK 0x0010
|
||||
#define TFA9879_INPUT_SEL_SHIFT 4
|
||||
#define TFA9879_OPMODE_MASK 0x0008
|
||||
#define TFA9879_OPMODE_SHIFT 3
|
||||
#define TFA9879_RESET_MASK 0x0002
|
||||
#define TFA9879_RESET_SHIFT 1
|
||||
#define TFA9879_POWERUP_MASK 0x0001
|
||||
#define TFA9879_POWERUP_SHIFT 0
|
||||
|
||||
/* TFA9879_SERIAL_INTERFACE */
|
||||
#define TFA9879_MONO_SEL_MASK 0x0c00
|
||||
#define TFA9879_MONO_SEL_SHIFT 10
|
||||
#define TFA9879_MONO_SEL_LEFT 0
|
||||
#define TFA9879_MONO_SEL_RIGHT 1
|
||||
#define TFA9879_MONO_SEL_BOTH 2
|
||||
#define TFA9879_I2S_FS_MASK 0x03c0
|
||||
#define TFA9879_I2S_FS_SHIFT 6
|
||||
#define TFA9879_I2S_FS_8000 0
|
||||
#define TFA9879_I2S_FS_11025 1
|
||||
#define TFA9879_I2S_FS_12000 2
|
||||
#define TFA9879_I2S_FS_16000 3
|
||||
#define TFA9879_I2S_FS_22050 4
|
||||
#define TFA9879_I2S_FS_24000 5
|
||||
#define TFA9879_I2S_FS_32000 6
|
||||
#define TFA9879_I2S_FS_44100 7
|
||||
#define TFA9879_I2S_FS_48000 8
|
||||
#define TFA9879_I2S_FS_64000 9
|
||||
#define TFA9879_I2S_FS_88200 10
|
||||
#define TFA9879_I2S_FS_96000 11
|
||||
#define TFA9879_I2S_SET_MASK 0x0038
|
||||
#define TFA9879_I2S_SET_SHIFT 3
|
||||
#define TFA9879_I2S_SET_MSB_J_24 2
|
||||
#define TFA9879_I2S_SET_I2S_24 3
|
||||
#define TFA9879_I2S_SET_LSB_J_16 4
|
||||
#define TFA9879_I2S_SET_LSB_J_18 5
|
||||
#define TFA9879_I2S_SET_LSB_J_20 6
|
||||
#define TFA9879_I2S_SET_LSB_J_24 7
|
||||
#define TFA9879_SCK_POL_MASK 0x0004
|
||||
#define TFA9879_SCK_POL_SHIFT 2
|
||||
#define TFA9879_SCK_POL_NORMAL 0
|
||||
#define TFA9879_SCK_POL_INVERSE 1
|
||||
#define TFA9879_I_MODE_MASK 0x0003
|
||||
#define TFA9879_I_MODE_SHIFT 0
|
||||
#define TFA9879_I_MODE_I2S 0
|
||||
#define TFA9879_I_MODE_PCM_IOM2_SHORT 1
|
||||
#define TFA9879_I_MODE_PCM_IOM2_LONG 2
|
||||
|
||||
/* TFA9879_PCM_IOM2_FORMAT */
|
||||
#define TFA9879_PCM_FS_MASK 0x0800
|
||||
#define TFA9879_PCM_FS_SHIFT 11
|
||||
#define TFA9879_A_LAW_MASK 0x0400
|
||||
#define TFA9879_A_LAW_SHIFT 10
|
||||
#define TFA9879_PCM_COMP_MASK 0x0200
|
||||
#define TFA9879_PCM_COMP_SHIFT 9
|
||||
#define TFA9879_PCM_DL_MASK 0x0100
|
||||
#define TFA9879_PCM_DL_SHIFT 8
|
||||
#define TFA9879_D1_SLOT_MASK 0x00f0
|
||||
#define TFA9879_D1_SLOT_SHIFT 4
|
||||
#define TFA9879_D2_SLOT_MASK 0x000f
|
||||
#define TFA9879_D2_SLOT_SHIFT 0
|
||||
|
||||
/* TFA9879_EQUALIZER_X1 */
|
||||
#define TFA9879_T1_MASK 0x8000
|
||||
#define TFA9879_T1_SHIFT 15
|
||||
#define TFA9879_K1M_MASK 0x7ff0
|
||||
#define TFA9879_K1M_SHIFT 4
|
||||
#define TFA9879_K1E_MASK 0x000f
|
||||
#define TFA9879_K1E_SHIFT 0
|
||||
|
||||
/* TFA9879_EQUALIZER_X2 */
|
||||
#define TFA9879_T2_MASK 0x8000
|
||||
#define TFA9879_T2_SHIFT 15
|
||||
#define TFA9879_K2M_MASK 0x7800
|
||||
#define TFA9879_K2M_SHIFT 11
|
||||
#define TFA9879_K2E_MASK 0x0700
|
||||
#define TFA9879_K2E_SHIFT 8
|
||||
#define TFA9879_K0_MASK 0x00fe
|
||||
#define TFA9879_K0_SHIFT 1
|
||||
#define TFA9879_S_MASK 0x0001
|
||||
#define TFA9879_S_SHIFT 0
|
||||
|
||||
/* TFA9879_BYPASS_CONTROL */
|
||||
#define TFA9879_L_OCP_MASK 0x00c0
|
||||
#define TFA9879_L_OCP_SHIFT 6
|
||||
#define TFA9879_L_OTP_MASK 0x0030
|
||||
#define TFA9879_L_OTP_SHIFT 4
|
||||
#define TFA9879_CLIPCTRL_MASK 0x0008
|
||||
#define TFA9879_CLIPCTRL_SHIFT 3
|
||||
#define TFA9879_HPF_BP_MASK 0x0004
|
||||
#define TFA9879_HPF_BP_SHIFT 2
|
||||
#define TFA9879_DRC_BP_MASK 0x0002
|
||||
#define TFA9879_DRC_BP_SHIFT 1
|
||||
#define TFA9879_EQ_BP_MASK 0x0001
|
||||
#define TFA9879_EQ_BP_SHIFT 0
|
||||
|
||||
/* TFA9879_DYNAMIC_RANGE_COMPR */
|
||||
#define TFA9879_AT_LVL_MASK 0xf000
|
||||
#define TFA9879_AT_LVL_SHIFT 12
|
||||
#define TFA9879_AT_RATE_MASK 0x0f00
|
||||
#define TFA9879_AT_RATE_SHIFT 8
|
||||
#define TFA9879_RL_LVL_MASK 0x00f0
|
||||
#define TFA9879_RL_LVL_SHIFT 4
|
||||
#define TFA9879_RL_RATE_MASK 0x000f
|
||||
#define TFA9879_RL_RATE_SHIFT 0
|
||||
|
||||
/* TFA9879_BASS_TREBLE */
|
||||
#define TFA9879_G_TRBLE_MASK 0x3e00
|
||||
#define TFA9879_G_TRBLE_SHIFT 9
|
||||
#define TFA9879_F_TRBLE_MASK 0x0180
|
||||
#define TFA9879_F_TRBLE_SHIFT 7
|
||||
#define TFA9879_G_BASS_MASK 0x007c
|
||||
#define TFA9879_G_BASS_SHIFT 2
|
||||
#define TFA9879_F_BASS_MASK 0x0003
|
||||
#define TFA9879_F_BASS_SHIFT 0
|
||||
|
||||
/* TFA9879_HIGH_PASS_FILTER */
|
||||
#define TFA9879_HP_CTRL_MASK 0x00ff
|
||||
#define TFA9879_HP_CTRL_SHIFT 0
|
||||
|
||||
/* TFA9879_VOLUME_CONTROL */
|
||||
#define TFA9879_ZR_CRSS_MASK 0x1000
|
||||
#define TFA9879_ZR_CRSS_SHIFT 12
|
||||
#define TFA9879_VOL_MASK 0x00ff
|
||||
#define TFA9879_VOL_SHIFT 0
|
||||
|
||||
/* TFA9879_MISC_CONTROL */
|
||||
#define TFA9879_DE_PHAS_MASK 0x0c00
|
||||
#define TFA9879_DE_PHAS_SHIFT 10
|
||||
#define TFA9879_H_MUTE_MASK 0x0200
|
||||
#define TFA9879_H_MUTE_SHIFT 9
|
||||
#define TFA9879_S_MUTE_MASK 0x0100
|
||||
#define TFA9879_S_MUTE_SHIFT 8
|
||||
#define TFA9879_P_LIM_MASK 0x00ff
|
||||
#define TFA9879_P_LIM_SHIFT 0
|
||||
|
||||
/* TFA9879_MISC_STATUS */
|
||||
#define TFA9879_PS_MASK 0x4000
|
||||
#define TFA9879_PS_SHIFT 14
|
||||
#define TFA9879_PORA_MASK 0x2000
|
||||
#define TFA9879_PORA_SHIFT 13
|
||||
#define TFA9879_AMP_MASK 0x0600
|
||||
#define TFA9879_AMP_SHIFT 9
|
||||
#define TFA9879_IBP_2_MASK 0x0100
|
||||
#define TFA9879_IBP_2_SHIFT 8
|
||||
#define TFA9879_OFP_2_MASK 0x0080
|
||||
#define TFA9879_OFP_2_SHIFT 7
|
||||
#define TFA9879_UFP_2_MASK 0x0040
|
||||
#define TFA9879_UFP_2_SHIFT 6
|
||||
#define TFA9879_IBP_1_MASK 0x0020
|
||||
#define TFA9879_IBP_1_SHIFT 5
|
||||
#define TFA9879_OFP_1_MASK 0x0010
|
||||
#define TFA9879_OFP_1_SHIFT 4
|
||||
#define TFA9879_UFP_1_MASK 0x0008
|
||||
#define TFA9879_UFP_1_SHIFT 3
|
||||
#define TFA9879_OCPOKA_MASK 0x0004
|
||||
#define TFA9879_OCPOKA_SHIFT 2
|
||||
#define TFA9879_OCPOKB_MASK 0x0002
|
||||
#define TFA9879_OCPOKB_SHIFT 1
|
||||
#define TFA9879_OTPOK_MASK 0x0001
|
||||
#define TFA9879_OTPOK_SHIFT 0
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue