phy: miphy365x: Use the generic phy type constants in dt-bindings/phy/phy.h
Now there are generic phy type constants declared in phy.h, migrate over to using them rather than defining our own. This change has been done as one atomic commit to be bisectable. Note: The values of the defines are the same, so there is no ABI breakage with this patch. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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@ -20,8 +20,8 @@ Required nodes : A sub-node is required for each channel the controller
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Required properties (port (child) node):
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Required properties (port (child) node):
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- #phy-cells : Should be 1 (See second example)
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- #phy-cells : Should be 1 (See second example)
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Cell after port phandle is device type from:
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Cell after port phandle is device type from:
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- MIPHY_TYPE_SATA
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- PHY_TYPE_SATA
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- MIPHY_TYPE_PCI
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- PHY_TYPE_PCI
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- reg : Address and length of register sets for each device in
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- reg : Address and length of register sets for each device in
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"reg-names"
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"reg-names"
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- reg-names : The names of the register addresses corresponding to the
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- reg-names : The names of the register addresses corresponding to the
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@ -68,10 +68,10 @@ property, containing a phandle to the phy port node and a device type.
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Example:
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Example:
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#include <dt-bindings/phy/phy-miphy365x.h>
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#include <dt-bindings/phy/phy.h>
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sata0: sata@fe380000 {
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sata0: sata@fe380000 {
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...
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...
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phys = <&phy_port0 MIPHY_TYPE_SATA>;
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phys = <&phy_port0 PHY_TYPE_SATA>;
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...
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...
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};
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};
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@ -10,7 +10,7 @@
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#include "stih416-clock.dtsi"
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#include "stih416-clock.dtsi"
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#include "stih416-pinctrl.dtsi"
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#include "stih416-pinctrl.dtsi"
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#include <dt-bindings/phy/phy-miphy365x.h>
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#include <dt-bindings/phy/phy.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/reset-controller/stih416-resets.h>
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#include <dt-bindings/reset-controller/stih416-resets.h>
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/ {
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/ {
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@ -306,7 +306,7 @@
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reg = <0xfe380000 0x1000>;
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reg = <0xfe380000 0x1000>;
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interrupts = <GIC_SPI 157 IRQ_TYPE_NONE>;
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interrupts = <GIC_SPI 157 IRQ_TYPE_NONE>;
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interrupt-names = "hostc";
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interrupt-names = "hostc";
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phys = <&phy_port0 MIPHY_TYPE_SATA>;
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phys = <&phy_port0 PHY_TYPE_SATA>;
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phy-names = "sata-phy";
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phy-names = "sata-phy";
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resets = <&powerdown STIH416_SATA0_POWERDOWN>,
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resets = <&powerdown STIH416_SATA0_POWERDOWN>,
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<&softreset STIH416_SATA0_SOFTRESET>;
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<&softreset STIH416_SATA0_SOFTRESET>;
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@ -25,7 +25,7 @@
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#include <linux/mfd/syscon.h>
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#include <linux/mfd/syscon.h>
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#include <linux/regmap.h>
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#include <linux/regmap.h>
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#include <dt-bindings/phy/phy-miphy365x.h>
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#include <dt-bindings/phy/phy.h>
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#define HFC_TIMEOUT 100
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#define HFC_TIMEOUT 100
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@ -176,7 +176,7 @@ static u8 rx_tx_spd[] = {
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static int miphy365x_set_path(struct miphy365x_phy *miphy_phy,
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static int miphy365x_set_path(struct miphy365x_phy *miphy_phy,
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struct miphy365x_dev *miphy_dev)
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struct miphy365x_dev *miphy_dev)
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{
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{
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bool sata = (miphy_phy->type == MIPHY_TYPE_SATA);
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bool sata = (miphy_phy->type == PHY_TYPE_SATA);
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return regmap_update_bits(miphy_dev->regmap,
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return regmap_update_bits(miphy_dev->regmap,
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miphy_phy->ctrlreg,
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miphy_phy->ctrlreg,
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@ -430,7 +430,7 @@ static int miphy365x_init(struct phy *phy)
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}
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}
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/* Initialise Miphy for PCIe or SATA */
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/* Initialise Miphy for PCIe or SATA */
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if (miphy_phy->type == MIPHY_TYPE_PCIE)
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if (miphy_phy->type == PHY_TYPE_PCIE)
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ret = miphy365x_init_pcie_port(miphy_phy, miphy_dev);
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ret = miphy365x_init_pcie_port(miphy_phy, miphy_dev);
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else
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else
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ret = miphy365x_init_sata_port(miphy_phy, miphy_dev);
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ret = miphy365x_init_sata_port(miphy_phy, miphy_dev);
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@ -454,8 +454,8 @@ int miphy365x_get_addr(struct device *dev, struct miphy365x_phy *miphy_phy,
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return ret;
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return ret;
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}
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}
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if (!((!strncmp(name, "sata", 4) && type == MIPHY_TYPE_SATA) ||
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if (!((!strncmp(name, "sata", 4) && type == PHY_TYPE_SATA) ||
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(!strncmp(name, "pcie", 4) && type == MIPHY_TYPE_PCIE)))
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(!strncmp(name, "pcie", 4) && type == PHY_TYPE_PCIE)))
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return 0;
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return 0;
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miphy_phy->base = of_iomap(phynode, index);
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miphy_phy->base = of_iomap(phynode, index);
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@ -498,8 +498,8 @@ static struct phy *miphy365x_xlate(struct device *dev,
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miphy_phy->type = args->args[0];
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miphy_phy->type = args->args[0];
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if (!(miphy_phy->type == MIPHY_TYPE_SATA ||
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if (!(miphy_phy->type == PHY_TYPE_SATA ||
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miphy_phy->type == MIPHY_TYPE_PCIE)) {
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miphy_phy->type == PHY_TYPE_PCIE)) {
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dev_err(dev, "Unsupported device type: %d\n", miphy_phy->type);
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dev_err(dev, "Unsupported device type: %d\n", miphy_phy->type);
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return ERR_PTR(-EINVAL);
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return ERR_PTR(-EINVAL);
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}
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}
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@ -1,14 +0,0 @@
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/*
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* This header provides constants for the phy framework
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* based on the STMicroelectronics MiPHY365x.
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*
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* Author: Lee Jones <lee.jones@linaro.org>
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*/
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#ifndef _DT_BINDINGS_PHY_MIPHY
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#define _DT_BINDINGS_PHY_MIPHY
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#define MIPHY_TYPE_SATA 1
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#define MIPHY_TYPE_PCIE 2
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#define MIPHY_TYPE_USB 3
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#endif /* _DT_BINDINGS_PHY_MIPHY */
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