ARM: SAMSUNG: Add spinlock locking to GPIO banks
Add locking to each GPIO bank to allow for SMP capable code to use the gpiolib functions. See the gpio-core.h header file for more information. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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@ -33,9 +33,9 @@ int s3c_gpio_cfgpin(unsigned int pin, unsigned int config)
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offset = pin - chip->chip.base;
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local_irq_save(flags);
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s3c_gpio_lock(chip, flags);
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ret = s3c_gpio_do_setcfg(chip, offset, config);
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local_irq_restore(flags);
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s3c_gpio_unlock(chip, flags);
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return ret;
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}
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@ -51,9 +51,9 @@ unsigned s3c_gpio_getcfg(unsigned int pin)
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if (chip) {
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offset = pin - chip->chip.base;
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local_irq_save(flags);
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s3c_gpio_lock(chip, flags);
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ret = s3c_gpio_do_getcfg(chip, offset);
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local_irq_restore(flags);
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s3c_gpio_unlock(chip, flags);
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}
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return ret;
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@ -72,9 +72,9 @@ int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull)
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offset = pin - chip->chip.base;
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local_irq_save(flags);
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s3c_gpio_lock(chip, flags);
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ret = s3c_gpio_do_setpull(chip, offset, pull);
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local_irq_restore(flags);
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s3c_gpio_unlock(chip, flags);
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return ret;
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}
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@ -15,6 +15,7 @@
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/gpio.h>
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#include <linux/spinlock.h>
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#include <plat/gpio-core.h>
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@ -52,14 +53,14 @@ static int s3c_gpiolib_input(struct gpio_chip *chip, unsigned offset)
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unsigned long flags;
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unsigned long con;
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local_irq_save(flags);
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s3c_gpio_lock(ourchip, flags);
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con = __raw_readl(base + 0x00);
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con &= ~(3 << (offset * 2));
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__raw_writel(con, base + 0x00);
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local_irq_restore(flags);
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s3c_gpio_unlock(ourchip, flags);
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return 0;
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}
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@ -72,7 +73,7 @@ static int s3c_gpiolib_output(struct gpio_chip *chip,
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unsigned long dat;
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unsigned long con;
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local_irq_save(flags);
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s3c_gpio_lock(ourchip, flags);
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dat = __raw_readl(base + 0x04);
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dat &= ~(1 << offset);
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@ -87,7 +88,7 @@ static int s3c_gpiolib_output(struct gpio_chip *chip,
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__raw_writel(con, base + 0x00);
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__raw_writel(dat, base + 0x04);
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local_irq_restore(flags);
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s3c_gpio_unlock(ourchip, flags);
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return 0;
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}
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@ -99,7 +100,7 @@ static void s3c_gpiolib_set(struct gpio_chip *chip,
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unsigned long flags;
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unsigned long dat;
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local_irq_save(flags);
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s3c_gpio_lock(ourchip, flags);
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dat = __raw_readl(base + 0x04);
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dat &= ~(1 << offset);
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@ -107,7 +108,7 @@ static void s3c_gpiolib_set(struct gpio_chip *chip,
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dat |= 1 << offset;
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__raw_writel(dat, base + 0x04);
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local_irq_restore(flags);
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s3c_gpio_unlock(ourchip, flags);
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}
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static int s3c_gpiolib_get(struct gpio_chip *chip, unsigned offset)
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@ -131,6 +132,8 @@ __init void s3c_gpiolib_add(struct s3c_gpio_chip *chip)
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BUG_ON(!gc->label);
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BUG_ON(!gc->ngpio);
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spin_lock_init(&chip->lock);
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if (!gc->direction_input)
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gc->direction_input = s3c_gpiolib_input;
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if (!gc->direction_output)
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@ -44,16 +44,26 @@ struct s3c_gpio_cfg;
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* @chip: The chip structure to be exported via gpiolib.
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* @base: The base pointer to the gpio configuration registers.
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* @config: special function and pull-resistor control information.
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* @lock: Lock for exclusive access to this gpio bank.
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* @pm_save: Save information for suspend/resume support.
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*
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* This wrapper provides the necessary information for the Samsung
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* specific gpios being registered with gpiolib.
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*
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* The lock protects each gpio bank from multiple access of the shared
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* configuration registers, or from reading of data whilst another thread
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* is writing to the register set.
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*
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* Each chip has its own lock to avoid any contention between different
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* CPU cores trying to get one lock for different GPIO banks, where each
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* bank of GPIO has its own register space and configuration registers.
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*/
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struct s3c_gpio_chip {
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struct gpio_chip chip;
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struct s3c_gpio_cfg *config;
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struct s3c_gpio_pm *pm;
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void __iomem *base;
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spinlock_t lock;
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#ifdef CONFIG_PM
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u32 pm_save[4];
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#endif
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@ -138,3 +148,7 @@ extern struct s3c_gpio_pm s3c_gpio_pm_4bit;
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#define __gpio_pm(x) NULL
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#endif /* CONFIG_PM */
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/* locking wrappers to deal with multiple access to the same gpio bank */
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#define s3c_gpio_lock(_oc, _fl) spin_lock_irqsave(&(_oc)->lock, _fl)
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#define s3c_gpio_unlock(_oc, _fl) spin_unlock_irqrestore(&(_oc)->lock, _fl)
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