bnx2x: Fan failure
Setup fan failure for different PHY types or according to nvram settings Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -91,6 +91,21 @@ struct shared_hw_cfg { /* NVRAM Offset */
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#define SHARED_HW_CFG_HIDE_PORT1 0x00002000
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/* The fan failure mechanism is usually related to the PHY type
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since the power consumption of the board is determined by the PHY.
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Currently, fan is required for most designs with SFX7101, BCM8727
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and BCM8481. If a fan is not required for a board which uses one
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of those PHYs, this field should be set to "Disabled". If a fan is
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required for a different PHY type, this option should be set to
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"Enabled".
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The fan failure indication is expected on
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SPIO5 */
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#define SHARED_HW_CFG_FAN_FAILURE_MASK 0x00180000
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#define SHARED_HW_CFG_FAN_FAILURE_SHIFT 19
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#define SHARED_HW_CFG_FAN_FAILURE_PHY_TYPE 0x00000000
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#define SHARED_HW_CFG_FAN_FAILURE_DISABLED 0x00080000
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#define SHARED_HW_CFG_FAN_FAILURE_ENABLED 0x00100000
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u32 power_dissipated; /* 0x11c */
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#define SHARED_HW_CFG_POWER_DIS_CMN_MASK 0xff000000
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#define SHARED_HW_CFG_POWER_DIS_CMN_SHIFT 24
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@ -2598,6 +2598,22 @@ static void bnx2x_attn_int_asserted(struct bnx2x *bp, u32 asserted)
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}
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}
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static inline void bnx2x_fan_failure(struct bnx2x *bp)
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{
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int port = BP_PORT(bp);
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/* mark the failure */
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bp->link_params.ext_phy_config &= ~PORT_HW_CFG_XGXS_EXT_PHY_TYPE_MASK;
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bp->link_params.ext_phy_config |= PORT_HW_CFG_XGXS_EXT_PHY_TYPE_FAILURE;
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SHMEM_WR(bp, dev_info.port_hw_config[port].external_phy_config,
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bp->link_params.ext_phy_config);
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/* log the failure */
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printk(KERN_ERR PFX "Fan Failure on Network Controller %s has caused"
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" the driver to shutdown the card to prevent permanent"
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" damage. Please contact Dell Support for assistance\n",
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bp->dev->name);
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}
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static inline void bnx2x_attn_int_deasserted0(struct bnx2x *bp, u32 attn)
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{
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int port = BP_PORT(bp);
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@ -2615,36 +2631,21 @@ static inline void bnx2x_attn_int_deasserted0(struct bnx2x *bp, u32 attn)
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BNX2X_ERR("SPIO5 hw attention\n");
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/* Fan failure attention */
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switch (XGXS_EXT_PHY_TYPE(bp->link_params.ext_phy_config)) {
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case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101:
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/* Fan failure attention */
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/* The PHY reset is controlled by GPIO 1 */
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bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_1,
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MISC_REGISTERS_GPIO_OUTPUT_LOW, port);
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/* Low power mode is controlled by GPIO 2 */
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bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2,
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MISC_REGISTERS_GPIO_OUTPUT_LOW, port);
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/* mark the failure */
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bp->link_params.ext_phy_config &=
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~PORT_HW_CFG_XGXS_EXT_PHY_TYPE_MASK;
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bp->link_params.ext_phy_config |=
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PORT_HW_CFG_XGXS_EXT_PHY_TYPE_FAILURE;
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SHMEM_WR(bp,
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dev_info.port_hw_config[port].
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external_phy_config,
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bp->link_params.ext_phy_config);
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/* log the failure */
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printk(KERN_ERR PFX "Fan Failure on Network"
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" Controller %s has caused the driver to"
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" shutdown the card to prevent permanent"
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" damage. Please contact Dell Support for"
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" assistance\n", bp->dev->name);
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/* The PHY reset is controlled by GPIO 1 */
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bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_1,
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MISC_REGISTERS_GPIO_OUTPUT_LOW, port);
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break;
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default:
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break;
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}
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bnx2x_fan_failure(bp);
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}
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if (attn & (AEU_INPUTS_ATTN_BITS_GPIO3_FUNCTION_0 |
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@ -5509,6 +5510,58 @@ static void bnx2x_reset_common(struct bnx2x *bp)
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REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR, 0x1403);
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}
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static void bnx2x_setup_fan_failure_detection(struct bnx2x *bp)
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{
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u32 val;
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u8 port;
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u8 is_required = 0;
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val = SHMEM_RD(bp, dev_info.shared_hw_config.config2) &
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SHARED_HW_CFG_FAN_FAILURE_MASK;
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if (val == SHARED_HW_CFG_FAN_FAILURE_ENABLED)
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is_required = 1;
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/*
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* The fan failure mechanism is usually related to the PHY type since
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* the power consumption of the board is affected by the PHY. Currently,
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* fan is required for most designs with SFX7101, BCM8727 and BCM8481.
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*/
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else if (val == SHARED_HW_CFG_FAN_FAILURE_PHY_TYPE)
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for (port = PORT_0; port < PORT_MAX; port++) {
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u32 phy_type =
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SHMEM_RD(bp, dev_info.port_hw_config[port].
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external_phy_config) &
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PORT_HW_CFG_XGXS_EXT_PHY_TYPE_MASK;
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is_required |=
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((phy_type ==
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PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101) ||
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(phy_type ==
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PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8481));
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}
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DP(NETIF_MSG_HW, "fan detection setting: %d\n", is_required);
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if (is_required == 0)
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return;
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/* Fan failure is indicated by SPIO 5 */
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bnx2x_set_spio(bp, MISC_REGISTERS_SPIO_5,
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MISC_REGISTERS_SPIO_INPUT_HI_Z);
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/* set to active low mode */
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val = REG_RD(bp, MISC_REG_SPIO_INT);
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val |= ((1 << MISC_REGISTERS_SPIO_5) <<
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MISC_REGISTERS_SPIO_INT_OLD_SET_POS);
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REG_WR(bp, MISC_REG_SPIO_INT, val);
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/* enable interrupt to signal the IGU */
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val = REG_RD(bp, MISC_REG_SPIO_EVENT_EN);
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val |= (1 << MISC_REGISTERS_SPIO_5);
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REG_WR(bp, MISC_REG_SPIO_EVENT_EN, val);
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}
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static int bnx2x_init_common(struct bnx2x *bp)
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{
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u32 val, i;
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@ -5738,27 +5791,12 @@ static int bnx2x_init_common(struct bnx2x *bp)
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bp->port.need_hw_lock = 1;
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break;
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case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101:
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/* Fan failure is indicated by SPIO 5 */
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bnx2x_set_spio(bp, MISC_REGISTERS_SPIO_5,
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MISC_REGISTERS_SPIO_INPUT_HI_Z);
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/* set to active low mode */
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val = REG_RD(bp, MISC_REG_SPIO_INT);
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val |= ((1 << MISC_REGISTERS_SPIO_5) <<
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MISC_REGISTERS_SPIO_INT_OLD_SET_POS);
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REG_WR(bp, MISC_REG_SPIO_INT, val);
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/* enable interrupt to signal the IGU */
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val = REG_RD(bp, MISC_REG_SPIO_EVENT_EN);
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val |= (1 << MISC_REGISTERS_SPIO_5);
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REG_WR(bp, MISC_REG_SPIO_EVENT_EN, val);
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break;
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default:
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break;
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}
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bnx2x_setup_fan_failure_detection(bp);
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/* clear PXP2 attentions */
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REG_RD(bp, PXP2_REG_PXP2_INT_STS_CLR_0);
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