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ARM: tegra30: common: enable csite clock 

Enable csite (debug and trace controller) clock at init to prevent it
be disabled. And this also the necessary clock for CPU be brought up or
resumed from a power-gating low power state.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This commit is contained in:
Joseph Lo 2012-10-31 17:41:18 +08:00 committed by Stephen Warren
parent d457ef358f
commit fe508d7769
1 changed files with 1 additions and 0 deletions
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arch/arm/mach-tegra/common.c
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@ -108,6 +108,7 @@ static __initdata struct tegra_clk_init_table tegra30_clk_init_table[] = {
{ "sclk", "pll_p_out4", 102000000, true },
{ "hclk", "sclk", 102000000, true },
{ "pclk", "hclk", 51000000, true },
{ "csite", NULL, 0, true },
{ NULL, NULL, 0, 0},
};
#endif