[ARM] 5018/1: RealView: Fix the ARM11MPCore Oprofile compilation
This patch fixes the Oprofile for ARM11MPCore compilation introduced by changes to the RealView code. Only RealView/EB is supported. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -51,7 +51,7 @@
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/*
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/*
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* MPCore SCU event monitor support
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* MPCore SCU event monitor support
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*/
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*/
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#define SCU_EVENTMONITORS_VA_BASE __io_address(REALVIEW_MPCORE_SCU_BASE + 0x10)
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#define SCU_EVENTMONITORS_VA_BASE __io_address(REALVIEW_EB11MP_SCU_BASE + 0x10)
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/*
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/*
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* Bitmask of used SCU counters
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* Bitmask of used SCU counters
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@ -80,7 +80,7 @@ static irqreturn_t scu_em_interrupt(int irq, void *arg)
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struct eventmonitor __iomem *emc = SCU_EVENTMONITORS_VA_BASE;
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struct eventmonitor __iomem *emc = SCU_EVENTMONITORS_VA_BASE;
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unsigned int cnt;
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unsigned int cnt;
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cnt = irq - IRQ_PMU_SCU0;
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cnt = irq - IRQ_EB11MP_PMU_SCU0;
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oprofile_add_sample(get_irq_regs(), SCU_COUNTER(cnt));
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oprofile_add_sample(get_irq_regs(), SCU_COUNTER(cnt));
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scu_reset_counter(emc, cnt);
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scu_reset_counter(emc, cnt);
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@ -119,10 +119,10 @@ static int scu_start(void)
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*/
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*/
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for (i = 0; i < NUM_SCU_COUNTERS; i++) {
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for (i = 0; i < NUM_SCU_COUNTERS; i++) {
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if (scu_em_used & (1 << i)) {
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if (scu_em_used & (1 << i)) {
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ret = request_irq(IRQ_PMU_SCU0 + i, scu_em_interrupt, IRQF_DISABLED, "SCU PMU", NULL);
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ret = request_irq(IRQ_EB11MP_PMU_SCU0 + i, scu_em_interrupt, IRQF_DISABLED, "SCU PMU", NULL);
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if (ret) {
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if (ret) {
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printk(KERN_ERR "oprofile: unable to request IRQ%u for SCU Event Monitor\n",
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printk(KERN_ERR "oprofile: unable to request IRQ%u for SCU Event Monitor\n",
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IRQ_PMU_SCU0 + i);
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IRQ_EB11MP_PMU_SCU0 + i);
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goto err_free_scu;
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goto err_free_scu;
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}
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}
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}
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}
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@ -153,7 +153,7 @@ static int scu_start(void)
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err_free_scu:
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err_free_scu:
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while (i--)
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while (i--)
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free_irq(IRQ_PMU_SCU0 + i, NULL);
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free_irq(IRQ_EB11MP_PMU_SCU0 + i, NULL);
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return ret;
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return ret;
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}
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}
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@ -175,7 +175,7 @@ static void scu_stop(void)
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for (i = 0; i < NUM_SCU_COUNTERS; i++) {
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for (i = 0; i < NUM_SCU_COUNTERS; i++) {
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if (scu_em_used & (1 << i)) {
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if (scu_em_used & (1 << i)) {
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scu_reset_counter(emc, i);
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scu_reset_counter(emc, i);
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free_irq(IRQ_PMU_SCU0 + i, NULL);
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free_irq(IRQ_EB11MP_PMU_SCU0 + i, NULL);
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}
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}
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}
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}
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}
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}
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@ -225,10 +225,10 @@ static int em_setup_ctrs(void)
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}
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}
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static int arm11_irqs[] = {
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static int arm11_irqs[] = {
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[0] = IRQ_PMU_CPU0,
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[0] = IRQ_EB11MP_PMU_CPU0,
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[1] = IRQ_PMU_CPU1,
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[1] = IRQ_EB11MP_PMU_CPU1,
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[2] = IRQ_PMU_CPU2,
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[2] = IRQ_EB11MP_PMU_CPU2,
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[3] = IRQ_PMU_CPU3
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[3] = IRQ_EB11MP_PMU_CPU3
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};
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};
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static int em_start(void)
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static int em_start(void)
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@ -273,22 +273,22 @@ static int em_setup(void)
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/*
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/*
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* Send SCU PMU interrupts to the "owner" CPU.
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* Send SCU PMU interrupts to the "owner" CPU.
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*/
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*/
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em_route_irq(IRQ_PMU_SCU0, 0);
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em_route_irq(IRQ_EB11MP_PMU_SCU0, 0);
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em_route_irq(IRQ_PMU_SCU1, 0);
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em_route_irq(IRQ_EB11MP_PMU_SCU1, 0);
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em_route_irq(IRQ_PMU_SCU2, 1);
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em_route_irq(IRQ_EB11MP_PMU_SCU2, 1);
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em_route_irq(IRQ_PMU_SCU3, 1);
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em_route_irq(IRQ_EB11MP_PMU_SCU3, 1);
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em_route_irq(IRQ_PMU_SCU4, 2);
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em_route_irq(IRQ_EB11MP_PMU_SCU4, 2);
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em_route_irq(IRQ_PMU_SCU5, 2);
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em_route_irq(IRQ_EB11MP_PMU_SCU5, 2);
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em_route_irq(IRQ_PMU_SCU6, 3);
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em_route_irq(IRQ_EB11MP_PMU_SCU6, 3);
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em_route_irq(IRQ_PMU_SCU7, 3);
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em_route_irq(IRQ_EB11MP_PMU_SCU7, 3);
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/*
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/*
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* Send CP15 PMU interrupts to the owner CPU.
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* Send CP15 PMU interrupts to the owner CPU.
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*/
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*/
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em_route_irq(IRQ_PMU_CPU0, 0);
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em_route_irq(IRQ_EB11MP_PMU_CPU0, 0);
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em_route_irq(IRQ_PMU_CPU1, 1);
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em_route_irq(IRQ_EB11MP_PMU_CPU1, 1);
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em_route_irq(IRQ_PMU_CPU2, 2);
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em_route_irq(IRQ_EB11MP_PMU_CPU2, 2);
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em_route_irq(IRQ_PMU_CPU3, 3);
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em_route_irq(IRQ_EB11MP_PMU_CPU3, 3);
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return 0;
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return 0;
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}
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}
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